JPS6020510A - Diffusing method of impurity - Google Patents
Diffusing method of impurityInfo
- Publication number
- JPS6020510A JPS6020510A JP12836783A JP12836783A JPS6020510A JP S6020510 A JPS6020510 A JP S6020510A JP 12836783 A JP12836783 A JP 12836783A JP 12836783 A JP12836783 A JP 12836783A JP S6020510 A JPS6020510 A JP S6020510A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- diffusion
- solid
- source
- heating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000012535 impurity Substances 0.000 title claims abstract description 26
- 238000000034 method Methods 0.000 title description 8
- 238000009792 diffusion process Methods 0.000 claims abstract description 60
- 239000000758 substrate Substances 0.000 claims abstract description 41
- 239000004065 semiconductor Substances 0.000 claims abstract description 40
- 239000007787 solid Substances 0.000 claims abstract description 28
- 238000010438 heat treatment Methods 0.000 claims abstract description 24
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 3
- 229910052796 boron Inorganic materials 0.000 claims description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 abstract description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 8
- 229910052698 phosphorus Inorganic materials 0.000 abstract description 8
- 239000011574 phosphorus Substances 0.000 abstract description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052710 silicon Inorganic materials 0.000 abstract description 5
- 239000010703 silicon Substances 0.000 abstract description 5
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 abstract description 2
- 239000011230 binding agent Substances 0.000 abstract description 2
- 229910001873 dinitrogen Inorganic materials 0.000 abstract description 2
- 239000000377 silicon dioxide Substances 0.000 abstract description 2
- ZZUFCTLCJUWOSV-UHFFFAOYSA-N furosemide Chemical compound C1=C(Cl)C(S(=O)(=O)N)=CC(C(O)=O)=C1NCC1=CC=CO1 ZZUFCTLCJUWOSV-UHFFFAOYSA-N 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 description 11
- 239000007789 gas Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 3
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- 229910052582 BN Inorganic materials 0.000 description 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/2225—Diffusion sources
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
この発明は半導体装置の製造における、リン、１だけボ
ロンなどの不純物の半導体基板への拡散においで，固体
拡散源，半導体基板を各々、平行して向いあった加熱板
上に保持し、加熱拡散することにより、大口径の半導体
基板に均一，高精度に不純物拡散を行うことを可能にし
た不純物の拡散方法に関するものである。[Detailed Description of the Invention] Industrial Application Field This invention is used to diffuse impurities such as phosphorus and boron into a semiconductor substrate in the manufacture of semiconductor devices. This invention relates to an impurity diffusion method that makes it possible to uniformly and precisely diffuse impurities into a large-diameter semiconductor substrate by holding them on opposing heating plates and heating and diffusing them.
従来例の構成とその問題点
近時、半導体装置の製造において、量産性の向上とコス
トの低減のため、半導体基板の大口径化が活発に進めら
れている。特にシリコン基板に関しては、単結晶引き上
げ技術の進歩に伴って、現在５インチ径から、さらに６
インチ以上の大口径基板へと急速に進展している。2. Description of the Related Art Conventional Structures and Problems Recently, in the manufacture of semiconductor devices, the diameter of semiconductor substrates has been actively increased in order to improve mass productivity and reduce costs. In particular, with regard to silicon substrates, with advances in single crystal pulling technology, the diameter has now increased from 5 inches to 6 inches.
There is rapid progress toward large-diameter substrates of inches or larger.
一方、半導体基板の大口径化に伴い、半導体装置の製造
装置もこれに対応して改善が必要となってきた。不純物
の熱拡散では、従来からのホノトウオール型の拡散炉で
処理されており、半導体基板の口径に合せて、チューブ
の径が拡大されてきている。ところが、大口径になると
、ウェハー内。On the other hand, as semiconductor substrates have become larger in diameter, it has become necessary to improve semiconductor device manufacturing equipment accordingly. Thermal diffusion of impurities is conventionally carried out in a white-wall type diffusion furnace, and the diameter of the tube has been increased to match the diameter of the semiconductor substrate. However, when the diameter becomes large, the inside of the wafer.
バノチ内の不純物拡散の均一性を充分に得ることが困難
になってきた。これは５インチ径以上になると著しくな
り、チューブ内でのガスの流れの均一性、処理中の温度
分布の安定性を制御するのがむづかしくなる。このだめ
、大口径化につれて。It has become difficult to obtain sufficient uniformity of impurity diffusion within the vanoch. This becomes noticeable when the tube has a diameter of 5 inches or more, and it becomes difficult to control the uniformity of gas flow within the tube and the stability of temperature distribution during processing. As the caliber becomes larger.
−回の被処理枚数が減少し、寸だ高精度拡散が困難にな
った。- The number of sheets to be processed per cycle has decreased, making high-precision diffusion extremely difficult.
次に従来の不純物拡散方法を製造装置例をあげて詳細に
示す。第１図に横型の拡散炉の断面の概略構造図を示す
。同図において、１は円筒型の石英ガラス、寸たはシリ
コンカーバイド（ＳｉＣ）からなる拡散チューブを示し
、２は拡散炉のヒータ一部、３は拡散チューブへのガス
の導入口、４は石英ガラスからなるボー１−．５ａは固
体拡散源、６は被処理半導体基板、７は石英チューブの
キャップを示す。なお、ここで、固体拡散源６ａはリン
を拡散する場合には５ｉＰ７０７を主成分とする円板状
の固体拡散源がイＪ用でｔ’）る。不純物拡散の工程に
おいて、半導体基板６と固体拡散源５ａを平行に、半導
体基板の不純物を拡散する面が拡散源が向い会うように
交互に立−Ｃ１チューブ１内に挿入する。次にガスの導
入［」３よりチノ素ガスを流し、所定の拡散温度に上げ
、リンの拡散を行う。固体拡散源５＆は半導体基板６と
同一の大きさ１寸だはそれ以上の大きさのものを用いる
。Next, a conventional impurity diffusion method will be described in detail using an example of a manufacturing apparatus. FIG. 1 shows a schematic cross-sectional structural diagram of a horizontal diffusion furnace. In the figure, 1 indicates a diffusion tube made of cylindrical quartz glass or silicon carbide (SiC), 2 is a part of the heater of the diffusion furnace, 3 is a gas inlet to the diffusion tube, and 4 is a quartz glass tube. Bow made of glass 1-. 5a is a solid diffusion source, 6 is a semiconductor substrate to be processed, and 7 is a cap of a quartz tube. Here, when the solid diffusion source 6a diffuses phosphorus, a disk-shaped solid diffusion source containing 5iP707 as a main component is used. In the impurity diffusion process, the semiconductor substrate 6 and the solid diffusion source 5a are alternately inserted into the vertical C1 tube 1 in parallel so that the surfaces of the semiconductor substrate on which impurities are to be diffused face each other. Next, chino gas is introduced through gas introduction 3, raised to a predetermined diffusion temperature, and phosphorus is diffused. The solid diffusion source 5& is the same size as the semiconductor substrate 6, or one size larger than that.
以上のような不純物の拡散方法は、半導体基板６の口径
が４インチ程度までの場合、実用上均一性が実現できた
が、／さらに大口径にした場合、ウェハー内、バッチ内
のシート抵抗のバラツギが数十係となり、実用上問題が
生じた。このバラツキはシート抵抗が大きい場合、すな
わち、不純物低濃度拡散の処理のとき特に著しい。この
原因は大口径化により、固体拡散源、半導体基板、ボー
ト。The impurity diffusion method described above has achieved practical uniformity when the diameter of the semiconductor substrate 6 is up to about 4 inches; however, when the diameter of the semiconductor substrate 6 is made even larger, the sheet resistance within the wafer or batch increases. The variation was in the dozens, which caused a practical problem. This variation is particularly significant when the sheet resistance is large, that is, when low concentration impurity diffusion is performed. This is due to larger diameters, solid diffusion sources, semiconductor substrates, and boats.
チューブなどの熱容量が太きくなるため温度の制ｆｆ１
ｌの応答が遅いこと、ガスの流れが均一になりにくいこ
となどによる。１だ、半導体基板が６〜８インチ以上に
１で太きくなると、これに必要な固体拡散源を製造する
ことがむづかしく、コストの面からも問題がある。また
、固体拡散源を用いずに、ホスフィン、酸素の混合ガス
雰囲気によりリン拡散する方法もあるが、前者以上に、
シート抵抗の均一性を得ることは困難である。Temperature control ff1 because the heat capacity of tubes etc. becomes thicker
This is due to the slow response of l and the difficulty in making the gas flow uniform. 1. When the semiconductor substrate becomes thicker than 6 to 8 inches, it becomes difficult to manufacture the solid-state diffusion source necessary for this, and there is also a problem in terms of cost. There is also a method of diffusing phosphorus in a mixed gas atmosphere of phosphine and oxygen without using a solid diffusion source, but this method is more effective than the former.
It is difficult to obtain uniformity in sheet resistance.
このため、半導体基板の大口径化に伴い、不純物の拡散
方法の改善が必要である。Therefore, as the diameter of semiconductor substrates increases, it is necessary to improve the method of diffusing impurities.
発明の目的
そこで本発明は半導体基板への不純物の拡散において、
固体拡散源と半導体基板を各々、平行に゛向い合った加
熱板に保持し、加熱することにより、大口径の半導体基
板に均一に不純物の拡散することを可能にする半導体装
置の製造方法を提供するものである。Purpose of the Invention Therefore, the present invention provides a method for diffusing impurities into a semiconductor substrate.
Provided is a method for manufacturing a semiconductor device that makes it possible to uniformly diffuse impurities into a large-diameter semiconductor substrate by holding a solid diffusion source and a semiconductor substrate on heating plates facing each other in parallel and heating them. It is something to do.
発明の構成
本発明は、第１の加熱板に固定した固体拡散源と、第２
の加熱板に固定した半導体基板とを、平行して向い合わ
ぜて設置し、第１．第２の加熱板を各々、加熱すること
により、固体拡散源より半導体基板に不純物を拡散する
ことを特徴とする拡散方法であり、大［−１径の半導体
基板に均一に不純物を拡散することを可能にするもので
ある。Structure of the Invention The present invention includes a solid diffusion source fixed to a first heating plate and a second heating plate.
and the semiconductor substrate fixed to the heating plate of the first. This is a diffusion method characterized by diffusing impurities from a solid diffusion source into a semiconductor substrate by heating each of the second heating plates. This is what makes it possible.
実施例の説明
以下に本発明を実施例により詳しく述べる。第２図はこ
の発明の一実施例による半導体基板への不純物の拡散方
法で用いる製造装置の概略断面図である。第２図におい
て、８は円板状の固体拡散源５ｂを固定し、かつ、裏面
より加熱するヒーター９を含んでいる第１の加熱板であ
り、１０は径大な半導体基板６を保持する第２の加熱板
である。DESCRIPTION OF EMBODIMENTS The present invention will now be described in detail with reference to embodiments. FIG. 2 is a schematic cross-sectional view of a manufacturing apparatus used in a method of diffusing impurities into a semiconductor substrate according to an embodiment of the present invention. In FIG. 2, 8 is a first heating plate that fixes a disk-shaped solid diffusion source 5b and includes a heater 9 that heats from the back side, and 10 holds a large-diameter semiconductor substrate 6. This is the second heating plate.
なお９′は第２の加熱板１０内に含まれるヒータ一部を
示す。上部及び下部のヒーター９，９′は独ケして制（
財）され、所定の温度に設定される。５ｂの固体拡散源
は、リン拡散の場合、前述の如く、二酸化珪素をバイン
ダーとして、５ｉＰ２０７を含有した円板状の拡散源で
、被処理用の半導体基板６とほぼ同程度の大きさである
。第２図のように設置されたシリコン基板６と、固体拡
散源５ｂとは各々、所定の温度に保たれる。拡散には拡
散室１１にチッ素ガスが導入口３から導入され、排気口
１２に排気される。例えば、Ｐ型シリコン基板にリンを
拡散し、シート抵抗２００７口を得るには、９５０℃で
約２０分裂したが、本実施例によれば、従来方法のバラ
ツキ±２０％に比して、±２係と著しく向上される。さ
らに、固体拡散源の温度をシリコン基板の温度より高く
設定することにより、均一性を低下することなく、拡散
時間を短縮することが可能である。拡散は１枚処理、あ
るいは数枚同時処理のいずれも可能である。寸だ、ウエ
ノ・−の大口径化、例えば６インチ以上とかなり大きく
なった場合、固体拡散源の製造がむづかしく、かなり製
造コストを要するため、第３図に示すように、小さな１
」径の固体拡散源５Ｃを多数、平面的に並べて配置する
ことにより、第２図と同様に拡散することができろ。こ
の場合、完全に円板状にならないが、実用」−１均一性
は維持できる。本実施例はリン拡散の場合であるが、ボ
ロンナイトライドを用いてボロン拡散についても同様に
実施できる。Note that 9' indicates a part of the heater included in the second heating plate 10. The upper and lower heaters 9, 9' are controlled independently (
temperature) and set at a predetermined temperature. In the case of phosphorus diffusion, the solid diffusion source 5b is a disk-shaped diffusion source containing 5iP207 using silicon dioxide as a binder, and is approximately the same size as the semiconductor substrate 6 to be processed, as described above. . The silicon substrate 6 installed as shown in FIG. 2 and the solid diffusion source 5b are each maintained at a predetermined temperature. For diffusion, nitrogen gas is introduced into the diffusion chamber 11 through the inlet 3 and exhausted through the exhaust port 12. For example, to diffuse phosphorus into a P-type silicon substrate and obtain a sheet resistance of 2007, approximately 20 splits were required at 950°C, but according to this example, the variation was ±20% in the conventional method. It has been significantly improved to 2nd grade. Furthermore, by setting the temperature of the solid diffusion source higher than the temperature of the silicon substrate, it is possible to shorten the diffusion time without reducing uniformity. Diffusion can be performed either on a single sheet or on several sheets simultaneously. However, when the diameter of the Ueno becomes large, for example, 6 inches or more, manufacturing a solid diffusion source becomes difficult and requires considerable manufacturing cost, so a small 1.
Diffusion can be achieved in the same manner as shown in FIG. 2 by arranging a large number of solid-state diffusion sources 5C with a diameter of 100 cm in a plane. In this case, although the disc shape is not completely formed, the uniformity for practical use can be maintained. This example deals with phosphorus diffusion, but boron diffusion can be similarly carried out using boron nitride.
才だ、本実施１夕１」では、固体拡散源を上部、半導体
基板を下部に保持しているが、半導体基板へのダストの
刺着を防止するため、逆の構造も可能である。In this example, the solid diffusion source is held at the top and the semiconductor substrate is held at the bottom, but the reverse structure is also possible in order to prevent dust from sticking to the semiconductor substrate.
発明の効果
以上のように本発明に係る不純物の拡散方法は、大口径
半導体基板への不純物拡散を、固体拡散源を用い、これ
らを平行に向い合って設置し、各々を個別に加熱すると
七により、大口径半導体基板の全面に均一に不純物を拡
散することを可能にしたものであり、半導体装置の製造
に有用な技術である。Effects of the Invention As described above, the impurity diffusion method according to the present invention can diffuse impurities into a large-diameter semiconductor substrate by using solid diffusion sources, placing them facing each other in parallel, and heating each one separately. This makes it possible to uniformly diffuse impurities over the entire surface of a large-diameter semiconductor substrate, and is a useful technique for manufacturing semiconductor devices.
第１図は従来の一般的な構造の石英チューブを有する拡
散炉の概略断面構造図、第２図は本発明の具体的な一実
施例にかかる不純物の拡散方法で用いる製造装置の概略
断面構造図、第３図は固体拡散源の配置の一例を示す平
面図である。
５ｂ、５Ｇ・・・・・・固体拡散源、６・・・・・・半
導体基板、８．１０・・・・・・加熱部、 ９．９’・
・・・・・ヒータ。FIG. 1 is a schematic cross-sectional structure diagram of a diffusion furnace having a conventional conventional quartz tube structure, and FIG. 2 is a schematic cross-sectional structure diagram of a manufacturing apparatus used in an impurity diffusion method according to a specific embodiment of the present invention. 3 are plan views showing an example of the arrangement of solid diffusion sources. 5b, 5G...Solid diffusion source, 6...Semiconductor substrate, 8.10...Heating part, 9.9'.
·····heater.
Claims (3)
熱板に固定した半導体基板とを、平行して向い合わせて
設置し、前記第１．第２の加熱板を加熱することにより
、前記固体拡散源から前記半導体基板に不純物を拡散す
ることを特徴とする不純物拡散方法。(1) A solid diffusion source fixed to a first heating plate and a semiconductor substrate fixed to a second heating plate are installed in parallel and facing each other, and the first. An impurity diffusion method characterized in that impurities are diffused from the solid diffusion source into the semiconductor substrate by heating a second heating plate.
源からなることを特徴とする特許 記載の不純物拡散方法。(2) The impurity diffusion method described in the patent, characterized in that the solid expanded HHy source consists of a plate-shaped diffusion source containing 5iP707.
拡散源からなることを特徴とする特許請求の範囲第１項
に記載の不純物拡散方法。(3) The impurity diffusion method according to claim 1, wherein the solid diffusion source is a plate-shaped diffusion source containing boron nylide 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12836783A JPS6020510A (en) | 1983-07-13 | 1983-07-13 | Diffusing method of impurity |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12836783A JPS6020510A (en) | 1983-07-13 | 1983-07-13 | Diffusing method of impurity |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6020510A true JPS6020510A (en) | 1985-02-01 |
Family
ID=14983067
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12836783A Pending JPS6020510A (en) | 1983-07-13 | 1983-07-13 | Diffusing method of impurity |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6020510A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6293927A (en) * | 1985-10-08 | 1987-04-30 | バリアン・アソシエイツ・インコ−ポレイテツド | Doping of semiconductor wafer by quick heat treatment of solid flat diffusion source |
| US5223452A (en) * | 1989-12-21 | 1993-06-29 | Knepprath Vernon E | Method and apparatus for doping silicon spheres |
| JP2003031515A (en) * | 2001-07-12 | 2003-01-31 | Hitachi Kokusai Electric Inc | Substrate processing apparatus and method of manufacturing semiconductor device |
| JP2003529221A (en) * | 2000-03-29 | 2003-09-30 | テクネグラス，インコーポレイテッド | Method of doping silicon with phosphorus and growing oxides on silicon in the presence of vapor |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4910665A (en) * | 1972-03-31 | 1974-01-30 | ||
| JPS5064186A (en) * | 1973-10-12 | 1975-05-31 | ||
| JPS511066A (en) * | 1974-06-21 | 1976-01-07 | Hitachi Ltd | Handotaiueehano kakusanhoho |
-
1983
- 1983-07-13 JP JP12836783A patent/JPS6020510A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4910665A (en) * | 1972-03-31 | 1974-01-30 | ||
| JPS5064186A (en) * | 1973-10-12 | 1975-05-31 | ||
| JPS511066A (en) * | 1974-06-21 | 1976-01-07 | Hitachi Ltd | Handotaiueehano kakusanhoho |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6293927A (en) * | 1985-10-08 | 1987-04-30 | バリアン・アソシエイツ・インコ−ポレイテツド | Doping of semiconductor wafer by quick heat treatment of solid flat diffusion source |
| US5223452A (en) * | 1989-12-21 | 1993-06-29 | Knepprath Vernon E | Method and apparatus for doping silicon spheres |
| JP2003529221A (en) * | 2000-03-29 | 2003-09-30 | テクネグラス，インコーポレイテッド | Method of doping silicon with phosphorus and growing oxides on silicon in the presence of vapor |
| JP2003031515A (en) * | 2001-07-12 | 2003-01-31 | Hitachi Kokusai Electric Inc | Substrate processing apparatus and method of manufacturing semiconductor device |
| JP4509433B2 (en) * | 2001-07-12 | 2010-07-21 | 株式会社日立国際電気 | Substrate processing apparatus and semiconductor device manufacturing method |
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