JPH027516A - Method of diffusing impurity in semiconductor - Google Patents

Method of diffusing impurity in semiconductor

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Publication number
JPH027516A
JPH027516A JP15831888A JP15831888A JPH027516A JP H027516 A JPH027516 A JP H027516A JP 15831888 A JP15831888 A JP 15831888A JP 15831888 A JP15831888 A JP 15831888A JP H027516 A JPH027516 A JP H027516A
Authority
JP
Japan
Prior art keywords
substrate
silicon nitride
diffusion
oxide film
single crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15831888A
Other languages
Japanese (ja)
Inventor
Shigeo Hoshino
重夫 星野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nissan Motor Co Ltd
Original Assignee
Nissan Motor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nissan Motor Co Ltd filed Critical Nissan Motor Co Ltd
Priority to JP15831888A priority Critical patent/JPH027516A/en
Publication of JPH027516A publication Critical patent/JPH027516A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To form a diffused layer having a required thickness in a high temperature state and in a short time and void contamination caused by heavy metal ions by a method wherein, after a semiconductor substrate is covered with a silicon nitride film with an oxide film between, the substrate is subjected to a high temperature treatment for thermal diffusion. CONSTITUTION:A thermal oxide film 24 is formed over the whole surface of an N-type Si single crystal substrate 20 in which a boron deposited layer 22 is formed and the whole surface is coated with a silicon nitride film 26. The semiconductor substrates W prepared by such pretreatment are arranged on an SiC board 14 and inserted into an SiC tube 12 and an electric furnace 10 is driven to heat the substrates W at a high temperature not lower than about 1200 deg.C. For instance, if the heating temperature, i.e. a thermal diffusion temperature, is 1250 deg.C, a diffused layer 28 having a thickness about 8-10mum is formed in about 6 hours. However, if the Si single crystal substrate 20 is covered with the silicon nitride film 26 with the oxide film 24 between, even if the substrate is heated at about 1200 deg.C for several tens of hours, heavy metal ions do not reach the inside of the Si single crystal.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、半導体に於けるドーピング技術に係り、特に
熱拡散により不純物を半導体基板中に拡散させる拡散方
法に係る。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to doping technology in semiconductors, and particularly to a diffusion method for diffusing impurities into a semiconductor substrate by thermal diffusion.

(従来の技術) MOSFETやバイポーラトランジスタ等の半導体に於
けるドーピングの基本的な方法として、As、P或いは
Bの如き元素を含む不純物の固体或いは気体を拡散源と
した熱拡散法がよく知られている。
(Prior Art) As a basic method for doping semiconductors such as MOSFETs and bipolar transistors, a thermal diffusion method using a solid or gaseous impurity containing elements such as As, P, or B as a diffusion source is well known. ing.

この熱拡散法に於ては、不純物の拡散を受けるべき単結
晶シリコンウェハの如き半導体基板を拡散雰囲気を生成
するチューブ内に装填し、電気炉によって前記半導体基
板を高温に加熱することにより行われている。この場合
、チューブは、その内部にて高温処理される半導体基板
が高温処理中にチューブを構成する材料が含んでいるF
eの如き重金属成分のイオンにより汚染されないよう、
一般には、重金属含有量は極めて少ない高純度の石英に
より構成されている。また同じことからチューブ内にて
半導体基板を保持するボードも石英製のものが用いられ
ている。
In this thermal diffusion method, a semiconductor substrate such as a single crystal silicon wafer to undergo impurity diffusion is loaded into a tube that generates a diffusion atmosphere, and the semiconductor substrate is heated to a high temperature using an electric furnace. ing. In this case, the semiconductor substrate to be subjected to high-temperature processing inside the tube contains F
To prevent contamination by ions of heavy metal components such as e.
Generally, it is made of high-purity quartz with extremely low heavy metal content. For the same reason, the board that holds the semiconductor substrate inside the tube is also made of quartz.

(発明が解決しようとする課題) しかし、石英チューブ、石英ボードは1150℃以−り
の高温状態に長時間に亘−)で曝されると、石英自体の
軟化により変形を生じ、これはウェハサイズが大きくな
り、これに伴ないチューブの径が大きくなる程顕著なも
のになる。例えば、直径が180mm、肉厚が4mm程
度の石英チューブでは、1200℃に加熱されると、数
10時間で使用不能になる。
(Problem to be solved by the invention) However, when quartz tubes and quartz boards are exposed to high temperatures of 1150°C or higher for long periods of time, the quartz itself softens and deforms, which causes the wafer The problem becomes more noticeable as the size increases and the diameter of the tube increases accordingly. For example, if a quartz tube with a diameter of 180 mm and a wall thickness of about 4 mm is heated to 1200° C., it becomes unusable within several tens of hours.

このなめに従来は熱拡散温度が制限され、比較的低い温
度にて長時間に亘って熱処理を行わないと、所要の深い
拡散層が得られないという問題があった。
For this reason, the heat diffusion temperature has conventionally been limited, and there has been a problem that a required deep diffusion layer cannot be obtained unless heat treatment is performed at a relatively low temperature for a long time.

例えば、熱拡散温度が1200℃であれば、厚さ8〜1
0μm程度のP型拡散層は20時間程度で得られるが、
拡散温度を1200℃より40℃下げると、同等のもの
を得るための拡散時間は拡散温度が1200℃である時
の2.5倍に相当する50時間必要になり、この拡散温
度を更に下げると、途方もない熱処理時間が必要になり
、8〜10μm程度の深い拡散層は側底形成されなくな
る。
For example, if the heat diffusion temperature is 1200℃, the thickness is 8~1
A P-type diffusion layer of about 0 μm can be obtained in about 20 hours,
If the diffusion temperature is lowered by 40°C than 1200°C, the diffusion time to obtain the same result will be 50 hours, which is 2.5 times as long as when the diffusion temperature is 1200°C. , an enormous amount of heat treatment time is required, and a deep diffusion layer of about 8 to 10 μm cannot be formed on the side bottom.

(発明の目的) 本発明は、従来の熱拡散法に於ける上述の如き問題点に
鑑み、拡散処理器具としてのチューブの耐久性を充分に
確保した上で、従来に比して高温状態にて且つ短時間に
て所要の厚さの拡散層を生成し、しかも半導体基板を重
金属イオンより汚染することがない改良された不純物の
拡散方法を提供することを目的としている。
(Purpose of the Invention) In view of the above-mentioned problems in the conventional thermal diffusion method, the present invention has been developed to ensure sufficient durability of the tube as a diffusion treatment device and to enable the tube to be heated to a higher temperature than conventional methods. It is an object of the present invention to provide an improved method for diffusing impurities, which generates a diffusion layer of a required thickness in a short time and does not contaminate a semiconductor substrate with heavy metal ions.

(課題を解決するための手段) 上述の如き目的は、本発明によれば、表面に不純物を添
加された半導体基板を酸化膜を挾んでシリコンナイトラ
イド膜(S i 3 Na )により被覆し、この被覆
体を石英に比して耐熱性に優れたSiCの如き耐熱性材
料製のチューブ内で高温処理し、不純物を半導体基板中
へ拡散させる工程を含んでいることを特徴とする如き半
導体に於ける不純物の拡散方法によって達成される。
(Means for Solving the Problems) According to the present invention, the above-mentioned object is to cover a semiconductor substrate whose surface is doped with an impurity with a silicon nitride film (S i 3 Na ) with an oxide film interposed therebetween; This semiconductor is characterized by including a step of treating the coating at high temperature in a tube made of a heat-resistant material such as SiC, which has superior heat resistance compared to quartz, and diffusing impurities into the semiconductor substrate. This is achieved by a method of impurity diffusion.

(実施例の説明) 次に添付の図を参照して本発明を実施例について詳細に
説明する。第1図は本発明による不純物の拡散方法の実
施に用いられる不純物拡散装置の一つの実施例を示して
いる。
(Description of Embodiments) Next, the present invention will be described in detail with reference to embodiments with reference to the accompanying drawings. FIG. 1 shows one embodiment of an impurity diffusion device used to implement the impurity diffusion method according to the present invention.

第1図に於て、10は電気炉を、12は電気炉10内に
設置されたチューブを、・14は被拡散処理物である半
導体基板Wを担持するボードを各々示している。
In FIG. 1, 10 represents an electric furnace, 12 represents a tube installed in the electric furnace 10, and 14 represents a board supporting a semiconductor substrate W, which is an object to be diffused.

本発明による拡散方法に於ては、チューブ12及びボー
ド14がSiCの如き石英より耐熱性に優れた材料によ
り構成されている。
In the diffusion method according to the present invention, the tube 12 and the board 14 are made of a material that has better heat resistance than quartz, such as SiC.

半導体基板Wは、第2−1図に示されている如く、チュ
ーブ12内にての熱拡散処理に先立−)で、N型Si単
結晶基板20の表面の所定位置に不純物ボロンデポジッ
ド層22をイオン注入法により形成されている。
As shown in FIG. 2-1, before the semiconductor substrate W is subjected to thermal diffusion treatment in the tube 12, an impurity boron deposit layer 22 is formed at a predetermined position on the surface of the N-type Si single crystal substrate 20. It is formed by ion implantation method.

本発明による拡散方法に於ては、上述の如くデポジット
層22を形成された基板20の全表面に酸化性ガス雰囲
気中、例えば酸素ガス雰囲気中にて1000人程度0熱
酸化膜を1050℃以下の低温状!序にて石英チューブ
”l−+で成形し、続いてLP CV D法によりシリ
コンナイトライド膜を1000乃至2000人程度全面
にコーティングする。
In the diffusion method according to the present invention, a zero thermal oxide film is deposited on the entire surface of the substrate 20 on which the deposit layer 22 has been formed as described above in an oxidizing gas atmosphere, for example, an oxygen gas atmosphere, at a temperature of 1050° C. or lower by about 1000 people. Low temperature condition! First, a quartz tube "l-+" is formed, and then the entire surface is coated with a silicon nitride film of about 1,000 to 2,000 layers using the LP CVD method.

第2−1図に於ては、熱酸化膜は符号24により、シリ
コンナイトライド膜は符号26により各々示されており
、この図からも明らかな如く、基板20は熱酸化膜24
を挾んでシリコンナイトライド[26により被覆される
ことになる。
In FIG. 2-1, the thermal oxide film is indicated by the reference numeral 24, and the silicon nitride film is indicated by the reference numeral 26, and as is clear from this figure, the substrate 20 is
It will be covered with silicon nitride [26] between the two.

上述の如く前処理された被覆体、すなわち半導体基板W
をSiCボード14上に並べ、これをSiCチューブ1
2内に装填し、電気炉10を作動させて1200℃程度
以上の高温加熱を行う。
The covering body pretreated as described above, that is, the semiconductor substrate W
are arranged on the SiC board 14, and this is placed on the SiC tube 1.
2 and operate the electric furnace 10 to heat it at a high temperature of about 1200° C. or higher.

例えば、この加熱温度、即ち熱拡散温度が1250℃で
あれば、8〜10μm程度の拡散層28(第2−2図参
照)は約6時間で形成される。
For example, if the heating temperature, that is, the thermal diffusion temperature is 1250° C., the diffusion layer 28 (see FIG. 2-2) having a thickness of about 8 to 10 μm is formed in about 6 hours.

SiCチューブは石英チューブに比して耐熱性に醍れて
いるが、その反面、高純度の石英チューブに比して重金
属含有量が多く、例えばFeは高純度石英チューブでは
0.3ppm以下であるのに対し、SiCチューブでは
10〜20 Dt)m程度になり、このため石英チュー
ブ使用時と同じ状態にて半導体基板を熱処理すると、重
金属イオンによりこれが汚染され、半導体基板を構成す
るSi単結晶中に欠陥が発生し、半導体デバイスの特性
が劣化するようになる。
SiC tubes have better heat resistance than quartz tubes, but on the other hand, they contain more heavy metals than high-purity quartz tubes; for example, high-purity quartz tubes contain less than 0.3 ppm of Fe. On the other hand, in the case of a SiC tube, it is approximately 10 to 20 Dt) m. Therefore, if a semiconductor substrate is heat-treated under the same conditions as when using a quartz tube, it will be contaminated with heavy metal ions, and the Si single crystal that makes up the semiconductor substrate will be contaminated. Defects occur in the semiconductor device, and the characteristics of the semiconductor device deteriorate.

このことから本発明による拡散方法においては、重金属
イオンによる汚染を回避すべく、Si単結晶基板20を
酸化[24を介してシリコンナイトライド膜26により
被覆した状態にて熱処理することが行われる。Si単結
晶基板20が酸化膜24を介してシリコンナイI・ライ
ド膜26により被覆されていると、これが例えばSiC
チューブ12内にて1200℃程度にて数10時間加熱
されてもSi単結晶中に重金属イオンは達しない。即ち
、Si単結晶基板20が重金属イオンにより汚染される
ことがない。
Therefore, in the diffusion method according to the present invention, in order to avoid contamination by heavy metal ions, heat treatment is performed while the Si single crystal substrate 20 is coated with the silicon nitride film 26 via oxidation [24]. When the Si single crystal substrate 20 is covered with a silicon nitride film 26 via an oxide film 24, this is, for example, a SiC
Heavy metal ions do not reach the Si single crystal even if it is heated at about 1200° C. for several tens of hours in the tube 12. That is, the Si single crystal substrate 20 is not contaminated with heavy metal ions.

シリコンナイ【・ライト膜は拡散のための熱処理後には
除去されればよく、これによりこれより以降は通常の処
理プロセスにて半導体デバイスの製造が行われ得るよう
になる。
The silicon nitride film only needs to be removed after the heat treatment for diffusion, and from this point on, semiconductor devices can be manufactured using normal processing processes.

基板20とシリコンナイ;・う、イド膜2Gとの間の熱
酸化膜24は、熱処理中に於て基板20がシリコンナイ
トう、イド膜26より受けるスt・レスの影響を低減す
るために必要とされ、この厚さは熱拡散処理温度、処理
時間等に応じて適正値を選定されればよく、通常これは
1000人程度全島ってよい。
The thermal oxide film 24 between the substrate 20 and the silicon oxide film 2G is used to reduce the influence of stress that the substrate 20 receives from the silicon oxide film 26 during heat treatment. The appropriate thickness may be selected depending on the heat diffusion treatment temperature, treatment time, etc., and normally this thickness may be sufficient for about 1000 people on the entire island.

(発明の効果) 上述の如く、本発明による不純物の拡散方法に於ては、
半導体基板を酸化膜を介してシリコンナイトライド膜で
被覆した上で、これの熱拡散のための高温処理を行って
いるため、チューブがSiCチューブの如く重金属成分
が比較的多いものであっても半導体基板が重金属イオン
により汚染されることがなく、前記チューブが石英等に
比してより耐熱性に優れた材料により構成され得ること
に応じて拡散処理温度を従来より高くすることが可能に
なる。このことから、特にBIPICプロセスに於ける
アイソレーシシン工程や、CMO3ICプロセスに於け
るウェル形成工程等に於て深い拡散層が従来に比して短
時間にて形成できるようになり、大幅な製造コストの低
減が図られるようになる。
(Effect of the invention) As mentioned above, in the impurity diffusion method according to the present invention,
Since the semiconductor substrate is coated with a silicon nitride film via an oxide film and then subjected to high-temperature treatment for thermal diffusion, even if the tube contains a relatively large amount of heavy metal components, such as a SiC tube. The semiconductor substrate is not contaminated with heavy metal ions, and the tube can be made of a material with higher heat resistance than quartz or the like, making it possible to increase the diffusion treatment temperature higher than before. . As a result, deep diffusion layers can be formed in a shorter time than in the past, especially in the isolation process of the BIPIC process and the well formation process of the CMO3IC process, which greatly reduces the manufacturing cost. Costs will be reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による不純物の拡散方法の実施に用いら
れる拡散装置の具体例を示す概略構成図、第2−1図は
本発明による不純物の拡散方法の実施に用いられる半導
体基板の熱処理前の状態を示す断面図、第2−2図は同
じくそれの熱処理後の状態を示す断面図である。 10・・・電気炉 12・・・チューブ 14・・・ボード W・・・半導体基板 20・・・N型Si単結晶基板 22・・・不純物ボロンデポジット層 24・・・熱酸化膜 26・・・シリコンナイl−ラ・イト)模28・・・拡
散層 特許出願人 日産自動車株式会社
Fig. 1 is a schematic configuration diagram showing a specific example of a diffusion device used in implementing the impurity diffusion method according to the present invention, and Fig. 2-1 shows a semiconductor substrate before heat treatment used in implementing the impurity diffusion method according to the present invention. FIG. 2-2 is a sectional view showing the state after heat treatment. 10... Electric furnace 12... Tube 14... Board W... Semiconductor substrate 20... N-type Si single crystal substrate 22... Impurity boron deposit layer 24... Thermal oxide film 26...・Silicon Nyl-Lite) Model 28... Diffusion layer patent applicant Nissan Motor Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] 1、表面に不純物を添加された半導体基板を酸化膜を挾
んでシリコンナイトライド膜により被覆し、この被覆体
を耐熱性材料製のチューブ内で高温処理し、不純物を半
導体基板中へ拡散させる工程を含んでいることを特徴と
する半導体に於ける不純物の拡散方法。
1. A process in which a semiconductor substrate with impurities added to its surface is covered with a silicon nitride film with an oxide film in between, and this coating is subjected to high temperature treatment in a tube made of heat-resistant material to diffuse impurities into the semiconductor substrate. A method for diffusing impurities in a semiconductor, characterized by containing.
JP15831888A 1988-06-27 1988-06-27 Method of diffusing impurity in semiconductor Pending JPH027516A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15831888A JPH027516A (en) 1988-06-27 1988-06-27 Method of diffusing impurity in semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15831888A JPH027516A (en) 1988-06-27 1988-06-27 Method of diffusing impurity in semiconductor

Publications (1)

Publication Number Publication Date
JPH027516A true JPH027516A (en) 1990-01-11

Family

ID=15669013

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15831888A Pending JPH027516A (en) 1988-06-27 1988-06-27 Method of diffusing impurity in semiconductor

Country Status (1)

Country Link
JP (1) JPH027516A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7265716B2 (en) 2002-04-18 2007-09-04 Fujitsu Limited Positioning of mobile wireless terminal
JP2008139292A (en) * 2007-11-05 2008-06-19 Fujitsu Ltd Positioning system, program and positioning method for determining position of mobile radio station

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7265716B2 (en) 2002-04-18 2007-09-04 Fujitsu Limited Positioning of mobile wireless terminal
US7304610B2 (en) 2002-04-18 2007-12-04 Fujitsu Limited Positioning of mobile wireless terminal
US7319428B2 (en) 2002-04-18 2008-01-15 Fujitsu Limited Positioning of mobile wireless terminal
JP2008139292A (en) * 2007-11-05 2008-06-19 Fujitsu Ltd Positioning system, program and positioning method for determining position of mobile radio station

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