JP2623985B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device,
In particular, the present invention relates to a method for preventing metal contamination of a semiconductor substrate during high-temperature heat treatment of a semiconductor substrate.

In a semiconductor device manufacturing process, a dopant such as boron (B) or phosphorus (P) introduced into a semiconductor substrate surface by ion implantation or the like, for example, in a well diffusion step of an M0S DRAM or a buried diffusion step of a bipolar element. For example
In the high-temperature heat treatment step of deeply diffusing into the substrate at a high temperature of about 1200 ° C., metal impurities that have entered the inside of the furnace core tube through the tube wall of the furnace core tube from the outside of the furnace core tube containing the semiconductor substrate through the tube wall of the furnace core tube, for example, It is adsorbed on the surface and easily diffuses in the substrate. As a result, the element formed on the semiconductor substrate has, for example, a decrease in the breakdown voltage of the thermal oxide film,
This causes characteristic deterioration such as an increase in junction leakage. Therefore, in the high-temperature heat treatment as described above, it is particularly desired to prevent contamination of the semiconductor substrate by metal impurities.

[0003]

2. Description of the Related Art As a conventional technique for preventing deterioration of semiconductor element characteristics due to intrusion of metal impurities into a furnace core tube as described above during high-temperature heat treatment, a heat treatment temperature is reduced to, for example, 1100 ° C. or lower, and the inside of the furnace core tube is reduced. Infiltration of metal impurities into metal.

[0004] The surface of a substrate is covered with a substance having a small metal diffusion constant, such as silicon nitride (Si ₃ N ₄ ), and heat treatment is performed while suppressing diffusion of metal impurities attached to the substrate surface.
Such methods were used.

[0005]

However, in the method of lowering the temperature, there is a problem that the diffusion width of the dopant implanted in the substrate cannot be formed to a necessary and sufficient value. Without, in the method of coating the substrate surface with a substance having a small metal diffusion constant,
There is a problem that the throughput is reduced due to an increase in the number of steps of coating and stripping a substance having a small metal diffusion constant, and a problem that the yield is easily reduced due to deterioration of device characteristics due to the stripped residue of the substance on the substrate. Was.

Accordingly, the present invention provides a method for reducing the heat treatment temperature,
It is an object of the present invention to provide a high-temperature heat treatment method for a semiconductor substrate that can easily and surely prevent metal contamination without coating a substrate surface with a substance having a small metal diffusion constant.

[0007]

SUMMARY OF THE INVENTION The object of the present invention is to provide a method for heat treating a semiconductor substrate (6) from an object made of a substance having a smaller metal diffusion constant than that of the semiconductor substrate (6) or an object coated with the substance. A step of arranging the shielding object (7) with the semiconductor substrate (6) in the furnace core tube (1) so as to cover at least one surface which is a main surface of the semiconductor substrate (6), and performing a heat treatment. The problem is solved by a method for manufacturing a semiconductor device according to the present invention having the following.

[0008]

FIG. 1 is a schematic view for explaining the principle of the present invention.
1 is a quartz furnace core tube, 2 is a gas inlet, 3 is a gas outlet, 4
Is a lid, 5 is a heater wire made of an iron (Fe) -nickel (Ni) -chromium (Cr) alloy, 6 is a semiconductor substrate, 7 is 500 to 10,000
A metal impurity shielding substrate 8 made of a silicon (Si) substrate whose surface is covered with a silicon nitride (Si ₃ N ₄ ) film having a thickness of about Å, and 8 indicates a metal impurity.

As shown in FIG. 1, according to the method of the present invention, at least one of the main surfaces of the semiconductor substrate 6,
That is, in the figure, both surfaces are sandwiched between metal impurity shielding substrates 7 of the same size as the semiconductor substrate 6 whose surface is covered with a Si ₃ N ₄ film whose metal has a significantly smaller diffusion constant than the required thickness of the semiconductor substrate 6. Thus, the heat treatment is performed by covering the surface of the semiconductor substrate 6 with the metal impurity shielding substrate 7 in a state where the surface is substantially shielded from the atmosphere in the furnace core tube 1.

Therefore, a metal such as Fe, Ni, or Cr, which is a component of the heater wire 5 that has entered the furnace core tube 1 through the tube wall of the quartz furnace core tube 1 through a heat treatment at a high temperature of about 1200 ° C. for a long time. The impurities 8 adhere to the metal impurity shielding substrate 7 and diffuse toward the semiconductor substrate 6 through the Si ₃ N ₄ film having a small diffusion constant of the metal coated on the surface of the shielding substrate 7. Since the Si ₃ N ₄ film has a necessary and sufficient thickness, the metal impurity 8 does not reach the semiconductor substrate 6 side even if a heat treatment is performed for a predetermined long time, so that the metal impurity 8 enters the semiconductor substrate 6. Spreading is prevented.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings. FIG. 2 is a schematic view of an embodiment of a metal impurity shielding object material structure according to the present invention, wherein (a) is a Si ₃ N ₄ coated substrate, (b) is a CVD-SiC coated substrate, and (c) is a CVD-SiC base.
FIG. 3 is a schematic view of an embodiment of the shape and arrangement of the metal impurity shielding object according to the present invention, wherein (a) is an example of a single semiconductor substrate, and (b) is an example of a container shape. , (C) is another example of the container shape, (d) is an example of simultaneous processing of a plurality of semiconductor substrates, and FIG. 4 is a schematic view of an example used for measuring the effect of the present invention.

When the heat treatment is performed at a high temperature for a long time by the method of the present invention, the material of the metal impurity shielding object disposed in the furnace core tube together with the semiconductor substrate is, for example, as shown in FIGS. 2 (a) to 2 ( c ). One having a structure is used.

The first example has a structure in which the surface of a Si substrate 11 is covered with a Si ₃ N ₄ film 12 by a CVD method, as shown in FIG. In this case, the thickness of the Si substrate 11 varies depending on the size, but is suitably about 0.5 to 1 mm. Si ₃ N to cover
_{4 The} thickness required for the film 12 depends on the diffusion constant and the processing temperature of the metal that is to be prevented from diffusing into the semiconductor substrate, and the processing time, but in a normal high-temperature heat treatment of about 1200 ° C., about 5 to 10 hours. When shielding alkali metals and heavy metals, about 500 to 10,000 mm is sufficient. In this structure, besides the above-mentioned Si, ceramic SiC,
Ceramics such as SiN, quartz, and carbon are also used.

The second example has a structure in which the surface of a Si substrate 11 is covered with a CVD-SiC film 13 as shown in FIG. In this case, the thickness of the Si substrate 11 may be the same as in the above example, and the CV
The thickness of the D-SiC film 13 is sufficient if the heat treatment conditions are about 500 to 1000 ° because the diffusion constant of the metal is extremely small. However, the thickness of the D-SiC film 13 is usually about 50 to 300 μm due to the manufacturing process. Also in this case, ceramic SiC, ceramic SiN, quartz, carbon or the like is used for the substrate in addition to Si.

In the third example, as shown in FIG.
The SiC substrate 14. In this case, the thickness is formed in the order of several 100 μm to 3 mm in consideration of mechanical strength .

In carrying out the method of the present invention, a shielding object having a shape as shown in FIGS. 3 (a) to 3 (d) is formed by using the metal impurity shielding object material having the material structure shown in FIG. Used.

The first example is, as shown in FIG. 3A, a single metal impurity shielding substrate 16 having a sufficient area to completely cover one semiconductor substrate 6 to be processed. In this case, the heat treatment is generally performed with the metal impurity shielding substrate 16 substantially in close contact with the surface of the semiconductor substrate 6 with the semiconductor substrate 6 to be processed sandwiched between the two single metal impurity shielding substrates 16 as shown in the figure.
The heat treatment is performed while shielding both surfaces of the semiconductor substrate 6 from the atmosphere in the furnace core tube and the metal impurities diffused in the furnace core by the heat treatment. The metal impurity shielding plate 16 may be used to shield only the main surface of the semiconductor substrate 6 in a state where the semiconductor device is placed on the main surface only so as to cover the entire main surface (not shown). A weight may be used to increase the degree of adhesion between the semiconductor substrate 6 to be processed and the impurity shielding substrate 16.

In the second example, as shown in FIG. 3 (b), a bottom plate portion 17B and a hollow portion capable of accommodating the substrate 6 to be processed are formed below the bottom plate portion 17B. The first metal impurity shielding container 17 is composed of a lid 17A. In this case, the heat treatment is performed in a state where the substrate 6 to be processed is accommodated in the container 17 and the semiconductor substrate 6 is shielded from the atmosphere in the furnace core tube and metal impurities diffused therein by the container 17. . A weight may be used to enhance the adhesion between the edge of the lid 17A and the bottom plate 17B.

In the third example, as shown in FIG. 3C, a container 18B having a concave portion capable of accommodating the semiconductor substrate 6 to be processed is provided.
And a lid plate portion 18A closely contacting the upper edge of the second metal impurity shielding container 18. In this case, the heat treatment is also performed in a state where the substrate 6 is accommodated in the container 18 and the semiconductor substrate 6 is shielded from metal impurities.
A weight may be used to increase the adhesion between the edge of B and the cover plate 18A.

A fourth example is a large metal impurity shielding plate 19 having a large area in which a plurality of semiconductor substrates 6 to be processed can be juxtaposed, as shown in FIG. In this case, the heat treatment is generally performed with the metal impurity shielding plate 19 being sandwiched between the two metal impurity shielding plates 19 as shown in FIG. Heat treatment is performed while the substrate 19 shields both surfaces of the semiconductor substrate 6 from the atmosphere in the furnace core tube and metal impurities diffused therein. Although not shown in this case, a plurality of substrates 6 to be processed are placed on a single metal impurity shielding substrate 19 with the main surface thereof facing down. In some cases, only the main surface of the processing substrate 6 is shielded from metal impurities and heat-treated. In addition, a weight may be used to enhance the adhesion between the semiconductor substrate 6 to be processed and the metal impurity shielding substrate 19.

The single metal impurity shielding plate 16 and the multiple metal impurity shielding plate 19 shown in the above embodiment have a surface roughness of 100 μm or less as small as possible in contact with the semiconductor substrate 6 to be processed. It is desirable.

Further, it is desirable that the contact portions between the lids of the first and second metal impurity shielding containers 17 and 18 shown in the above embodiment and the containers are as air-tight as possible. Next, an example performed for measuring the effect of the method of the present invention will be described with reference to FIG.

In this embodiment, two single metal impurity shielding plates 16 made of the CVD-SiC substrate 14 shown in the above embodiment are used as metal impurity shielding objects, and are sandwiched between the metal impurity shielding plates 16. At the same time, the second Si substrate 21 and the first Si substrate 20 that is not sandwiched between the two are simultaneously placed in the quartz furnace core tube 1.
In the furnace core tube 1 from the gas inlet 2 through nitrogen (N
₂ ) A high-temperature heat treatment was performed at 1200 ° C. for 6 hours while the inside of the furnace core tube 1 was kept in an N ₂ atmosphere by introducing the gas 22. In the figure,
3 is a gas outlet, 4 is a lid, and 5 is a heater wire.

The values of the lifetimes of the first Si substrate 20 and the second Si substrate 21 after the heat treatment and the reference Si substrate not subjected to the heat treatment, measured by the reflection microwave method (61
Table 1 below shows the average values measured for the points).

[0025]

[Table 1] From the values in Table 1, the lifetime of the first Si substrate 20 barely placed in the furnace core tube 1 without being sandwiched by anything is about 1/100 that of the reference substrate not subjected to the heat treatment. Whereas the lifetime of the second Si substrate 21 placed in the furnace core tube between the metal impurity shielding plates 16 is
It can be seen that there is only a slight deterioration of about 1/3 of the lifetime value of the reference substrate.

Table 2 shows that the Si substrate, on which a thermal oxide film having a thickness of about 250 ° was previously formed on the Si substrate by thermal oxidation at about 950 ° C., corresponds to the first and second Si substrates of the above embodiment. After performing high-temperature heat treatment, the amounts of Fe and Cu contained in the thermal oxide film of each Si substrate were measured by atomic absorption spectrometry, and contained in the thermal oxide film of the reference Si substrate not subjected to the heat treatment. Fe and
It is a table shown in comparison with the amount of Cu.

As shown in Table 2, Fe and Cu were detected from the thermal oxide film on the first Si substrate which had been subjected to a high-temperature heat treatment in a bare state without using any metal impurity shielding means, whereas Fe and Cu were detected. -
No detection was made from the thermal oxide film on the second Si substrate that was subjected to high-temperature heat treatment sandwiched between the SiC substrates.
It can be seen that the metal contamination of the substrate has been sufficiently prevented.

[0028]

[Table 2] As described above in the embodiment for measuring the effect of the present invention, a state in which the main surface of the Si substrate to be processed is sandwiched so as to be covered with a metal impurity shielding substrate having a small metal diffusion constant, that is, Processed by bringing the impurity shielding substrate into close contact
By performing the high-temperature heat treatment in a state where the Si substrate surface is substantially shielded from the atmosphere in the furnace core tube, it becomes possible to prevent adhesion and diffusion of metal impurities to the Si substrate. Therefore, if a metal impurity shielding object having the above-mentioned container structure having a better effect of shielding from the atmosphere in the furnace core tube is used, the effect of preventing metal contamination of the substrate to be processed is further enhanced.

In the method of the present invention, the greater the thickness of the metallic impurity shielding object, the greater the impurity shielding effect.
In addition, the number of usable times can be increased.

[0030]

As described above, according to the present invention, during high-temperature heat treatment, a substrate made of a metal impurity shielding material is overlaid on a semiconductor substrate to be processed, or a semiconductor substrate to be processed is made of a metal impurity shielding material. By a simple operation such as housing in a container, contamination of the semiconductor substrate to be processed by metal impurities can be prevented.

Therefore, it is not necessary to cover the surface of the semiconductor substrate to be treated with the metal impurity shielding material, so that the number of steps due to the application and peeling of the metal impurity shielding material film is not increased, so that the throughput is increased and at the same time the metal impurity shielding material is increased. The reduction in the production yield of semiconductor devices due to the peeling residue of the shielding material film is also eliminated, and M0S DRAM and bipolar I
This is effective in manufacturing a semiconductor device including a high-temperature diffusion process such as C.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is a schematic view of an embodiment of a metal impurity shielding object material structure according to the present invention, wherein (a) is a Si ₃ N ₄ coated substrate, and (b) is a CVD-S
iC coated substrate, (c) is CVD-SiC substrate

3A and 3B are schematic diagrams of an embodiment of the shape and arrangement of a metal impurity shielding object according to the present invention, wherein FIG. 3A is an example for a single sheet , and FIG.
Is an example of a container shape, (c) is another example of a container shape, (d)
Is an example of simultaneous processing of multiple semiconductor substrates

FIG. 4 is a schematic view of one embodiment used for measuring the effect of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Quartz furnace tube 2 Gas inlet 3 Gas outlet 4 Lid 5 Heater wire 6 Semiconductor substrate to be processed 7 Metal impurity shielding substrate 8 Metal impurity

Claims (4)

(57) [Claims] 1. A heat treatment of a semiconductor substrate (6), an object made of a material having a smaller metal diffusion constant than the semiconductor substrate (6) or a shielded object made of an object coated with the material. (7) the semiconductor substrate (6) so as to cover at least one of the main surfaces of the semiconductor substrate (6).
And a step of performing heat treatment by disposing the semiconductor device in a furnace core tube (1). 2. The method according to claim 1, wherein the metal is made of an alkali metal or a heavy metal. 3. The semiconductor device according to claim 2, wherein said shielding object has a flat plate shape having a size equal to or larger than said semiconductor substrate, or a container shape capable of containing said semiconductor substrate. 2. The method for manufacturing a semiconductor device according to claim 1. 4. The method for manufacturing a semiconductor device according to claim 1, wherein the substance having a smaller metal diffusion constant than said semiconductor substrate is made of silicon nitride or silicon carbide.