JPS63105343U - - Google Patents
Info
- Publication number
- JPS63105343U JPS63105343U JP20387486U JP20387486U JPS63105343U JP S63105343 U JPS63105343 U JP S63105343U JP 20387486 U JP20387486 U JP 20387486U JP 20387486 U JP20387486 U JP 20387486U JP S63105343 U JPS63105343 U JP S63105343U
- Authority
- JP
- Japan
- Prior art keywords
- die pad
- pad portion
- semiconductor device
- device package
- lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図及び第２図はそれぞれ本考案による半導
体装置用パツケージの一例の斜視図及びその要部
の平面図、第３図及び第４図は従来の半導体装置
の斜視図及び断面図、第５図は従来装置の要部の
平面図である。
１はリードフレーム、２は下部支持板、３は上
部枠体、４はダイパツド部、９はそのダイパツド
支持部、１０はそのダイパツド連結部である。
1 and 2 are a perspective view and a plan view of essential parts of an example of a package for a semiconductor device according to the present invention, respectively, FIGS. 3 and 4 are a perspective view and a sectional view of a conventional semiconductor device, and FIG. The figure is a plan view of the main parts of a conventional device. 1 is a lead frame, 2 is a lower support plate, 3 is an upper frame body, 4 is a die pad portion, 9 is a die pad support portion thereof, and 10 is a die pad connection portion thereof.
Claims (1)
パツド部の相対向する２辺に近接配置された外部
導出用端子を有し、上記ダイパツド部の支持部と
、上記外部導出用端子とを下部支持板と上部枠体
とで接着固定してなる半導体装置用パツケージに
おいて、 上記ダイパツド部と、接着された上記ダイパツ
ド支持部とを複数個所で連結してなる半導体装置
用パツケージ。[Claims for Utility Model Registration] It has a die pad portion on which a semiconductor element is placed, external lead-out terminals arranged close to two opposing sides of the die pad portion, and a supporting portion of the die pad portion and A semiconductor device package in which a lead-out terminal is adhesively fixed to a lower support plate and an upper frame, the semiconductor device package in which the die pad portion and the bonded die pad support portion are connected at a plurality of locations. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20387486U JPS63105343U (en) | 1986-12-25 | 1986-12-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20387486U JPS63105343U (en) | 1986-12-25 | 1986-12-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63105343U true JPS63105343U (en) | 1988-07-08 |
Family
ID=31169614
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20387486U Pending JPS63105343U (en) | 1986-12-25 | 1986-12-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63105343U (en) |
-
1986
- 1986-12-25 JP JP20387486U patent/JPS63105343U/ja active Pending