JPS631023B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement of a phase control device, and more particularly to a phase control device for controlling a power conversion device that includes a built-in monitoring device for monitoring a failure or a preceding phenomenon.

Power conversion devices using controlled rectifying elements have been devised with various circuit configurations and put into practical use.
A typical example thereof is a three-phase thyristor bridge circuit, which is made up of six thyristors U, V, W, X, Y, and Z connected in series and parallel, as shown in FIG. This power conversion device can control the load voltage by controlling the firing angle of each thyristor while synchronizing it with the phase of the AC power supply, and converts forward between the three-phase AC power supply R, S, T and the load terminals P and N. By performing inverse conversion or by combining multiple units,
It can be used as a frequency converter or cycloconverter.

The phase control device that controls the firing angle of the control rectifier of such power conversion equipment has traditionally been constructed with analog circuits, but with the recent development of digital integrated circuit technology, it has been constructed digitally. In many cases, processing is required, and attempts have been made to integrate circuits using digital circuits, microcomputers, and the like.

FIG. 2 shows an example of a digital phase control device. In the figure, e _R , e _S , and e _T are three-phase signals that are in phase with the AC three-phase power supply voltages R, S, and T shown in FIG. The signal is converted into a signal θ and input to the digital phase control circuit 2. The digital phase control signal Ec input to this control circuit 2 is set by a digital circuit, computer, etc. in response to load fluctuations of the power converter, or in response to a preset standard (preprogram), etc.
The control signal CTL is the first bit signal.
This is a signal for performing bypass pair control, gate shift, gate blocking, etc. specific to the power converter shown in the figure. The digital phase control circuit 2 receiving these signals Ec and CTL transmits the ignition pulse signal TP at a predetermined timing.

When such a phase control device is applied to the power conversion device shown in Fig. 1, conventionally, a protection circuit that detects and responds to overcurrent or overvoltage is used to protect against abnormalities, or the device is A monitoring method has been adopted in which the phase control circuit and power converter are stopped and each part is checked using a measuring device, but in today's world where circuits have become more complex and integrated, such monitoring methods are no longer sufficient. There is now a need for a monitoring device that can monitor each component in a timely manner and can detect an abnormality before the protection circuit operates. In particular, in circuits such as microcomputers that are highly integrated and use elements operated by software, if an abnormality occurs inside the element and causes the program to malfunction, it must be prevented externally. First, a monitoring device for this purpose is absolutely necessary.

Therefore, as a monitoring device built into a phase control device, in addition to being able to monitor failures or pre-failure phenomena over a wide range, having a simple and compact circuit configuration, and having high reliability, the monitoring device Conditions are required such that if the phase control device itself fails, the failure will not spread to other parts of the phase control device.

The present invention aims to provide a phase control device equipped with a monitoring device that satisfies such conditions.

Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings.

In the embodiment of the device of the present invention _shown in _{FIG .} converted into digital phase signal θ, n
It is applied to the digital phase control circuit 2 together with the bit digital phase control signal Ec and the control signal CTL. In this circuit 2, a digital phase signal θ synchronized with the AC three-phase power supply voltage and a digital phase control signal
The ignition pulse TP is output by comparing each bit with Ec. Note that this ignition pulse TP also includes special control information such as bypass pair control using the control signal CTL, as in the case of FIG.

The monitoring device 3 includes the digital phase signal θ,
A synchronizing signal SYNC, which is output in synchronization with the electrical angle of the (e _R −e _S ) signal every 0° to 60°, and a firing pulse TP from the digital phase control circuit 2 are input.

As illustrated in FIG. 4, this monitoring device 3 is composed of an input port 6, a central processing unit 7, a storage device 8, a timer 9, and an output port 10, and the information on the ignition pulse TP is transmitted through the input port 6. The data is input to the central processing unit 7. Furthermore, the synchronization signal SYNC is input to the central processing unit as an interrupt signal, and serves as a start signal for the program (driver) driven by this signal. Programs and data are written in the storage device 8, and information is exchanged with it at appropriate times according to instructions from the central processing unit 7.

The timer 9 is a so-called watchdog timer, and exchanges information with the central processing unit 7, and when conditions are not met (for example,
Clear signal from central processing unit 7 within a certain period of time
CLER is not sent), the supervisory signal WDT is applied to the central processing unit 7 as an interrupt signal. The output port 10 is for transmitting information processed by the central processing unit 7 to the outside, and transmits the alarm signal WSGL and gate block signal WGB to the alarm circuit 4 and gate 5 shown in FIG.

The operation of the apparatus of the present invention configured as described above will be explained below.

When control starts when the device starts operating, the digital phase detector 1 applies an n-bit digital phase signal θ synchronized with the frequency of the power supply voltage to the digital phase control circuit 2. This phase control circuit 2 is n
The ignition pulse TP is determined by comparing the bit digital phase control signal Ec and the digital phase control signal θ.
Output. The output state of this ignition pulse TP is as illustrated in FIG. e _RS in c in the figure is the line voltage of the three-phase AC power supply voltages R and S in Figure 1. For example, the firing pulse of the thyristor V in Figure 1 is the firing pulse within the interval (1-2). TP must be output. In addition, the synchronizing signal SYNC of the n-bit digital phase signal θ is output every 60 degrees of electrical angle of the voltage e _RS , as shown in Figure b, and the firing pulse of the thyristor V is output in the interval (1 to 2). It is necessary to output between a and d of the corresponding synchronization signal SYNC. This is the same for other thyristors; for example, thyristor
It is necessary that the output be between ~d. usually,
In the case of FIG. 1, the firing pulses of the thyristor are output in the order of U→Z→V→X→W→Y, so the output of the firing pulse TP is as shown in FIG. 5a.
Therefore, for example, regarding the thyristor V, the firing pulse TP- corresponding to the thyristor V is generated within the time period in which synchronization signals a, b, c, and d of the synchronization signal SYNC are output.
An abnormality occurs if V is not output. Also, for example, if the firing pulse TP-V of thyristor V is output after the firing pulse TP-X of thyristor becomes.

Normally, the output of the ignition pulse TP is output to the thyristor gate in the order of U → Z → V → X → W → Y as described above, but when controlling the power converter in a specific mode, For example, when the series-connected thyristors U and The order will be different from normal. Therefore, when bypass pair operation is confirmed by a portion of the ignition pulse TP, the monitoring device 3 determines that it is normal that the ignition pulse TP is output in the bypass pair operation mode, and operates. When the bypass pair operation is canceled, the monitoring device 3 determines whether the cancellation has been performed correctly, and if the cancellation has been performed correctly, the monitoring device 3 monitors the normal operation from then on. In addition to the above-mentioned bypass pair operation, the monitoring device 3 has standards for determining whether or not the operation control specific to the power converter is normal, and if it is determined to be appropriate based on the ignition pulse TP signal. Continue normal monitoring operations.

Next, to explain the details of the operation of the monitoring device 3, at the same time as monitoring starts, the central processing unit 7 uses built-in registers, input/output ports 6, 10, storage device 8,
In order to initialize the timer 9, an initialization program is executed, and then the ignition pulse is generated by scanning (boring) the input port 6.
Check whether TP was output.

After the initialization program is executed, the first input ignition pulse TP causes the central processing unit 7 to:
Next, determine the ignition pulse TP signal to be output. That is, for example, the first input ignition pulse
Assuming that TP is a pulse that fires the thyristor Z, the central processing unit 7 outputs the synchronizing signal SYNC a, b, c, and d from the digital phase detector 1, as is clear from FIG. In the meantime, it is determined that the pulse for firing the thyristor V must be output as the firing pulse TP. Therefore, during the period when a, b, c, and d of synchronization signal SYNC are output, the firing pulse TP may output a pulse that is not a pulse for firing the thyristor V, or a pulse for firing the thyristor V may be output. If not, the central processing unit 7 controls the digital phase control circuit 2.
It is determined that an abnormality has occurred. In this case, the central processing unit 7 outputs the gate block signal WGB to the gate 5 to process the output of the ignition signal TP, and at the same time outputs the alarm signal WSGL to the alarm circuit 4.
is output to indicate that an abnormality has occurred in the digital phase control circuit 2.

When the ignition pulse TP is output without any abnormality, the central processing unit 7 sequentially checks whether the next ignition pulse TP is abnormal or not by polling. During this polling, if the synchronization signal SYNC is input as an interrupt, the central processing unit 7 temporarily suspends polling, and
Disables the next interrupt and sends a monitoring signal from timer 9.
A clear signal CLER is output so that the WDT is not output, the timer 9 is initialized, and the memory device 8
Counts up the synchronization counter assigned to . After this operation is completed, cancel the interrupt and execute the polling that was being executed before the synchronization signal SYNC was input.

After the initialization is completed, the timer 9 determines that an abnormality has occurred in the digital phase detector 1 if the synchronization signal SYNC, which should be input every time corresponding to 60 degrees of electrical angle in the power cycle, is not input. Outputs the monitoring signal WDT. Upon receiving this signal WDT, the central processing unit 7 recognizes an abnormality in the digital phase detector 1, sends the gate block signal WGB to the gate 5 to process the firing pulse TP, and sends the alarm signal WSGL to the alarm circuit 4 to detect the digital phase. The occurrence of an abnormality in device 1 is displayed.

Note that in the above, the synchronization signal SYNC, which is an interrupt signal, and the supervisory signal WDT, the former has a lower priority than the latter supervisory signal WDT, and if both signals are input at the same time, the supervisory signal WDT takes priority. .

The operation of the monitoring device 3 will be explained as follows based on the flowchart of FIG. First, at the start of monitoring, the internal state of the monitoring device 3 is initialized 11, and the presence or absence of an ignition pulse TP 12 is checked by polling. If there is an ignition pulse TP, it is determined 13 whether it has been output normally. If the output of the ignition pulse is normal, the ignition pulse to be output next is determined and this information is stored in the storage device, and when the synchronization signal TP is input next, this and the stored information are It is determined whether the ignition pulse TP is normal by comparing the two. If the ignition pulse TP is normal, send the gate block signal WGB to gate 5 and process the ignition pulse TP output.
14 to cause the alarm circuit 4 to output an alarm signal 15.

When the synchronization signal SYNC is input as an interrupt signal16, the next interrupt is prohibited17, and the clear signal CLER is set so that the monitor signal WDT is not output from the timer 9.
is output 18, the synchronous counter is counted up 19, and then the process returns to the process 20 that was being executed before the interrupt.

Also, the monitoring signal WDT is input as an interrupt signal.
21 Then, the output stop processing 22 of the ignition pulse TP is performed by the gate block signal WDG, and the alarm circuit 5 transmits the output 23 by the alarm signal WSGL.
Necessary phase control circuit processing 24 is performed.

FIG. 7 shows another embodiment of the device of the present invention. In this figure, the same parts as those in the embodiment shown in FIGS. 1 and 3 are denoted by the same reference numerals, and the explanation thereof will be omitted. In the embodiment of FIG. 7, a portion θ ₁ of the output signal from the digital phase detector 1 is arranged to be input to the input port 6 of the monitoring device 3 (FIG. 4). This signal θ ₁ is a synchronous signal
This is a signal for discriminating between signals a, b, c, and d of SYNC, and is therefore a signal indicating which thyristor in the power conversion device should be fired.
For example, in the example shown in FIG. 5, if signal a is output in synchronization with the input signal (e _R −e _S ) during normal times,
Since it is known in advance that it is necessary to output the firing signal TP to any of thyristors U, X, or V until the next signal b is output, the previous firing signal TP is If the signal is to fire the thyristor Y, the firing signal TP for firing the thyristor Y must be output after synchronization signal SYNC a is output, b and c are output, and before d is output. It can be determined that the in this way,
Part θ ₁ of the digital phase signal θ is expressed as shown in Fig. 7.
By inputting the signal into the monitoring device 3, there is an advantage that it is possible to determine whether or not the ignition pulse signal TP is normal at the same time as the monitoring starts.

In addition, in the above explanation, an example was described in which the present invention was applied from a three-phase thyristor bridge circuit to a phase control device of a power conversion device, but the present invention is not limited to this, and the program of the monitoring device 3 By changing input and output, it can also be applied to cycloconverters and self-excited inverter circuits. In addition, the input of the digital phase detector is not limited to three phases.
It may be single phase or polyphase.

As described above, in the present invention, a monitoring device including a central processing unit, a storage device, a timer, etc. is attached to the phase control circuit, so that if a failure occurs in the phase control circuit, the monitoring device is attached to the phase control circuit. It is possible to quickly perform troubleshooting and issue an alarm before the signal is output to the system and causes a malfunction, and it is possible to obtain a small and highly reliable phase control device with a built-in monitoring device. Further, the present invention can be applied to phase control devices of various power conversion devices by simply changing the input/output to/from the monitoring device or the software.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram illustrating a power conversion device configured with a three-phase thyristor bridge circuit, and FIG. 2 is a block diagram showing an outline of a conventional phase control device.
FIG. 3 is a block diagram showing an embodiment of the phase control device of the present invention, FIG. 4 is a block diagram showing an embodiment of the monitoring device in the device of the present invention, and FIGS. 5 and 6 show the operation of the present invention. FIG. 7 is a block diagram showing another embodiment of the apparatus of the present invention. 1...Digital phase detector, 2...Digital phase control circuit, 3...Monitoring device, 4...Alarm circuit,
5...Gate, 6...Input port, 7...Central processing unit, 8...Storage device, 9...Timer (watchdog), 10...Output port, θ...Digital phase signal, Ec...Digital phase Control signal,
CTL...control signal, TP...ignition pulse signal,
SYNC...Synchronization signal, CLEP...Clear signal,
WDT...Monitoring signal, WSGL...Alarm signal,
WGB...Gate block signal.

Claims (1)

[Claims] 1. A phase control device that digitally controls the phase of a power conversion device using a controlled rectifying element, including a digital phase detector that digitally detects a phase synchronized with a reference frequency, and a digital phase detector that digitally detects a phase synchronized with a reference frequency; Compare the digital phase signal θ of A digital phase control circuit that outputs a firing pulse signal TP, and a synchronization signal SYNC and a firing pulse signal TP that are generated every time the digital phase signal θ is given a predetermined number of times are input, and the synchronization signal SYNC is output every predetermined period. When the synchronization signal SYNC is not given, it is determined that the digital phase detector is malfunctioning, and the synchronization signal SYNC is
a monitoring device that determines that the digital phase control circuit is abnormal when the ignition pulse signal is not given even after counting a predetermined number of times; and an alarm signal WSGL and a gate block signal output from the monitoring device.
A phase control device consisting of an alarm device and a gate that operate based on WGB. 2. A patent characterized in that the monitoring device consists of an input/output port and a central processing unit, and a synchronization signal SYNC and a monitoring signal WDT from a watchdog timer are input to the central processing unit as interrupt signals. A phase control device according to claim 1. 3. The phase control device according to claim 2, wherein the supervisory signal WDT interrupts with higher priority than the synchronization signal SYNC. 4. The phase control device according to claim 1, wherein the digital phase signal is inputted not only to the digital phase control circuit but also to a monitoring device and used for detecting an abnormality in the ignition pulse signal.