JPS6298625A - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JPS6298625A
JPS6298625A JP23875885A JP23875885A JPS6298625A JP S6298625 A JPS6298625 A JP S6298625A JP 23875885 A JP23875885 A JP 23875885A JP 23875885 A JP23875885 A JP 23875885A JP S6298625 A JPS6298625 A JP S6298625A
Authority
JP
Japan
Prior art keywords
film
passivation film
nitrogen
hydrogen
deposited
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP23875885A
Other languages
Japanese (ja)
Other versions
JPH0783020B2 (en
Inventor
Koji Yamazaki
孝二 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP60238758A priority Critical patent/JPH0783020B2/en
Publication of JPS6298625A publication Critical patent/JPS6298625A/en
Publication of JPH0783020B2 publication Critical patent/JPH0783020B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To effectively avoid any abnormal fluctuation with time in gate threshold value voltage by a method wherein a passivation film extremely stabilized for heat-treatment is provided. CONSTITUTION:Within a passivation film of two layer composition, a lower layer 11 near a semiconductor element is formed of a plasma CVD processed film not containing hydrogen H2 deposited with disilicon hexafluoride Si2F6 and nitrogen N2 as mixed gas while an upper layer 12 is formed of another plasma CVD processed film containing H2 deposited with said Si2F6, N2 and H2 as mixed gas with Si and N2 firmly coupled with each other forming stabilized composition subject to high deposition speed. Through these procedures, this passivation film can be prevented from discharging H2 into the semiconductor element in the depositing process of both lower and upper layers doing damage to the same.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は半導体装置に関し、特に信頼性の高いパッシベ
ーション膜を備えた半導体装置の構造に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a semiconductor device, and particularly to a structure of a semiconductor device including a highly reliable passivation film.

(従来の技術) 半導体装置のパッシベーション膜または層間絶縁膜には
、通常、二酸化シリコン(Sift)、窒化シリコン(
Si3N4)または燐硅酸ガラス(PSG)などが用い
られるが、信頼性を重んするものには窒化シリコン膜が
多用される。この窒化シリコン膜は、従来、モノシラン
(si)i4)とアンモニア(NHs)または窒素(N
、)を混合ガスとするプラズマ化学気相成長膜によって
形成される。すなわち、これらのガスを低温(200〜
3so’c)、低圧(10からl torr以下)下で
反応させた場合の堆積膜が通常用いられている。
(Prior Art) A passivation film or an interlayer insulating film of a semiconductor device usually contains silicon dioxide (Sift) or silicon nitride (Sift).
Si3N4) or phosphosilicate glass (PSG) is used, but a silicon nitride film is often used when reliability is important. This silicon nitride film has conventionally been made using monosilane (si) i4) and ammonia (NHs) or nitrogen (N
, ) is formed by plasma chemical vapor deposition using a mixed gas. That is, these gases are heated at low temperatures (200~
3 so'c), deposited films reacted under low pressure (10 to 1 torr or less) are commonly used.

(発明が解決しようとする問題点) この膜は800″C以上の高温で成長したものより厚膜
が得られ、しかもクラックの発生が少ないなどの利点を
もつが、その膜内には主成分のシリコン(Sj)および
窒素(N、)の他にこれらと水素(H2)とが結合した
(Si−H)および(N−)i)が含まれ不安定な組成
を形成しているので、堆積中およびその後のアロイ、組
立またはアニール工程の高温処理(450〜500°C
)で水素を放出し半導体素子の特性を劣化せしめる欠点
も併せ有している。このことは半導体素子がMOS形の
電界効果トランジスタの場合大きな影響を受け、例えば
、1981年1月刊行の学術雑誌、「Trans−クシ
甲ン   エレクト四ン   テハイセスact+on
 Electron Devices  (VOL、E
D−28゜スレツV、ルド   ポルテイジ  インm
1)Jacj載の論文rThreshold Volt
age In −スタビリテイ   イン  モス  
エフイーティ デエー ツー チャンネル5tabil
ity  in MOS−F E T due to 
Channelソノパッシベーション膜は動作中のゲー
トしきい値電圧に異常変動を生せしめるようになる。
(Problems to be Solved by the Invention) This film has advantages such as being thicker than those grown at high temperatures of 800"C or higher, and having fewer cracks. In addition to silicon (Sj) and nitrogen (N, ), it contains (Si-H) and (N-)i, which are bonded with hydrogen (H2), forming an unstable composition. High temperature processing (450-500°C) during deposition and subsequent alloying, assembly or annealing steps
), which also has the disadvantage of releasing hydrogen and deteriorating the characteristics of semiconductor devices. This is greatly affected when the semiconductor element is a MOS type field effect transistor, and for example, an academic journal published in January 1981, ``Trans
Electron Devices (VOL,E
D-28゜Thretsu V, Ludo Portage Inn m
1) Paper published by Jacj rThreshold Volt
age in - stability in moss
EFT Day Two Channel 5tabil
ity in MOS-FET due to
The channel sonopassivation film causes abnormal fluctuations in the gate threshold voltage during operation.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、上記の状況に鑑み、堆積およびその後
の高温処理工程で水素を放出し半導体素子を傷めること
なきプラズマ化学気相成長の窒化シリコン膜からなるパ
ッシベーション膜を備えた半導体装置を提供することで
ある。
In view of the above circumstances, an object of the present invention is to provide a semiconductor device equipped with a passivation film made of a silicon nitride film grown by plasma chemical vapor deposition, which does not release hydrogen during deposition and subsequent high-temperature treatment steps and damage semiconductor elements. It is to be.

〔発明の構成〕[Structure of the invention]

本発明の半導体装置は、半導体基板と、前記半導体基鈑
−ヒに形成される半導体素子と、六フッ化ニケイ累(S
i2 Fs)と窒素(N2)および六フッ化ニケイ素(
Si2 Fg)と窒素(N、)、水素(H8)をそれぞ
れ混合ガスとするプラズマ化学気相成長膜を下層および
上層にそれぞれ堆積する2層の窒化シリコン膜とを含む
The semiconductor device of the present invention includes a semiconductor substrate, a semiconductor element formed on the semiconductor substrate, and silicon hexafluoride (S).
i2 Fs), nitrogen (N2) and silicon hexafluoride (
The silicon nitride film includes two layers of silicon nitride films deposited as a lower layer and an upper layer, respectively, with plasma chemical vapor deposition films using mixed gases of Si2Fg), nitrogen (N, ), and hydrogen (H8), respectively.

(問題点を解決するだめの手段) すなわち、本発明によれば、パッジベージ盲ン膜は2層
構造とされ、半導体素子に近い下層は六フッ化二ケイ素
(Six Fs)と窒素(Nz)を混合ガスとして堆積
した水素(H2)を含まないプラズマ化学気相成長膜に
より、また、上層は六フッ化二ケイ素(Si、 Fa)
、窒素(N富)および水素(H鵞)を混合ガスとして堆
積した水素(H8)を含むがケイ素(8i)および窒素
(N2)と強く結合して安定な組成を形成し且つ大きな
堆積速度をもつプラズマ化学気相成長膜によシそれぞれ
構成される。
(Means for Solving the Problem) That is, according to the present invention, the padgage blind film has a two-layer structure, and the lower layer near the semiconductor element contains disilicon hexafluoride (Six Fs) and nitrogen (Nz). Due to the plasma chemical vapor deposition film that does not contain hydrogen (H2) deposited as a mixed gas, the upper layer is made of disilicon hexafluoride (Si, Fa).
, containing hydrogen (H8) deposited as a mixed gas of nitrogen (N-rich) and hydrogen (H-rich), which combines strongly with silicon (8i) and nitrogen (N2) to form a stable composition and has a high deposition rate. Each is composed of a plasma-enhanced chemical vapor deposition film.

(作用) 従って、このパッシベーション膜は下層および上層の何
れの堆積工程においても半導体素子に水素を放出してこ
れを傷めることはない。すなわち半導体素子は下層が堆
積されている間水素を含む雰囲気に全くB養されておら
ず、また、上層を堆積する間の水素を含む雰囲気の素子
への浸透はこの下層によって阻止される。更にその後行
われるアロイ、組立およびアニールなど400°Cを超
える高温処理工程に際しても、下層膜は元々水素を含ん
でおらず、また、上層膜は組成が安定していて水素を容
易に放出しないので、製造プロセスの類例なる段階にお
いても半導体素子内部に水素を入シ込ませることはない
。すなわち、従来のパッシベーション膜の如く動作中の
MO8電界効果トランジスタのゲートしきい値電圧に異
常変動を生せしめることが非常に小さい。以下図面を参
照して本発明の詳細な説明する。
(Function) Therefore, this passivation film does not release hydrogen to the semiconductor element and damage it in either the lower layer or upper layer deposition process. That is, the semiconductor device is not exposed to any hydrogen-containing atmosphere during the deposition of the lower layer, and the penetration of the hydrogen-containing atmosphere into the device during the deposition of the upper layer is prevented by this lower layer. Furthermore, even during subsequent high-temperature processing steps exceeding 400°C such as alloying, assembly, and annealing, the lower layer film does not originally contain hydrogen, and the upper layer film has a stable composition and does not easily release hydrogen. , no hydrogen is allowed to enter the inside of the semiconductor device even at any similar stage of the manufacturing process. That is, unlike the conventional passivation film, it is extremely unlikely to cause abnormal fluctuations in the gate threshold voltage of the MO8 field effect transistor during operation. The present invention will be described in detail below with reference to the drawings.

(実施例) 第1図は本発明をM08%、界効果トランジスタに実施
した場合の一実施例を示す断面構造図である。本実施例
では、P形シリコン基板1と、厚膜のフィールド酸化膜
2と、ソースおよびドレインをそれぞれ形成するn 領
域3および4と、ゲート絶縁膜5と、多結晶シリコンケ
ート電極6と、+ チャネル・ストッパーを形成するP 層7と、アルミ配
線導体および9と、酸化シリコン絶縁膜10と、下層お
よび上層のパッシベーション膜をそれぞれ形成する異な
る窒化シリコン膜質のプラズマ化学気相成長膜11およ
び12とを含む。
(Example) FIG. 1 is a cross-sectional structural diagram showing an example in which the present invention is applied to an M08% field effect transistor. In this embodiment, a P-type silicon substrate 1, a thick field oxide film 2, n-type regions 3 and 4 forming a source and a drain, respectively, a gate insulating film 5, a polycrystalline silicon gate electrode 6, A P layer 7 forming a channel stopper, an aluminum wiring conductor 9, a silicon oxide insulating film 10, and plasma chemical vapor deposition films 11 and 12 of different silicon nitride film quality forming lower and upper passivation films, respectively. including.

ここで、下層プラズマ化学気相成長膜11の堆積には六
フッ化二ケイ素(Six Fll)と窒素(Nりとを例
えば流量比1:12で混合した圧力0.8torrの混
合ガスが、また、上層プラズマ化学気相成長膜12の堆
積には六フッ化二ケイ素(5ixFs)窒素(Nりおよ
び水素(H2)を例えば流量比1:14:18で混合し
た圧力1.4 torrの混合ガスがそれぞれ使用され
る。この際水素の流量を適宜変えてもよい。これらの混
合ガスは反応室内に順次導かれウェハの酸化シリコン絶
縁膜10上にそれぞれの成長膜を堆積させる。このとき
使用されるプラズマ化高周波電力密度はそれぞれ0.6
W/cttFおよび0.8 W/cn?、基板設定温度
はそれぞれ350°Cおよび390°Cである。
Here, for the deposition of the lower plasma chemical vapor deposition film 11, a mixed gas of disilicon hexafluoride (SixFll) and nitrogen (N) at a pressure of 0.8 torr is used, for example, at a flow rate ratio of 1:12. For the deposition of the upper plasma chemical vapor deposition film 12, a mixed gas of disilicon hexafluoride (5ixFs), nitrogen (N), and hydrogen (H2) at a pressure of 1.4 torr is used, for example, at a flow rate ratio of 1:14:18. are used. At this time, the flow rate of hydrogen may be changed as appropriate. These mixed gases are sequentially introduced into the reaction chamber to deposit each growth film on the silicon oxide insulating film 10 of the wafer. The high-frequency power density for plasma generation is 0.6, respectively.
W/cttF and 0.8 W/cn? , the substrate set temperatures are 350°C and 390°C, respectively.

スペクトル分析の結果によれば下層の気相成長膜11に
は(Si−N)結合による吸収スペクトルが、また、上
層の気相成長膜12には(Si−N)および(N−H)
の2つの結合による吸収スペクトルがそれぞれ現われ、
(Si−F)および(N−F)結合によるものは(Si
 −N )結合による吸収スペクトルにかくされる。従
って、これらの堆積膜は何れも窒化シリコンから成るも
のである。更にオージェ電子公党測定の結果によれば、
シリコン(Sl)および窒素(N)以外にもフッ素(F
)が何れの換向にも含まれ(8i −N)および(N−
H)の結合を強化するよう作用するので、熱処理工程で
水素を放出することなくきわめて安定した膜質であるこ
とを示す。元来、気相成長膜11は水素を含んでおらず
熱的にきわめて安定した組成をもつものであるが、ただ
、水(N20 )との間に僅かながら反応を示す膜質で
もあるので、この欠点を補うように膜12を成長させ2
層構造としたパッシベーション膜は堆積工程中はもとよ
シその後の450°Cを超える高温処理工程で半導体素
子内に水素を入シ込ませることは殆んどない。この膜質
の特長は次の実験からも確かめ得る。
According to the results of the spectral analysis, the lower layer vapor growth film 11 has an absorption spectrum due to (Si-N) bonds, and the upper layer vapor growth film 12 has absorption spectra due to (Si-N) and (N-H) bonds.
Absorption spectra due to the two combinations of , respectively, appear,
(Si-F) and (N-F) bonds are (Si-F) and (N-F) bonds.
-N) is hidden in the absorption spectrum due to the bond. Therefore, all of these deposited films are made of silicon nitride. Furthermore, according to the results of Auger Electronic Public Party measurement,
In addition to silicon (Sl) and nitrogen (N), fluorine (F
) is included in any conversion, (8i −N) and (N−
Since it acts to strengthen the bonds of H), it is shown that the film has extremely stable film quality without releasing hydrogen during the heat treatment process. Originally, the vapor-phase grown film 11 does not contain hydrogen and has a very thermally stable composition, but it also has a film quality that slightly reacts with water (N20). The film 12 is grown to compensate for the defects 2
A layered passivation film hardly allows hydrogen to enter the semiconductor element during the deposition process or during the subsequent high-temperature treatment process exceeding 450°C. The characteristics of this film quality can also be confirmed from the following experiment.

すなわち、第2図は本発明パッシベーション膜の高温雰
囲気に対する実効的表面電荷密度の変化模様を従来膜と
の比較によって示す一実側図である。試料には本発明に
かかる気相成長膜および従来法による気相成長膜をそれ
ぞれ絶縁体とするMIs形ダイオードAおよびBが、ま
た、高温雰囲気には温度500°Cの高温窒素雰囲気が
それぞれ準備される。2つの試料はこの雰囲気内に20
分間放置され実効的表面電荷密度(ρ/−)の変化はこ
の前後の時刻tl、t、における容量−電圧特性の変化
から計算によシ求められる。第2図よシ明らかなように
ダイオードAの容量−電圧特性は高温雰囲気内に置かれ
る前後で殆んど変化しない。
That is, FIG. 2 is a side view showing how the effective surface charge density of the passivation film of the present invention changes in a high-temperature atmosphere in comparison with a conventional film. MIs type diodes A and B each having a vapor-phase grown film according to the present invention and a conventional vapor-grown film as insulators were prepared as the samples, and a high-temperature nitrogen atmosphere with a temperature of 500°C was prepared as the high-temperature atmosphere. be done. The two samples were placed in this atmosphere for 20
The change in effective surface charge density (ρ/-) after being left for a minute can be calculated from the change in capacitance-voltage characteristics at times tl and t before and after this. As is clear from FIG. 2, the capacitance-voltage characteristics of diode A hardly change before and after being placed in a high temperature atmosphere.

すなわち、本発明パッシベーション膜は高温処理に対し
きわめて安定な膜質をもち処理前後において実効的表面
電荷密度を殆んど変化させない。従って、MO8電界効
果トランジスタに用いると、従来膜じていた動作中にお
けるゲートしきい1[圧の異常変動問題を解決すること
ができる。
That is, the passivation film of the present invention has extremely stable film quality against high-temperature treatment, and the effective surface charge density hardly changes before and after the treatment. Therefore, when used in MO8 field effect transistors, it is possible to solve the conventional problem of abnormal fluctuations in gate threshold voltage during operation.

第3図は本発明をMO8電界効果トランジスタに実施し
た場合の動作中におけるゲートしきい値電圧の変動状況
を従来との比較によって示す一実測図である。第3図よ
り明らかなように、本発明を実施したん108z界効果
トランジスタのゲートしきい値変動特性Iは従来の変動
特性■に比較し変動量および傾度が共に小さく改善の程
度はきわめて顕著である。
FIG. 3 is an actual measurement diagram illustrating how the gate threshold voltage fluctuates during operation when the present invention is applied to an MO8 field effect transistor in comparison with a conventional transistor. As is clear from FIG. 3, when the present invention is implemented, the gate threshold fluctuation characteristic I of the 108z field effect transistor has both a smaller amount of fluctuation and a smaller slope than the conventional fluctuation characteristic ■, and the degree of improvement is extremely remarkable. be.

本発明のパッシベーション膜は2層構造をとるので生産
工程をやや複雑化する難点はあるが、上層のプラズマ化
学気相成長膜12の堆積速度がきわめて速いので生産コ
ストを特に押しあげることはない。すなわち、六フッ化
二ケイ素(SizFs)は分解し易いので堆積速度は4
00A/minと速〈従来の四フフ化ケイ素(SiFi
)、窒素(N2)および水素(N2)を混合ガスとした
ものの堆積速度150A/m1nK比べ著しく高速であ
る。また比較的速いとされる二フフ化ケイ素(SiF、
)を用いた250A/minに比べても遥かに高速であ
るので、その膜質の優秀性と相俟って生産工程上特に問
題となることはない。
Since the passivation film of the present invention has a two-layer structure, it has the drawback of complicating the production process a little, but since the deposition rate of the upper layer plasma chemical vapor deposition film 12 is extremely fast, it does not particularly increase the production cost. In other words, disilicon hexafluoride (SizFs) is easily decomposed, so the deposition rate is 4
00A/min speed (conventional silicon tetrafluoride (SiFi)
), the deposition rate is significantly higher than that of a mixed gas of nitrogen (N2) and hydrogen (N2), which is 150 A/m1nK. In addition, silicon difluoride (SiF), which is said to be relatively fast,
), the speed is much higher than the 250 A/min using the 250 A/min, and combined with the excellent film quality, there is no particular problem in the production process.

〔発明の効果〕〔Effect of the invention〕

以上詳細に説明したように、本発明半導体装置は熱処理
に対してきわめて安定したパッシベーション膜を備え、
従来の如く水素を放出して半導体素子を傷めることがな
いので、超LSIの如き微細半導体装置の信頼性を顕著
に向上せしめ得る。
As explained in detail above, the semiconductor device of the present invention includes a passivation film that is extremely stable against heat treatment,
Since hydrogen is not emitted and the semiconductor elements are not damaged as in the conventional method, the reliability of fine semiconductor devices such as VLSIs can be significantly improved.

特にMO81jL界効果トランジスタに実施すれば経時
的に起こるゲートしきい値電圧の異常変動現象をきわめ
て有効に解決することかり能である。
In particular, if applied to the MO81jL field effect transistor, it will be possible to very effectively solve the phenomenon of abnormal fluctuations in gate threshold voltage that occur over time.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明をMO8tO8電界効果トランジスタし
た場合の一実施例を示す断面構造図、第2図は本発明パ
ッシベーション膜の高温雰囲気に対する実効的表面電荷
密度の変化模様を従来膜との比較によってボす一央測図
、第3図は本発明をMO8電界効果トランジスタに実施
した場合の動作中におけるゲートしきい値゛電圧の変動
状況を従来との比較によって示す一実測図である。 1・・・・P形シリコン基板、2・・・・・・厚膜のフ
ィールド酸化膜、3および4・・・・・・ソースおよび
ドレイ+ ンをそれぞれ形成するn 領域、5・・・・・・ゲート
絶縁膜、6・・・・・・多結晶シリコンゲート電極、7
・・・・・・+ チャネル・ストッパーを形成するP 層、8,9・・・
・・・アルミ配線導体、10・・・・・・酸化シリコン
絶縁膜、11および12・・・・・・下層および上層の
パッシベーション膜をそれぞれ形成する異なる窒化シリ
コン膜質のプラズマ化学気相成長膜、AおよびB・・・
・・本発明にかかる気相成長膜および従来法による気相
成長膜を絶縁体とするMIS形ダイオード、■・・・・
・本発明によるkO8fi界効果トランジスタのゲート
しきい値変動特性、■・・・・・・従来MO8電界効果
トランジスタのゲートしきい値変動特性、■?・・・・
・・ゲートしきい値電圧。 代理人 弁理士  内 原   音 87囚
Fig. 1 is a cross-sectional structural diagram showing an example of a MO8tO8 field effect transistor according to the present invention, and Fig. 2 shows a change in the effective surface charge density of the passivation film of the present invention in a high-temperature atmosphere by comparing it with a conventional film. FIG. 3 is an actual measurement diagram illustrating fluctuations in gate threshold voltage during operation when the present invention is applied to an MO8 field effect transistor in comparison with a conventional one. 1...P type silicon substrate, 2...Thick field oxide film, 3 and 4...N region forming source and drain, respectively, 5... ...Gate insulating film, 6...Polycrystalline silicon gate electrode, 7
・・・・・・+ P layer forming channel stopper, 8, 9...
. . . Aluminum wiring conductor, 10 . A and B...
... MIS type diode using the vapor-phase grown film according to the present invention and the vapor-grown film by the conventional method as an insulator, ■...
- Gate threshold variation characteristics of the kO8fi field effect transistor according to the present invention, ■... Gate threshold variation characteristics of the conventional MO8 field effect transistor, ■?・・・・・・
...Gate threshold voltage. Agent Patent Attorney Oto Uchihara 87th prisoner

Claims (1)

【特許請求の範囲】[Claims] 半導体基板と、前記半導体基板上に形成される半導体素
子と、六フッ化二ケイ素(Si_2F_6)と窒素(N
_2)および六フッ化二ケイ素(Si_2F_6)と窒
素(N_2)、水素(H_2)をそれぞれ混合ガスとす
るプラズマ化学気相成長膜を下層および上層にそれぞれ
堆積した2層窒化シリコン膜とを含むことを特徴とする
半導体装置。
A semiconductor substrate, a semiconductor element formed on the semiconductor substrate, disilicon hexafluoride (Si_2F_6) and nitrogen (N
_2) and a two-layer silicon nitride film in which plasma chemical vapor deposition films using disilicon hexafluoride (Si_2F_6), nitrogen (N_2), and hydrogen (H_2) as mixed gases are deposited as the lower and upper layers, respectively. A semiconductor device characterized by:
JP60238758A 1985-10-24 1985-10-24 Semiconductor device Expired - Fee Related JPH0783020B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60238758A JPH0783020B2 (en) 1985-10-24 1985-10-24 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60238758A JPH0783020B2 (en) 1985-10-24 1985-10-24 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS6298625A true JPS6298625A (en) 1987-05-08
JPH0783020B2 JPH0783020B2 (en) 1995-09-06

Family

ID=17034826

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60238758A Expired - Fee Related JPH0783020B2 (en) 1985-10-24 1985-10-24 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0783020B2 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS554918A (en) * 1978-06-26 1980-01-14 Hitachi Ltd Passivation film structure and manufacturing method thereof
JPS58207640A (en) * 1982-05-28 1983-12-03 Fujitsu Ltd Manufacture of semiconductor device
JPS6057635A (en) * 1983-09-08 1985-04-03 Nec Corp Semiconductor device
JPS6097628A (en) * 1983-11-01 1985-05-31 Matsushita Electronics Corp Manufacture of semiconductor device
JPS60107841A (en) * 1983-11-16 1985-06-13 Hitachi Ltd Formation of silicon nitride film

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS554918A (en) * 1978-06-26 1980-01-14 Hitachi Ltd Passivation film structure and manufacturing method thereof
JPS58207640A (en) * 1982-05-28 1983-12-03 Fujitsu Ltd Manufacture of semiconductor device
JPS6057635A (en) * 1983-09-08 1985-04-03 Nec Corp Semiconductor device
JPS6097628A (en) * 1983-11-01 1985-05-31 Matsushita Electronics Corp Manufacture of semiconductor device
JPS60107841A (en) * 1983-11-16 1985-06-13 Hitachi Ltd Formation of silicon nitride film

Also Published As

Publication number Publication date
JPH0783020B2 (en) 1995-09-06

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