JPS629666A - Semiconductor device - Google Patents

Abstract

PURPOSE:To make higher density, by employing as a capacitor a three-layer structure consisting of a silicon oxide layer, a metal oxide layer, and a metal nitride layer containing a constituting element of metal or a metal nitride layer containing oxygen atoms and a constituting element of metal. CONSTITUTION:A three-layer capacitor film consisting of a silicon oxide film 5, a niobium oxide film 6a, and a niobium nitride film 7a is formed on a P-type silicon substrate 1. Even if polycrystalline silicon is employed for an opposing electrode 8, it is the niobium nitride film 7a that the polycrystalline silicon contacts, so the silicide reaction of the polycrystalline silicon can be suppressed. In this way, since the leak current can be reduced and the silicon oxide film 5 and the niobium nitride film 7a can be formed thin, the dielectric constant of the niobium oxide film 6a and thus the capacitance per unit area can be made large.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a semiconductor device, and particularly relates to the structure of a capacitor constituting the semiconductor device.

[Conventional technology]

Dynamic RAM (Ramdom Access
In a semiconductor device having a capacitor as a component such as a memory, it is important to reduce the area of the capacitor as much as possible in order to increase the density of the semiconductor device.

In order to reduce the area occupied by the capacitor and obtain a large capacitance value, attempts have been made to construct a structure using a gold F4 plate having a high dielectric constant as a dielectric material.

In particular, a two-layer structure of a silicon oxide film and a metal oxide film is considered as a structure with relatively low leakage current.

[Problem that the invention seeks to solve]

When incorporating the conventional capacitive structure described above into an actual memory cell, polycrystalline silicon is used as the counter electrode.

It is necessary to use molybdenum silicide, titanium silicide, etc., but when heat treatment is performed after forming these electrodes, the gold ah-oxide film, which is the upper layer of the above-mentioned two-layer structure film, causes a silicide reaction with the counter electrode. A major drawback is that the leakage current of the capacitive structure increases.

The present invention has been made to eliminate the above-mentioned drawbacks, and even when a gold 114m film is used as the mold material and polycrystalline silicon, molybdenum silicide, titanium silicide, etc. An object of the present invention is to provide a capacitor in which leakage current is suppressed and an increase in leakage current is suppressed, and a semiconductor device having this capacitor.

[Means for solving problems]

The semiconductor device of the present invention is a semiconductor device in which a capacitor is formed on the surface of a semiconductor substrate or a polycrystalline silicon layer, and the dielectric layer of the capacitor is a silicon oxide layer in contact with the semiconductor substrate or the polycrystalline silicon layer; A semiconductor device comprising three layers: a metal oxide layer in contact with the silicon oxide layer, and a metal nitride layer in contact with the metal oxide layer and having the metal as a constituent element. The capacitance structure has a structure in which a metal nitride layer containing the metal as a constituent is formed on top of the conventionally reported three-layer structure of a silicon oxide layer and a metal oxide layer. Yes, that gold II! & Total 1At by forming a nitride layer
IjL compound layer and polysilicon.

Silicide reactions with counter electrodes such as warped butene silicide and tantalum silicide can be suppressed.

In addition, as the metal constituting the agglomerate and nitride, titanium, niobium, zirconium, and hihafnium separated by 3s are suitable, and the metal nitride layer may contain oxygen atoms with the same effect. can get.

〔Example〕

Next, embodiments of the present invention will be described using the drawings.

FIG. 1 is a sectional view of a main part showing a first embodiment of the present invention. In FIG. 1, 1 is a P-type silicon substrate, 5 is a silicon oxide film * 6 a n niobium oxide film.

7Ati niobium nitride film and these silicon ruggedized films.

A three-layered niobium oxide film and a niobium nitride film form a sacrificial film. 8 is polycrystalline silicon as a counter electrode of the capacitor.

The method for forming the three-layer structure of the silicon oxide film, the niobium oxide film, and the nitride film is not particularly limited, but the following method may be used.

First, a thin silicon oxide film is formed using a thermal oxidation method. Niobium is deposited thereon by sputtering and thermally oxidized to form a two-layer structure of a silicon oxide film and a niobium oxide film. Further, the two-layer structure film is subjected to nitrogen treatment or ammonia treatment. Alternatively, a niobium nitride film can be formed on the upper layer of the two-layer structure film (by a method such as nitrogen treatment in L1 plasma or ammonia treatment in plasma).

Even when polycrystalline silicon is used as the three-layer film and counter electrode constructed in this way, the niobium nitride film is in contact with the polycrystalline silicon, so that the crystalcide reaction of the polycrystalline silicon can be suppressed.

Therefore, the capacitive structure tlX IJ-
The current is small, and silicon oxide sI5 and niobium nitride 1[7a] can be formed thinly, so niobium oxide $6
aO@Using the feature of large electrical conductivity, unit area ab
The structure has a large capacitance value.

FIG. 21 is a sectional view of a main part showing a second embodiment of the present invention. In Fig. 2, a laP type silicon substrate, a 5x silicon oxide film, 6b a zirconium oxide film, 7b a Fi zirconium nitride film, and 8 a polycrystalline silicon film. ! A trench is dug in the silicon substrate, and a silicon oxide film 5, a zirconium oxide film 6b, and a zirconium nitride film 7b are formed in the trench.
It forms a three-layer structure film.

The method for forming the three-layer structure a is not particularly limited, but the following method may be used as an example. First, a thin silicon oxide film with a thickness of several tens of angstroms is formed on silicon having grooves by thermal oxidation. Dihafnium is deposited thereon by sputtering, and by thermally dissipating this, a two-layer structure of a silicon oxide layer and a zirconium oxide group is formed. Further, the three-layer structure film is subjected to nitrogen treatment or ammonia treatment. Alternatively, a zirconium nitride film can be formed on the two-layer structure film by a method such as nitrogen treatment in plasma or ammonia treatment in plasma. Even when polycrystalline silicon is used as the counter electrode, the zirconium nitride film is in contact with the special silicon, so the silicide reaction of zirconium can be suppressed.

Therefore, the capacitor structure shown in this embodiment has the characteristics that the leakage current is small and the zirconium oxide film 6b12)@111 ratio is high because the silicon densified lK5 and zirconium nitride film 7b can be formed thinly. This structure has a large capacitance value per unit area. Furthermore, in this embodiment, by forming a capacitance part in the key part, the capacitance value per unit area of the silicon surface is further increased.

3rd rI4Fi is a sectional view of a main part showing a third embodiment of the present invention, and is a dynamic RAM with an n-channel MO8 structure.
shows a cross section of a memory cell. In Figure 3, %
1 is a P-type silicon substrate, 2 is a field oxide film separating the device regions, 3 and 4 are high concentration impurity regions, 5 is a silicon oxide film, 6a is a niobium nitride film*7a is a Fi niobium nitride film, and these silicon The capacitive film of the memory cell is formed of three layers: an oxide film, a niobium oxide film, and a niobium nitride film. 8 polycrystalline silicon serves as a counter electrode of the oxide capacitance, 9 is a gate oxide film, and 10 is a transfer gate (
polycrystalline silicon that plays the role of a word line (word line).

11 is a silicon oxide film as an insulating layer. Even if polycrystalline silicon is used for the capacitance ah counter electrode of the three-layer structure described above, the leakage current may be small. This film has a large capacitance value per unit area, taking advantage of its high dielectric constant. Therefore, the dynamic RAM of this embodiment having such a three-layer film in the capacitor part can use polycrystalline silicon for the capacitor's counter electrode, and can also achieve high density.

FIG. 4 is a sectional view of a main part showing a fourth embodiment of the present invention, and shows a cross section of a memory cell of a dynamic RAM having an sn channel MO8 structure. In Figure 4, 1 is P
2 is a field oxide film separating device regions, 3 and 4 are high concentration impurity regions, 5 is a silicon oxide film, 6b is a zirconium densified film, and 7b is a zirconium nitride film.

Reference numeral 8 denotes polycrystalline silicon, 9 a gate oxide film, 10 heavy silicon serving as a word line, and a silicon oxide film serving as a 111Ii insulating layer. In this example, a groove is dug in a 9P type silicon substrate by a reactive ion etching method or the like, and a three-layer structure film consisting of a 7 silicon oxide film 5, a zirconium oxide film 6b, and a zirconium nitride film 7b is formed in this groove. It constitutes the capacitor section. Therefore, in this example, 11
The area occupied by the capacitive part on the surface of the 7-recon can be further reduced without reducing the capacitance value of the capacitive part of the dynamic RAM memory cell.
The degree of integration can be further increased.

In the fourth to fourth embodiments, the capacitor structure has a three-layer structure consisting of a silicon oxide film, a niobium oxide film and a niobium nitride film, or a three-layer structure consisting of a silicon oxide film, a zirconium oxide film and a zirconium nitride film. As explained above, a three-layer structure consisting of a silicon oxide film, a titanium oxide film, and a titanium nitride film, or a three-layer structure consisting of a silicon oxide film, a hafnium & oxide film, and a hafnium nitride film is applied to the capacitor structure. A similar effect occurs.

Furthermore, although the same metal was used as the metal oxide and nitride in the above embodiments, different metals may be used as long as they are selected from the above metals.

[The fruits of invention]

As explained above, the semiconductor device according to the present invention is provided.

A three-layer structure consisting of a silicon oxide layer as a capacitor, a metal oxide layer, and a metal nitride layer containing the metal as a constituent or a metal nitride layer containing oxygen atoms and containing the metal 1r:* as a constituent. By using this, polycrystalline silicon, molybdenum silicide, titanium silicide, etc., which are commonly used in the manufacturing process of semiconductor devices, can be used as the counter electrode of the capacitor, and the Since the capacitance value is large, it has the effect of increasing the density of semiconductor devices.

[Brief explanation of drawings]

Fig. 1 is a cross-sectional view of essential parts showing an embodiment of the butterbur of the present invention, 82
The figure is a cross-sectional view of a main part showing a second embodiment of the present invention, FIG. 3 is a cross-sectional view of a main part of a dynamic RAM memory cell showing a third embodiment of the present invention, and FIG. FIG. 4 is a cross-sectional view of a main part of a memory cell of a dynamic RAM showing a fourth embodiment. l...°°°P-type silicon substrate, 2... thick silicon plated film, 3... nu impurity region, 4...
...D-type impurity region, 5 ... silicon oxide film, 6a ... niobium nitride film niobium nitride film, 7b ... zirconium nitride film,
8...Polycrystalline silicon, 9...Gate oxide film, 10°...Polycrystalline silicon (word line), 11...Silicon oxide film. Mine 1 (branch) Saki 2 Kiri Mine 3V

Claims (3)

[Claims] (1) In a semiconductor device in which a capacitor is formed on the surface of a semiconductor substrate or a polycrystalline silicon layer, the dielectric layer of the capacitor is a silicon oxide layer in contact with the semiconductor substrate or polycrystalline silicon layer, and the silicon oxide layer 1. A semiconductor device comprising three layers: a metal oxide layer that is in contact with the metal oxide layer, and a metal nitride layer that is in contact with the metal oxide layer and has the metal as a constituent element. (2) The semiconductor device according to claim (1), wherein the metal nitride layer is a metal nitride layer containing oxygen atoms. (3) Claim (1) or (2), wherein the metal constituting the metal oxide or metal nitride is a metal selected from the group consisting of titanium, niobium, zirconium, and hafnium. semiconductor devices.