JPS6295640A - Device maintenance system - Google Patents

Abstract

PURPOSE:To read and write the CM data stored in a device, to facilitate easy access to the CM via a maintenance device even in an active mode of the device and to maintain a control program with no intervention of a CPU, by using a maintenance device that contains the data transferring, filing and displaying functions and transmits a command for maintenance. CONSTITUTION:A switch signal is turned on by means of a switch of an operating part 16 and the operating action is switched to a PC 24 from the part 16 in the order of 32 21 25. Then the PC 24 transfers a command to a microprocessor 28 in the order of 39 23 31 30. Thus the processor 28 performs the prescribed maintenance actions according to the command. A maintenance device has the data transfer, file and display functions and supplies or stores the write data in a storing means which stores the data on a control program, etc. Then the maintenance device also transmits a command for maintenance and at the same time forms a maintenance circuit together with the processor 28.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention is directed to a system in which a plurality of devices are connected, such as a data communication system, in which a microprocessor (hereinafter referred to as CP) is installed in the device and its operation is controlled. The present invention relates to a maintenance method for a device equipped with a control memory (hereinafter referred to as CM) that stores a control program to perform a control program.

(Conventional technology) FIG. 3 shows an example of the configuration of a data communication system.

This data communication system consists of multiple devices, namely a central processing unit (hereinafter referred to as CPU) 1, a main memory (hereinafter referred to as M
(hereinafter referred to as CCE) 2 and communication control equipment (hereinafter referred to as CCE) 3
are interconnected via a system bus 4. In such a system, CCE 3 receives a startup instruction [IPL command] from CPU 1 at the start of operation.
Then, the CCE control program stored in MMZ is transferred between MM2 and CCE 3 using a channel mechanism.
Direct memory access (DMA) to CM in CEa
) transfer.

The configuration of CCE 3 in which the conventional maintenance method is used is shown in FIG. As shown in the figure, CCE3 is a line control mechanism (
The line control unit (CCU) has a horizontal CPII and 0M12, and also has a CPII and 0M for maintenance and adjustment of CCE 3.
A maintenance circuit 14 is provided on the internal bus 13 that connects the 12. The maintenance circuit 14 is specifically connected to the CMI within the CCE 3.
2, and consists of a maintenance control section 15 and an operation section 16. The operation section 16 has a switch group 17 including a data/address setting switch, a CP stop switch, a read switch, a write switch, etc., and a display section 18 for displaying read data. In addition, in Figure 4, 19
2 is a CP stock signal line, and 20 is an interface path between the maintenance control unit and the operation unit.

The maintenance circuit 14 performs maintenance and adjustment after the control program is transferred from MM2 (FIG. 3) to 0M12 in CCE 3.

For example, when reading the contents of 0M12 (for example, a control program, etc.), in the conventional method, first, the read address of 0M12 is set with the address setting switch in the switch group 17 of the operation unit 16, and the CP stop switch is turned on. Make it. The maintenance control unit 15 thereby temporarily stops the operation of the CPII via the CP stop signal line 19, turns on the address load switch in the switch group 17, and causes the maintenance control unit 15 to read 0M12. Set address. Next, the reed switch in the switch group 17 activates the maintenance control unit 15 to read out the CMI 2, and the maintenance control unit 15 reads the contents of the CMI 2 and displays it on the display unit 18.

For continuous reading, update the read address value,
Each time a reed switch in switch group 17 is pressed, C
The contents of MI 2 are displayed on the display unit 18 one word at a time. During this operation, CPII is in a temporary halt state.

When writing data to 0M12, the operation of the switch group 17 is performed in the order of stopping the operation of CPll, setting the write address of 0M12, setting the write data, and starting the data write of 0M12, one word at a time. Ta.

(Problems to be Solved by the Invention) However, the conventional device maintenance method as described above has the following problems.

(1) Since the contents of CMI 2 in CCE B are manually read and written word by word, it takes a lot of time when handling a large amount of data, for example, when checking and correcting the contents of CMI 2.

(2) Since CMI 2 and CPI 1 in CCE 3 are manually accessed, each operation takes time, and during maintenance it is necessary to know the stopped state of CCE 3, so access should not be made while CCE 3 is operating. was virtually impossible.

(3) Since the CCE 3 control program is transferred from MM2 using the channel mechanism when CCE 3 starts operating, maintenance of the control program must be performed using the CPU
, MM2's help is required, and these devices and CCEa
The normal operation of the channel mechanism within was a prerequisite. In other words, when there is a failure in the CCE3 channel mechanism, CCE3
It is impossible to maintain the control program by itself.

The present invention has been made to solve the problems of the prior art as described above, and includes: (1) making it possible to read and write a large amount of CM content in a device in a short time; and (2) It is possible to read and write CM while the device is operating, (3
) The purpose is to provide a device maintenance method that allows maintenance of the control program for a single device and has excellent operability.

(Means for Solving the Problems) The present invention relates to a device in a system in which a plurality of devices are connected, such as a communication control device, which stores data such as a control processor and a control program that controls its operation. A device (e.g. CCE) having storage means for storing
) maintenance methods. In order to solve the problems of the prior art, a maintenance device is provided which has a data transfer function, a file function, and a display function, inputs or stores write data into the storage means, and sends commands for maintenance. , and a microprocessor that accesses the storage means in response to commands from the maintenance device and performs predetermined maintenance operations.

(Function) According to the present invention, since the device maintenance system is configured as described above, each technical means functions as follows.

When reading data from the storage means, the maintenance device sends a read command to the microprocessor. Upon receiving this, the microprocessor accesses the storage means and reads the data. The read data is transferred to the maintenance device and displayed or filed.

When writing data to the storage means, the maintenance device sends a write command and write data to the microprocessor. The microprocessor receives the command, accesses the storage means, and writes the received write data to the storage means.

(Example) An example of the present invention will be described in detail below with reference to FIGS. 1 and 2.

FIG. 1 shows a CC to which the device maintenance method of the embodiment of the present invention is applied.
FIG. 12 is a professional diagram showing the configuration of E. In this figure, the same elements as in FIG. 4 are given the same reference numerals, and detailed explanations will be omitted. As can be seen from FIG. 1, the CCE according to this example is C
In the control unit-operation unit interface path 19 of the conventional maintenance circuit, the CM in the CCE is read and written one word at a time by manual operation of the switch group when the CE is stopped.
The reason is that a maintenance device is provided through the circuit surrounded by the dotted line in the figure. The circuit surrounded by the dotted line is the switching unit 21, serial/4'-internal computer 24 (hereinafter referred to as PC).
is connected. The switching unit 21 includes a selector 25-, a latch element 26, and a buffer element 27. The serial interface control unit 22 is the microprocessor 2
8. It is composed of a memory 29 and a communication control LSI 30. The serial interface section 23 is composed of a driver/receiver 31. The switching control signal line 32 is connected to the operating section 1
The switch group 17 of 6 and the selector 25 of the switching section 21 are connected.

The read data only path 33 is connected to the maintenance control section 15, the display section 18 of the operation section 16, and the 9 cufa elements 2 of the switching section 21.
7t-Connect. Various setting signal line group 34 is switch group 1
7 and selector 25 are connected. A group of various setting signal lines 35 connects the selector 25 and the maintenance control unit 15. A group of various setting signal lines 36 connects the latch element 26 and the selector 25. The signal line/gas 37 is connected to the micro processor 28 of the serial interface section 22, the memory 29, and the L for communication control.
The SI 30 is connected to the switching unit 210, the latch element 26, and the buffer element 27. The node 38 also connects the serial interface control section 22 and the serial interface section 23.
The serial signal line (for example, made of R8232C standard) 39 connects the serial interface section 23 and the PC 24.
Connect.

Next, the operation will be explained.

First, one of the switches in the switch group 17 of the operating section 16 is used to turn on a switching control signal, and the switching control signal is sent to the selector 25 of the switching section 21 via the switching control signal line 32.

As a result, the selector 25 switches the operating section from the operating section 16 to the latch element 26 side and the 6pc24 side. after that,
The command shown in FIG. 2 is issued from the PC 24 via the serial signal line 39.

The command transferred via the receiver R of the drive/receiver 31 of the serial interface section 23 is
Communication control LSI of serial interface control unit 22
30, the microprocessor 28 decodes it and performs the operations indicated by the function code.

For example, if the above command function is
If it is a READ function code to read the contents of M12, the microprocessor 28 that received the command decodes the function code and determines that it is a memory read operation, and then transmits the memory start address to be read next to the signal line path 37. latch element 2 through
Set to 6.

Since the selector 25 is pre-selected to the latch element 26 side, the set memory address value is directly
The various setting signals 35 are outputted to the maintenance control unit 15 via the address/data bus. microprocessor 2
8 sends the CP stop signal to the maintenance control unit 15 via the latch element 26 and selector 25 after sending the memory start address.
The maintenance control unit 15 sends a cp stop signal to CP 11 via the cp stop signal line 19, and
Put the operation in step 1 into a temporary stop state. microprocessor 28
continues to send a read signal to the latch element 26 to activate the maintenance control section 15 and read the data in the CM 12. The read data is sent onto the read data dedicated bus 33 via the maintenance control unit 15, and is sent to the buffer element 2.
7 into the microprocessor 28. As soon as the microprocessor 28 completes reading the data, it stops sending out the CP stop signal and releases the CP 11 from its temporary halt state.

After recording, the microprocessor 28 stores the read data in the memory 29.

Next, when reading a large amount of the contents of CM 12,
If reading multiple bytes is instructed in the byte count area of the command, after performing the above operations, the microprocessor 28 increments the memory address value and sends it to the latch element 26. Then, a read signal and a cp stop signal are sent in this order to read out the contents of CM 12. Next, when the reading is completed, the transmission of the CP stop signal is completely stopped, and the temporary stop state of the CP 11 is released. The microprocessor 28 continuously repeats this operation for the number of bytes specified in the byte count area, and sequentially stores the read data in the memory 29. When the read operation of the CM I 2 is completed, the data stored in the memory 29 is transferred to the PC 24 by the microprocessor 28 through the communication control LSI 30 and the driver D1 serial signal line 39 of the driver/receiver 31. The PC 24 performs a process of displaying the sent data on a display using a display function or storing it in a file using a file function.

When writing data to 0M12, the PC 24 writes the Vl/RI TE function code for data writing, the memory start address, the byte count, and then writes the write data (input data from the keyboard on the PC 24 or data stored in a file). ). The microprocessor 28 is a communication control LSI 30
The above-mentioned ITE file/code/code, memory start address, byte count, and write data received via to set the memory start address (for the second and subsequent accesses, set the incremented address).

Next, control is performed by sending out a cp stop signal that temporarily stops the operation of the CP 11, setting write data, sending out a write start signal, and stopping sending out the cp stop signal after the write operation is completed. and performs a write operation to the CM 12. Next, the microprocessor 28 is 0M
The above operation is repeated by incrementing the address of 12, and data is written to the CM 12 by the byte count sent from the PC 24.

As described above, in this embodiment, access to the CM 12 in the CCE is performed under the control of the microprocessor 28, so it is possible to suppress the halt state of the CP 11 within a short period of time corresponding to a cycle steal.

In this embodiment, a PC 24 supporting R8232C is used as the maintenance device, but it goes without saying that other devices may be used as long as they have data transfer functions, file functions, and display functions. In addition, by making the function code area of the command more versatile, the CCE in the CCE
Needless to say, in addition to reading and writing operations of M12, for example, reading and writing of hard registers in the CCE can be performed.

Furthermore, in the above embodiment, write data from the PC 24 or read data from the CM 12 is temporarily stored in the memory 29.
However, they are stored directly on the PC without storing them in the memory 29.
It goes without saying that it is also possible to transfer the data to α12 or to α12.

In this embodiment, an example has been described in which the conventional maintenance circuit and the maintenance circuit of the present invention are switched and used using the switching section 21, but it is also possible to use a configuration of only the maintenance circuit of the present invention having the switching section 21. It goes without saying that there is.

As described above, according to this embodiment, the conventional maintenance circuit can be used as is, a maintenance device having a data transfer function etc. is connected thereto, and the maintenance device can be used in place of the conventional one. Since the CCE memory can be accessed from the device, using this maintenance method, it has become possible to read and write a large amount of data in the CCE memory at high speed. In addition, by storing the CCE control program in a file in the maintenance device, it becomes possible to transfer the control program from the maintenance device to α in the CCE, making it easy to maintain and adjust the control program on the CCE alone. Now it can be executed. Furthermore, since the memory in the CCE is accessed by the microprocessor in the maintenance circuit newly provided in this embodiment (the circuit surrounded by the dotted line in FIG. 1), the time required for the maintenance circuit to access the memory in the CCE, that is, It is now possible to suppress the access to the CCE memory from the CP within a range that does not affect the operation of the CP, and in effect, the access to the CCE memory from the maintenance circuit is suppressed from the CC.
It is now possible to do this during E operation.

(Effects of the Invention) As described above in detail, the present invention has the following advantages.

(1) It is possible to read and write a large amount of CM data in the device at high speed.

(2) The maintenance device can access α even when the device is in operation.

(3) As a standalone device, that is, without depending on the CPU or
Control program maintenance is possible.

[Brief explanation of drawings]

FIG. 1 is a detailed block diagram showing a specific configuration example of the main parts of the maintenance device and maintenance circuit in the present invention, and FIG.
FIG. 3 is a block diagram showing a data communication system, and FIG. 4 is a block diagram showing a conventional maintenance circuit. 11... Microprocessor (cp), 12...
Control memory (CM), 15... Maintenance control unit, 16...
・Operation section. 17...Switch group, 18...Display section, 21...
Switching unit 22... serial interface control unit, 23
. . . serial interface section, 24 . . . personal computer (PC), 25 . . . selector, 26.
...Latch element, 27...Buffer element, 28...
microprocessor,. 29...Memory, 30...Communication control LSI, 31
...driver/receiver. Patent Applicant Oki Electric Industry Co., Ltd. Patent Application Agent Patent Attorney Megumi Yamamoto -5I with 4 Toys 1 De 1 L Moxibustion 4 Toss 3 Toys Rotsuma〉Do no Ka ~ Fukusumu Figure 2 White 5 IjS”l/Stem-n*Light, 7-grid Figure 3

Claims (1)

[Claims] In a maintenance method for a device in a system in which a plurality of devices are connected, the device has a control processor and a storage means for storing data such as a control program for controlling the operation of the device. Has transfer function, file function and display function,
Write data is input or stored in the storage means,
1. A system for maintaining equipment, comprising: a maintenance device that sends commands for maintenance; and a microprocessor that accesses the storage means and performs predetermined maintenance operations in accordance with commands from the maintenance device.