JPS6288318A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS6288318A JPS6288318A JP60229382A JP22938285A JPS6288318A JP S6288318 A JPS6288318 A JP S6288318A JP 60229382 A JP60229382 A JP 60229382A JP 22938285 A JP22938285 A JP 22938285A JP S6288318 A JPS6288318 A JP S6288318A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- growth
- face
- substrate
- epitaxial layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02392—Phosphides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02395—Arsenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02398—Antimonides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02433—Crystal orientation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02463—Arsenides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/0251—Graded layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/02546—Arsenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02576—N-type
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02579—P-type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
Abstract
Description
【発明の詳細な説明】
く技術分野〉
本発明は、ＭＢＥ（分子線エピタキシー）法により単結
晶基板上に高品質なエピタキシャル層を形成して成る半
導体装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a semiconductor device in which a high quality epitaxial layer is formed on a single crystal substrate by the MBE (molecular beam epitaxy) method.
〈従来技術〉
近年、ＭＢＥ成長技術の進歩は著しく、１０Å以下の単
分子層オーダーまでの極めて薄いエピタキシャル層の制
御が可能となっている。このようなＭＢＥ成長技術の進
歩は半導体装置においても、従来の液相エピタキシャル
層長（ＬＰＥ）法などでは製作が困難であった極めて薄
い層を有する素子構造に基づく新しい効果を利用した半
導体装置の製作を可能とした。その代表的なものとして
、ＧａＡｓ／Ａ１ＧａＡｓ１子井戸（Ｑｕａｎｔｕｍ
Ｗｅｌｌ；略してＱＷ）レーザがある。このＱＷレー
ザは従来の二重へテロ接合（ＤＩ（）レーザでは、数百
Å以上あった活性層厚を１００人程度あるいはそれ以下
とすることによって、活性層中に量子化準位が形成され
ることを利用しており、従来のＤＨレーザに比べて閾値
電流が下がる、温度特性が良い、あるいは過渡特性に優
れている等の数々の利点を有している。これに関する参
考文献としては次のようなものがある。<Prior Art> In recent years, MBE growth technology has made remarkable progress, and it has become possible to control extremely thin epitaxial layers down to the order of a monomolecular layer of 10 Å or less. Such advances in MBE growth technology have also led to the development of semiconductor devices that take advantage of new effects based on device structures with extremely thin layers, which are difficult to fabricate using conventional liquid phase epitaxial layer length (LPE) methods. production was possible. A typical example is the GaAs/A1GaAs single well (Quantum well).
Well (abbreviated as QW) is a laser. In this QW laser, a quantization level is formed in the active layer by reducing the active layer thickness from several hundred Å or more in conventional double heterojunction (DI) lasers to about 100 Å or less. It has many advantages over conventional DH lasers, such as lower threshold current, better temperature characteristics, and superior transient characteristics.References on this topic include: There is something like.
■ ダブリュー、ティ、ツアング、フィジックス レタ
ーズ、ボリューム３９．ナンバー１０．ページ７８６
（１９８１） （Ｗ、 Ｔ、 Ｔｓａｎｇ、 Ｐｈｙｓ
ｉｃｓ Ｌｅｔｔｅｒｓ。■ W, T. Tsuang, Physics Letters, Volume 39. Number 10. page 786
(1981) (W, T, Tsang, Phys.
ics Letters.
ｖｏｌ、 ３９． Ｎｏ、ＩＯ，ｐｌｌ、 ７８６ （
１９８１））。vol, 39. No, IO, pll, 786 (
1981)).
■ エヌ、ケイ、ドゥッタア、ジャーナル オヴ アプ
ライド フィジックス、ボリューム５３゜ナンバー１１
．ページ７２１．１． （１９８２ＸＮ、 Ｋ、 Ｄｕ
ｔｔａ。■ N.K. Duttaa, Journal of Applied Physics, Volume 53° Number 11
．． Page 721.1. (1982XN, K, Du
tta.
Ｊｏｕｒｎａｌ ｏｆ Ａｐｐｌｉｅｄ Ｐｈｙｓｉｃ
ｓ、 ｖｏｌ、 ５３． Ｎｏ、ｌＩ。Journal of Applied Physics
s, vol, 53. No, lI.
ｐｐ、 ７２１１ （１９ｇ２））。pp, 7211 (19g2)).
■ エイチ、イワムラ、ティ、ザク、ティ、イシハシ、
ケイ、オオツ力、ワイ、ポリコシ、エレクトロニクス
レターズ、ボリューム１９．ナンバー５．ページ１８０
（１９８３） （Ｈｌｌｗａｍｕｒａ、 Ｔ、５ａｋ
ｕ。■ H, Iwamura, T, Zaku, T, Ishihashi,
Kei, Ootsuriki, Y, Polikoshi, Electronics
Letters, Volume 19. Number 5. page 180
(1983) (Hllwamura, T, 5ak
u.
Ｔ、 ｌ５ｈｉｂａｓｈｉ、 Ｋ、 ０ｔｓｕｋａ、
Ｙ、 Ｈｏｒｉｋｏｓｈｉ。T, l5hibashi, K, 0tsuka,
Y, Horikoshi.
Ｅｌｅｃｔｒｏｎｉｃｓ Ｌｅｔｔｅｒｓ、 ｖｏｌ、
１９． Ｎｏ、５． ｐｐ、 １８０（］ ９８３）
）。Electronics Letters, vol.
19. No, 5. pp, 180 (] 983)
).
また、ＭＢＥ法により作製されたもう１つの代表的な半
導体装置として、ＧａＡｓとＡｊｊＧａＡｓ界面に形成
された２次元電子ガスの高移動度特性を利用した電界効
果トランジスタ（ＦＥＴ）がある（ティ、ミムラ（’Ｉ
’、 Ｍｉｍｕｒａ）他 ジャパンジャーナル アプラ
イド フィジックス ポリコーム］ ９ （Ｊａｐｎ
、 、１ Δｐｐ１．Ｐｈｙｓ、ｖｏ１． １９
）（１９８０）ｐ、 Ｌ２２５）。 これらの半導体装
置をＭ Ｂ Ｅ法で製作する場合、成長層の結晶性が素
子特性に大きな影響を及ぼすことが知られている。特に
、ＧａＡｓ基板、ＱＧａＡｓ系の素子では、Δ！を含む
Ａ１ＧａＡｓの結晶性が成長条件に大きく依存するため
、Ａ４ＧａＡｓの結晶性の向−にが重要である。（ダブ
リュ・ティ・ツアンク（Ｗ、 Ｔ、 Ｔｓａｎｇ）他
アプライド フィジックス レター ポリコーム３６（
１９８０）ページ１１８ （Ａｐｐｌ、 Ｐｂｙｓ、
Ｌｅｔｔ、 ｖｏｗ、 ３６（１９８０） ｌ）、１１
８）。Another typical semiconductor device fabricated by the MBE method is the field-effect transistor (FET), which utilizes the high mobility characteristics of the two-dimensional electron gas formed at the interface between GaAs and AjjGaAs (T., Mimura et al. ('I
', Mimura) and others Japan Journal Applied Physics Polycomb] 9 (Japan
, ,1 Δpp1. Phys, vol. 19
) (1980) p, L225). When manufacturing these semiconductor devices by the MBE method, it is known that the crystallinity of the grown layer has a large effect on device characteristics. In particular, in GaAs substrates and QGaAs-based devices, Δ! The direction of crystallinity of A4GaAs is important because the crystallinity of A1GaAs, which includes , greatly depends on the growth conditions. (W, T, Tsang et al.
Applied Physics Letter Polycomb 36 (
1980) page 118 (Appl, Pbys,
Lett, vow, 36 (1980) l), 11
8).
〈発明の目的〉
本発明は、以」二のにうな事情に鑑み、ＭＢＥ法を用い
てエピタキシャル成長したエピタキシャル層の結晶性を
従来より向」ニさせることにより、閾値電流が小さく、
温度特性、過渡特性等に優れた半導体装置を提供するこ
とを目的とする。<Object of the Invention> In view of the following two circumstances, the present invention improves the crystallinity of the epitaxial layer epitaxially grown using the MBE method compared to the conventional method, thereby reducing the threshold current.
The purpose is to provide a semiconductor device with excellent temperature characteristics, transient characteristics, etc.
〈発明の構成〉
３一
本発明者らは、ＭＢＥ法により成長したエピタキシャル
層の結晶性を改善する目的で、面方位の異なるＧａＡｓ
基板」二にＡ、１ｘＧａ、−ｘＡｓ （Ｘ＝０．２〜０
．８）を成長して、エピタキシャル層の結晶性を評価し
た。この結果、従来から用いられている（００１）面上
では基板温度７２０℃以上で表面が完全鏡面の良質なエ
ピタキシャル成長層が得られるが、（０１１）及び（Ｉ
Ｎ）Ｂ面」二では非鏡面の成長層しか得られないことが
判明した。更に、（Ｉｌｌ）Ｂ面の基板について、第１
図に示すように、成長前の硫酸・過酸化水素水・水の混
合液によるエツチングの際に基板周辺部にだれを生じせ
しめ、（Ｉｌｌ）Ｂ面より角度が連続して傾いたオフ面
を形成し、同様の成長を行った。この際、通常の（００
１，）面基板上にも同時に成長を行い、両者の比較を行
った。<Structure of the Invention> 31 The present inventors developed GaAs with different plane orientations for the purpose of improving the crystallinity of an epitaxial layer grown by the MBE method.
Substrate"A, 1xGa, -xAs (X=0.2~0
．． 8) was grown and the crystallinity of the epitaxial layer was evaluated. As a result, on the conventionally used (001) plane, a high-quality epitaxial growth layer with a perfectly mirror surface can be obtained at a substrate temperature of 720°C or higher, but (011) and (I
It was found that only a non-specular growth layer could be obtained on the "N) B-plane"2. Furthermore, for the substrate on the (Ill)B side, the first
As shown in the figure, during etching with a mixture of sulfuric acid, hydrogen peroxide, and water before growth, sag is created around the substrate, resulting in an off-face that is continuously tilted from the (Ill)B surface. formed and underwent similar growth. At this time, the normal (00
At the same time, growth was also performed on a 1,) plane substrate, and the two were compared.
第２図に示すように、ＧａＡｓ基板３１」二に２１ｚｍ
厚のＡ ｌ ｏ 、 ？ Ｇ ａ ｏ 、 ３Ａ ８層
３２を成長し、その上に８０人厚のＧａＡｓ量子井戸層
３３を形成し、更に１０００人のＡＩ。、７Ｇａｏ、ｓ
ＡｓＡｓ層成４成長量子井戸層３３の発光特性よりＡＩ
−ｏ 、 ？ Ｇ ａ ｏ 、 ３ Ａ ８層３２の結
晶性を評価した。As shown in FIG.
Thick Al o, ? G a o , 3A 8 layers 32 are grown, a GaAs quantum well layer 33 with a thickness of 80 layers is formed thereon, and an AI layer of 1000 layers is further formed. ,7Gao,s
AI
-o,? The crystallinity of the G ao, 3 A 8 layer 32 was evaluated.
ＧａＡｓ基板３１の面方位の（１１，１）Ｂ面からの傾
き角度が０．１〜１度の範囲では完全に鏡面の成長表面
ポモロジ−が得られたが、この範囲をはずれると大小い
ずれ側にずれても非鏡面しか得られなかった。５１４．
５ｎｍのＡｒレーザ光で励起して量子井戸層３３からの
室温におけろフォトルミネッセンスの効率を測定したと
ころ、第３図に示すように、傾き角度が０１〜１度の範
囲ではそれ以外の部分に比べて１桁以上高い発光効率が
得られ、この部分の成長層が高い品質を有ずろことが確
認された。同時に（００１，）面基板」二に成長を行い
、鏡面の成長が得られたが、量子井戸層３３からの発光
強度は、（ＩＩＩ）面上の非鏡面の成長層と同一オーダ
ーであり、（ＩＩＩ）Ｂ面からの傾いた面」二の鏡面成
長部分の方が格段に優れていることがわかった。（１１
，１）Ｂ面」―の非鏡面成長部の発光効率が比較的高く
、（００１）面」二と同程度であるのは、非鏡面の原因
が局部的な表面欠陥の形成によるものであって、表面欠
陥以外の部分は完全鏡面であるため、この部分での発光
が強いことに起因している。A completely mirror-like growth surface pomology was obtained when the plane orientation of the GaAs substrate 31 was tilted from the (11,1)B plane by 0.1 to 1 degree; Only a non-mirror surface could be obtained even if the surface was shifted. 514.
When the efficiency of photoluminescence from the quantum well layer 33 was measured at room temperature by excitation with a 5 nm Ar laser beam, as shown in Fig. 3, when the tilt angle was in the range of 01 to 1 degree, the photoluminescence in other parts was A luminous efficiency that was one order of magnitude higher than that of the previous one was obtained, and it was confirmed that the grown layer in this part was of high quality. At the same time, growth was performed on the (001,) plane substrate, and mirror growth was obtained, but the emission intensity from the quantum well layer 33 was on the same order as the non-specular growth layer on the (III) plane. It was found that the second mirror-like growth part of "(III) Plane tilted from plane B" was much better. (11
The reason why the luminous efficiency of the non-specular growth part of the (001) plane "2" is relatively high is that the non-specular growth is due to the formation of local surface defects. This is due to the fact that the part other than the surface defect is a completely mirrored surface, so the light emission is strong in this part.
以」二のように、（ＩＩＩ）８面から０．１〜１度傾い
た而」二に高品質の成長が可能であることを見出したが
、１＝れを形成したＪｌｉ板の周辺部にはその方向に依
存せず、高品質のエビタギンヤル成長が可能であった。As shown in Figure 2, we found that high-quality growth was possible on planes tilted 0.1 to 1 degree from the 8-plane (III). It was possible to grow high-quality Evitaginyal without depending on its direction.
このことから傾むかせる方向にはよらないことがわかっ
た。This shows that it does not depend on the direction in which it is tilted.
本発明は、」−記の発見に基づき、面方位が（ＩＩＩ）
８面から０．１〜１度傾いた基板」二にＭＢＥ成長した
エピタキシャル層を用いて、高性能のデバイスを得るも
のである。The present invention is based on the discovery mentioned above, and the surface orientation is (III).
A high-performance device is obtained by using an epitaxial layer grown by MBE on a substrate tilted by 0.1 to 1 degree from the 8th plane.
〈実施例〉 以下、本発明を図示の実施例により詳細に説明する。<Example> Hereinafter, the present invention will be explained in detail with reference to illustrated embodiments.
本発明の一実施例であるＧＲＩＮ−ＳＣＩ（（Ｇｒ−ａ
ｄｅｄ Ｉｎｄｅｘ ５ｅｐａｒａｔｅ Ｃｏｎｆｉｎ
ｅｍｅｎｔ ｌ１ｅｔｅｒｏｓｔｒｕｃ−ｔｕｒｅ）型
半導体レーザの断面構成図を第４図に示す。（＋１１）
８面から（１１０）面に向かって０．５度傾むかせたｎ
−ＧａＡｓ基板（Ｓｉ：１０１８ｃｍ″−３ドープ）１
上に、ｎ−ＧａＡｓバッファ層２（０，５μｍ）、ｎ−
八！。７Ｇａｏ、：＋Ａｓクラッド層３（１μｍ）、ア
ンドープΔ、９ｘＧａ＋−ｘＡｓ光ガイド層４（０，２
７１ｍ）、アンドープＧ ａＡ ｓｆｉ子井戸層５（７
０人）、アンドープＡｌ１ｘＧａ＋−ｘＡｓＡｓイガ１
１層６．２μｍ）、ｐ−Ａ ｊｉ：ｏ、ｔＧ ａｏ、ｓ
Ａｓクラッド層７ （Ｉ ｔｔ ｍ）、ｐ−ＧａＡｓキ
ャップ層８（０，５μｍ）、ｎ−Ａｌ−ｏ−５Ｇａｏ、
５Ａｓ電流閉じ込め層９を基板温度７２０℃において連
続的にＭＢＥ成長した。光ガイド層４及び６はクラッド
層３及び７から量子井戸層５の端に向かってへ！混晶比
が０．７−０．２と２乗分布をとるよに変化させている
。成長後、フッ化水素（ＨＦ）により電流閉じ込め層９
を５μｍ幅のストライプ状に選択的に除去し、電流スト
ライプ２０を形成し、ｎ側にＡｕＧｅ−Ｎｉ層＋１．ｐ
側にＡｕＺｎ層ＩＯを蒸着・アロイしてオーミック電極
を形成した。このレーザは２５０μｍキャビティ長の場
合、室温での閾値電流４０ｍＡで発振した。比較のため
同時に従来の（１００） ｎ−ＧａＡｓ基板」−に同一
の素子構造を製作したところ、閾値電流【Ｊ６−７＝
ＯｍＡであり、本発明により半導体レーザの閾値電流が
大幅に低減できた。GRIN-SCI ((Gr-a
ded Index 5 separate Confin
FIG. 4 shows a cross-sectional configuration diagram of a semiconductor laser of the element l1eterostruc-ture type. (+11)
n tilted 0.5 degrees from the 8th plane toward the (110) plane
-GaAs substrate (Si: 1018cm''-3 doped) 1
On top, n-GaAs buffer layer 2 (0.5 μm), n-
Eight! . 7Gao, :+As cladding layer 3 (1 μm), undoped Δ, 9xGa+-xAs optical guide layer 4 (0,2
71 m), undoped GaA SFI well layer 5 (71 m),
0 people), undoped Al1xGa+-xAsAsIga1
1 layer 6.2 μm), p-A ji:o, tG ao,s
As cladding layer 7 (I tt m), p-GaAs cap layer 8 (0.5 μm), n-Al-o-5Gao,
A 5As current confinement layer 9 was continuously grown by MBE at a substrate temperature of 720°C. The light guide layers 4 and 6 extend from the cladding layers 3 and 7 towards the edge of the quantum well layer 5! The mixed crystal ratio is changed so as to have a square distribution of 0.7-0.2. After growth, a current confinement layer 9 is formed using hydrogen fluoride (HF).
is selectively removed in a stripe shape with a width of 5 μm to form a current stripe 20, and an AuGe-Ni layer +1. p
An ohmic electrode was formed by depositing and alloying an AuZn layer IO on the side. This laser oscillated with a threshold current of 40 mA at room temperature with a cavity length of 250 μm. For comparison, an identical device structure was also fabricated on a conventional (100) n-GaAs substrate, and the threshold current was [J6-7 = OmA, indicating that the threshold current of the semiconductor laser could be significantly reduced by the present invention. .
以上、本発明の実施例としてＡｆｌＧａＡｓ系半導体レ
ーザを例にとって説明したが、本発明の基礎となる現象
はｍ−ｖ族化合物半導体をＭＢＥ成長する際の本質的な
成長機構に基づいているので、ＭＢＥ成長により作成し
た他のｍ−ｖ族半導体デバイス全般に適用可能である。The embodiments of the present invention have been described above using an AflGaAs semiconductor laser as an example, but the phenomenon underlying the present invention is based on the essential growth mechanism when growing an m-v group compound semiconductor by MBE. It is applicable to all other m-v group semiconductor devices produced by MBE growth.
例えば、ＧａＡｓ基板上に作製したＧａＡｓ／Ａ４Ｇａ
Ａｓ、２次元電子ガス電界効果トランジスタやＩｎＰ基
板」二のＩｎＡ４Ａｓ／ＩｎＧａＡｓレーザ等がある。For example, GaAs/A4Ga fabricated on a GaAs substrate
There are two-dimensional electron gas field effect transistors, InP substrates, InA4As/InGaAs lasers, etc.
〈発明の効果〉
以」二より明らかなように、本発明によれば、エピタキ
シャル層を高品質化でき、閾値電流が小さい等の優れた
特性を有する半導体装置が得られる。<Effects of the Invention> As is clear from the following, according to the present invention, it is possible to improve the quality of the epitaxial layer and to obtain a semiconductor device having excellent characteristics such as a low threshold current.
第１図はエピタキシャル層の基板の面方位依存性を調べ
るために用いたＧａＡｓ基板の断面模式図である。第２
図はエピタキシャル層の品質を評価するために成長した
構造の断面模式図である。第３図は量子井戸層からのフ
ォトルミネッセンス発光効率の（ＩＩＩ）Ｂ而からの傾
き角度の依存性を示す説明図である。第４図は本発明の
一実施例として製作した半導体レーザの断面模式図であ
る。
１ ・・ ｎ−ＧａＡｓ基板、２・−ｎ−ＧａＡｓバッ
ファ層、３”’ ｎ ＡＪＬｏ７Ｇａｏ、３Ａｓクラ
ッド層、４・・・Ａ 、ｅｘＧ ａｌ −ＸＡ Ｓ光ガ
イド層、５−ＧａＡ５ｉ子井戸層、６−Ａ ｆｌｙ、Ｇ
ａ、−ｘΔＳ光ガイガ１１層、、、ｐ４Ｚ＋１−７Ｇａ
ｏ、３Ａｓクラッド層、８・・ｐ−ＧａＡＳキャップ層
、９・＝ｎ−Ａｌ。５Ｇａｏ、ｓＡＳ電流閉じ込め層、
１０．１１・・・オーミック電極、２０・・電流ストラ
イプ、３ｌ−ＧａＡｓ基板、３２’＝Ａ（２ｏ、ｖＧａ
ｏ、Ｊｓ層、３３・・・量子井戸層。
特 許 出 願 人 シャープ株式会社代 理 人
弁理士 前出 停他２名
第１０
（ＩＩＩ） Ｂ
↑
第２図
第３１￥１
第４図FIG. 1 is a schematic cross-sectional view of a GaAs substrate used to investigate the dependence of the epitaxial layer on the plane orientation of the substrate. Second
The figure is a schematic cross-sectional view of a structure grown to evaluate the quality of the epitaxial layer. FIG. 3 is an explanatory diagram showing the dependence of the photoluminescence emission efficiency from the quantum well layer on the inclination angle from (III)B. FIG. 4 is a schematic cross-sectional view of a semiconductor laser manufactured as an example of the present invention. 1...n-GaAs substrate, 2-n-GaAs buffer layer, 3"'n AJLo7Gao, 3As cladding layer, 4...A, exGal-XAS optical guide layer, 5-GaA5i well layer, 6 -A fly, G
a, -xΔS optical Gaiga 11 layer, , p4Z+1-7Ga
o, 3As cladding layer, 8..p-GaAS cap layer, 9.=n-Al. 5Gao, sAS current confinement layer,
10.11...Ohmic electrode, 20...Current stripe, 3l-GaAs substrate, 32'=A(2o, vGa
o, Js layer, 33... quantum well layer. Patent applicant: Sharp Corporation Agent
Patent attorney Suzu and two others No. 10 (III) B ↑ Figure 2 Figure 31 ¥1 Figure 4
Claims (3)
ピタキシャル層を形成して成る半導体装置において、前
記単結晶基板の面方位が（１１１）Ｂ面より０．１〜１
度の範囲で傾いていることを特徴とする半導体装置。(1) In a semiconductor device in which an epitaxial layer is formed on a single crystal substrate by molecular beam epitaxy, the plane orientation of the single crystal substrate is 0.1 to 1 from the (111)B plane.
A semiconductor device characterized by being tilted within a range of degrees.
、ＩｎＰ、ＧａＰ、ＩｎＳｂのいずれかから成ることを
特徴とする特許請求の範囲第１項に記載の半導体装置。(2) The single crystal substrate is made of GaAs, GaSb, InAs
, InP, GaP, or InSb.
であることを特徴とする特許請求の範囲第１項に記載の
半導体装置。(3) The semiconductor device according to claim 1, wherein the epitaxial layer is a III-V group compound semiconductor.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60229382A JPS6288318A (en) | 1985-10-14 | 1985-10-14 | Semiconductor device |
| GB8706194A GB2202371B (en) | 1985-10-14 | 1987-03-16 | Semiconductor device |
| DE19873709134 DE3709134A1 (en) | 1985-10-14 | 1987-03-20 | SEMICONDUCTOR COMPONENT |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60229382A JPS6288318A (en) | 1985-10-14 | 1985-10-14 | Semiconductor device |
| GB8706194A GB2202371B (en) | 1985-10-14 | 1987-03-16 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6288318A true JPS6288318A (en) | 1987-04-22 |
| JPH0473610B2 JPH0473610B2 (en) | 1992-11-24 |
Family
ID=39345493
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60229382A Granted JPS6288318A (en) | 1985-10-14 | 1985-10-14 | Semiconductor device |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPS6288318A (en) |
| DE (1) | DE3709134A1 (en) |
| GB (1) | GB2202371B (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6431410A (en) * | 1987-07-27 | 1989-02-01 | Sharp Kk | Semiconductor device |
| JPH01128423A (en) * | 1987-11-12 | 1989-05-22 | Sharp Corp | Semiconductor device |
| JPH01154513A (en) * | 1987-12-11 | 1989-06-16 | Sony Corp | Epitaxial growth method |
| US5647917A (en) * | 1994-09-08 | 1997-07-15 | Sumitomo Electric Industries, Ltd. | Epitaxy for growing compound semiconductors and an InP substrate for epitaxial growth |
| JP2013117228A (en) * | 2011-12-02 | 2013-06-13 | Bosch Mahle Turbo Systems Gmbh & Co Kg | Supercharger |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH039515A (en) * | 1989-06-07 | 1991-01-17 | Sharp Corp | Semiconductor device |
| CN100453690C (en) * | 2006-07-21 | 2009-01-21 | 哈尔滨工业大学 | Molecular beam epitaxy process of growing GaAs-base InSb film |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3325314A (en) * | 1961-10-27 | 1967-06-13 | Siemens Ag | Semi-conductor product and method for making same |
| US3379584A (en) * | 1964-09-04 | 1968-04-23 | Texas Instruments Inc | Semiconductor wafer with at least one epitaxial layer and methods of making same |
| US3476592A (en) * | 1966-01-14 | 1969-11-04 | Ibm | Method for producing improved epitaxial films |
| GB8518353D0 (en) * | 1985-07-20 | 1985-08-29 | Plessey Co Plc | Heterostructure device |
| EP0214610B1 (en) * | 1985-09-03 | 1990-12-05 | Daido Tokushuko Kabushiki Kaisha | Epitaxial gallium arsenide semiconductor wafer and method of producing the same |
-
1985
- 1985-10-14 JP JP60229382A patent/JPS6288318A/en active Granted
-
1987
- 1987-03-16 GB GB8706194A patent/GB2202371B/en not_active Expired
- 1987-03-20 DE DE19873709134 patent/DE3709134A1/en active Granted
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6431410A (en) * | 1987-07-27 | 1989-02-01 | Sharp Kk | Semiconductor device |
| JPH01128423A (en) * | 1987-11-12 | 1989-05-22 | Sharp Corp | Semiconductor device |
| JPH01154513A (en) * | 1987-12-11 | 1989-06-16 | Sony Corp | Epitaxial growth method |
| US5647917A (en) * | 1994-09-08 | 1997-07-15 | Sumitomo Electric Industries, Ltd. | Epitaxy for growing compound semiconductors and an InP substrate for epitaxial growth |
| JP2013117228A (en) * | 2011-12-02 | 2013-06-13 | Bosch Mahle Turbo Systems Gmbh & Co Kg | Supercharger |
Also Published As
| Publication number | Publication date |
|---|---|
| GB2202371B (en) | 1991-03-20 |
| GB2202371A (en) | 1988-09-21 |
| JPH0473610B2 (en) | 1992-11-24 |
| DE3709134A1 (en) | 1988-09-29 |
| GB8706194D0 (en) | 1987-04-23 |
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