JP2002246695A - Method for manufacturing semiconductor device using porous substrate, and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device using a porous substrate which can realize a semiconductor device such as a laser having a large ΔEc, and also to provide a semiconductor device by the method, by manufacturing a compound semiconductor material having an arbitrary lattice constant different from the lattice constant of a substrate of GaAs, InPGa or the like. SOLUTION: The method includes steps of forming a porous layer 102 on a substrate 101, forming a single crystal thin film having identical elements with the substrate 101 on the porous layer 102, forming a semiconductor film having a lattice constant different from that of the single crystal thin film on the single crystal thin film, forming a semiconductor device 109 including a film different in composition from the semiconductor film in part of the film formed on the semiconductor film, joining a surface of the semiconductor device 109 as a bonding surface to a surface of another semiconductor substrate 110, and after the joining step, removing the substrate 101 and the porous layer 102.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device using a porous substrate and a semiconductor device.

[0002]

2. Description of the Related Art A band having a wavelength of 1.3 .mu.m to 1.6 .mu.m is an area where the loss of an optical fiber is small and suitable for optical communication. So far, an InGaAsP-based material has been studied as a material for this wavelength, and high reliability has been obtained as a device for optical communication.

In recent years, due to an increase in the amount of communication information, attention has been paid to a wavelength multiplex communication system using multiple wavelengths instead of optical communication using one wavelength.

In this wavelength division multiplexing communication, it is necessary that the wavelength is constant over time. However, In
GaAsP-based semiconductor lasers have the disadvantage that they are vulnerable to changes in the ambient temperature, and that the characteristics of the semiconductor laser, such as the wavelength, vary greatly. Therefore, InGaAs is used for wavelength multiplexing communication.
When an sP semiconductor laser is used, it is necessary to use a Peltier element that keeps the temperature constant. As a result, there are problems such as an increase in size of the apparatus as a whole and an increase in price.

There is a need to improve this problem and to provide a semiconductor laser that operates stably even at a high temperature and a laser with a small wavelength fluctuation. One way to solve this is
There is a technique for improving the confinement of carriers in the active layer of a semiconductor laser.

FIG. 12 shows the configuration of a typical InGaAsP-based quantum well semiconductor laser. Carriers that affect temperature characteristics are electrons rather than holes, and it is necessary to increase the energy difference ΔEc between the well layer and the barrier layer on the conductor side that confine electrons. 1 in FIG.
Is a barrier layer, and 3 is a cladding layer. The energy difference between the active layer and the barrier layer is ΔEc.

FIG. 13 shows the relationship between the energy difference ΔEc and the temperature characteristic coefficient To. To indicates the temperature dependence of the threshold value of the semiconductor laser. If To is large, it indicates that the characteristics of the laser, such as the threshold value and the drive current, are hard to change even when the ambient temperature changes.

As can be seen from FIG. 13, To increases as ΔEc increases. That is, it is considered that a semiconductor laser having good temperature characteristics can be obtained by increasing ΔEc.

FIG. 1 shows the relationship between a typical III-V semiconductor and the band gap at room temperature.
As can be seen from FIG. 1, as the lattice constant of the InAlAs or AlInP film is reduced, a band gap larger than that of InP can be obtained. Particularly, InAlAs is a III-V material having the largest band gap as long as an active layer material having a wavelength of 1.3 μm to 1.6 μm can be used. By using InAlAs having a large band gap, the confinement of carriers is improved, and a 1.3 to 1.6 μm laser with small temperature dependence is realized. In addition, since the band gap of InAlAs is wide, it is possible to shorten the wavelength while maintaining a large ΔEc.

[0010] In order to realize high quality InAlAs, I
A technique for controlling the lattice constant of the nAlAs film is required. However, it is not easy to control the lattice constant of InAlAs.

[0011] At present, substrates for compound semiconductors are limited to binary systems, and low-cost mass-produced substrates include InP and Ga.
It is only a P or GaAs substrate, and the lattice constant is also limited. When films having different lattice constants are formed on these binary substrates, the following problems occur.

One is a problem caused by different lattice constants. Stress and lattice defects occur due to the lattice constant difference. As a result, when a device is manufactured using this film, there is a disadvantage that good electrical and optical characteristics cannot be obtained.

The second is a difference in thermal expansion coefficient between the compound semiconductor film laminated on the substrate and the substrate. Generally, crystal growth is performed at a temperature several hundred degrees higher than room temperature. In such a case,
Even if the substrate and the grown film are lattice-matched at the growth temperature, dislocations are generated in the grown film due to a difference in thermal expansion during the process of returning to room temperature. Solving the problems of the lattice constant and the coefficient of thermal expansion has been an issue for growing high quality InAlAs and realizing a laser having excellent temperature characteristics.

As one method for solving these problems, there has been proposed a method of forming a compound semiconductor film on a silicon substrate with porous silicon interposed therebetween (Japanese Patent Laid-Open No. 10-3215).
No. 35). In this method, a silicon substrate having a porous region is subjected to a heat treatment in order to seal pores on the surface of the porous region, and a compound semiconductor layer is laminated on the substrate. When the compound semiconductor layer is manufactured in this manner, lattice defects and strains caused by the lattice matching with the silicon substrate and the difference in the coefficient of thermal expansion generated when the temperature is lowered from the film formation temperature to room temperature are reduced by the porous silicon. It is introduced only into the ultra-thin silicon layer that seals the holes and not into the compound semiconductor layer.

This is because the ultra-thin silicon layer formed on the porous layer, which is more fragile than bulk silicon, is much more fragile than the grown compound semiconductor layer. In this way, the layer into which defects are introduced is preferentially introduced only into the ultra-thin silicon layer instead of the compound semiconductor layer, so that a compound semiconductor layer with very few defects can be formed.

Further, in this method, a compound semiconductor substrate can be manufactured at a lower cost than in the conventional example, since a method which involves the production cost such as bonding and selective etching of the substrates as in the conventional example is not used. However, the above method has been proposed as a method for forming a compound semiconductor on a silicon substrate. As a substrate for forming a compound semiconductor, the same compound semiconductor is used for the purpose of preventing the generation of an anti-phase domain and improving the wettability to facilitate two-dimensional growth, as compared with a silicon substrate. It is often better to use a substrate. further,
In many compound semiconductors, GaAs, I
Since nP and GaP have a smaller difference in lattice constant and a difference in thermal expansion coefficient, they are often more suitable for growing a compound semiconductor.

[0017]

SUMMARY OF THE INVENTION The present invention relates to GaAs,
A compound semiconductor film having an arbitrary lattice constant different from the lattice constant of a substrate such as InPGaP can be formed with a low defect density;
For example, it is an object of the present invention to provide a method for manufacturing a semiconductor device using a porous substrate capable of manufacturing a semiconductor device such as a laser capable of obtaining a large ΔEc, and a semiconductor device.

[0018]

In order to solve this problem, a method of manufacturing a semiconductor device using a porous substrate according to the present invention comprises a step of forming a porous layer on a substrate, and a step of forming a porous layer on the porous layer. Forming a single crystal thin film having the same element as the substrate; forming a semiconductor film having a lattice constant different from that of the single crystal thin film on the single crystal thin film so as to be thicker than the single crystal thin film; Bonding the semiconductor substrate so that the semiconductor film is located inside, and removing the porous layer after the bonding.

Further, in the method of manufacturing a semiconductor device according to the present invention, a step of forming a porous layer on a substrate, a step of forming a single crystal thin film having the same element as the substrate on the porous layer, Forming a semiconductor film having a different lattice constant from that of the single crystal thin film, bonding the substrate and another semiconductor substrate such that the semiconductor film is located inside, and removing the porous layer after bonding. , And a step of removing the single crystal thin film.

It is preferable to use a porous layer of InP, form a high-quality film of InGaAs that does not lattice match with InP, and manufacture a device thereon.

It is preferable to use porous GaAs to produce high-quality InGaP which does not lattice match with GaAs, and to fabricate a device configuration thereon. Using porous InP, high-quality AlInP that does not lattice match with InP is manufactured, and a device configuration is manufactured thereon.

It is preferable to manufacture high-quality GaAsSb that does not lattice match with InP using porous InP, and then manufacture a device configuration thereon.

It is preferable to produce high quality InGaAs that does not lattice match with InP by using porous InP, and then use InGaAsBi for an active layer on which a device configuration is produced.

It is possible to produce a high-quality InGaP that does not lattice-match with InP using porous InP, and has a lattice-matched InAlAs in the layer for fabricating a device configuration thereon, and produce InGaP in the active layer. preferable.

[0025]

(Embodiment 1) Embodiment 1 shows an embodiment in which a high quality film can be obtained even when a film having no lattice matching with GaAs is formed using porous GaAs. FIG.
A description will be given using (a), (b), and (c). Porous Ga
As described in P., the As layer can be formed by anodizing n-type GaAs in HCl. Schmuki et al. (Jo
urnal of Electrochemical
Society 143, p. 3316 (1996))
And Wada et al. (Preprints 29a-P
C-25).

In FIG. 2A, reference numeral 101 denotes a porous layer 10
2 is a GaAs substrate having a (100) plane and a thickness of 450 μm. In order to manufacture such a substrate, an n-GaAs substrate was ultrasonically irradiated with isopropyl alcohol and methyl alcohol, and then an electrode was formed to make electrical contact with In on the back surface of the substrate. Thereafter, anodizing treatment is performed in an HCl solution,
The porous layer 102 can be formed on the GaAs substrate surface. The conditions for forming the porous GaAs layer 102 are as follows.
Anodization was performed at a current of mA / cm ² for 10 minutes, and the thickness of the porous body was 10 μm and the porosity was 20%.

Next, as shown in FIG.
The surface layer 10 in which the holes are sealed on the surface of the s layer 102
3 was formed. In order to form such a layer, the porous GaAs substrate 101 is carried into a molecular beam epitaxy apparatus (MBE method), and the substrate is heated to about 600 ° C. while irradiating As. Hold for 20 minutes. At this time, the oxide film on the surface of the GaAs substrate 101 is removed, and Ga migration occurs on the outermost surface of the porous GaAs layer 102 in a direction to smooth the unevenness and reduce the surface energy. As a result, the surface of the porous GaAs layer 102 is flattened and buried as a thin GaAs single crystal thin film 103. At this time, the reflected electron beam diffraction image (RHEED) changes from a spot to a streak.

At this time, it is possible to further promote the sealing of the hole by irradiating a small amount of Ga beam. The thickness of the GaAs single-crystal thin film 103 formed on the surface is extremely thin, approximately equal to or less than the diameter of the hole, specifically, 100 nm or less, more preferably 30 nm or less. The thin GaAs single crystal thin film 103 plays an important role of transmitting arrangement information to a layer laminated thereon. On the other hand, if the GaAs single-crystal thin film 103 is too thick, distortion due to the difference in lattice constant may be caused by the porous layer 10.
It becomes impossible to relax with 2. That is, the thickness of the layer filling the holes is desirably sufficiently smaller than the thickness of the semiconductor layer formed thereon, and is, for example, preferably 1/5 or less, more preferably 1/100 or less.
More specifically, it is desirable to consider the thickness of the compound semiconductor in the range of 1 nm to 100 nm.

Another technique for promoting hole sealing is migration enhanced epitaxy (ME).
There is a method using E). It is effective to promote the migration of group III atoms using this technique.
This method is applicable to III-type devices such as GaAs, InP, and GaP.
In the case of a group V semiconductor, in order to promote the migration of group III atoms, only a group III is supplied, and the supply amount of the group V is limited until the group III is settled at an appropriate site.

In the above example, the configuration using the MBE method as a method for filling the surface of the porous layer 102 has been described. However, the present invention is not limited to this method. May be used. Similar effects can be obtained by using not only a solid source but also an organic compound such as trimethylgallium or arsine as a form of the supply material.

Next, as shown in FIG.
A group III-V compound semiconductor layer 104 was successively formed on the s single crystal thin film 103. At this time, the thickness of the compound semiconductor layer 104 to be formed is sufficiently larger than the thickness of the GaAs single crystal thin film 103 as described above. Here, InGa which is a substrate of a semiconductor laser for high-temperature operation is used.
As (In composition: about 0.38) was epitaxially grown to a thickness of 1000 nm. The growth conditions at this time are a substrate temperature of 600 ° C. and a V / III ratio of ５5. This In
As a result of confirming the dislocation of the GaAs film by an electron microscope, it was confirmed that the film had almost no defect density and was a good film. When the etch pitch density of this wafer was measured by defect revealing etching, a defect density of 104 cm ^-2 or less was obtained. This defect density is sufficiently low as a substrate for producing a laser wafer.

As described above, the compound semiconductor layer 10
4, lattice defects caused by a difference in lattice constant from GaAs and a difference in thermal expansion coefficient are mainly introduced into the GaAs surface layer formed on the fragile porous GaAs layer 102, and the grown compound semiconductor It is hardly introduced into InGaAs (having a composition of about 0.38) of the layer 104. For this reason, a compound semiconductor single crystal layer 104 with very few defects is obtained, and by forming InAlAs matched to this InGaAs film, a laser having a large ΔEc can be produced.

FIGS. 4A, 4B and 4C show the porous layer 1
Next, a step of separating only the semiconductor laser configuration from the substrate 101 provided will be described. In FIG. 5A, reference numeral 101 denotes GaAs as a substrate. Reference numeral 102 denotes a porous GaAs layer, and reference numeral 109 denotes a laser configuration formed on the porous material.
As shown in FIG. 4 (b), this structure was bonded on a Si substrate 110 with the P side as a bonding surface. In this example, there is only one device, but a configuration in which a plurality of devices are arranged, that is, an array may be used. After joining, FIG.
As shown in the figure, a portion of 102 porous GaAs was etched with a thin sulfuric acid-based etchant. The region of porous GaAs has an etching difference of 500 times or more as compared with single crystal GaAs, and only 102 can be easily etched. FIG. 4 (c)
As shown in (1), it is possible to produce a laser by taking out only the laser portion. Unnecessary portions can be polished and removed without depending on etching or the like. Note that the single crystal thin film 103 formed on the porous layer may also be removed.

As the substrate on which the porous layer 102 is formed, an InP substrate (described in the second embodiment), a GaP or Si substrate anodized with H ₂ SO ₄ , or the like can be used. Basically, the substrate is not limited to a binary compound semiconductor as long as a porous layer can be formed.

(Embodiment 2) A second embodiment of the present invention will be described with reference to FIGS.

This embodiment is an example using an InP substrate.
Further, a specific laser configuration is described. It also describes a step of separating the porous portion of the manufactured semiconductor laser.

In FIG. 2A, reference numeral 101 denotes the porous layer 10
2 is an InP substrate. In order to manufacture such a substrate 101, an n-InP substrate was ultrasonically irradiated with isopropyl alcohol and methyl alcohol, and then an electrode was formed to make electrical contact with In on the back surface of the substrate. Thereafter, anodizing treatment was performed in an HCl solution to form a porous layer on the surface of the InP substrate.

Next, as shown in FIG.
On the surface of the layer 102, a surface layer 103 in which the holes are sealed.
(Single crystal thin film layer) was formed. In order to form such a layer 103, the InP substrate 1 on which the porous layer 102 is formed is formed.
01 was carried into a molecular beam epitaxy apparatus, and the substrate was heated to about 500 ° C. while irradiating P. Through this process, the oxide film on the surface of the InP substrate 101 was removed, and migration of In occurred on the surface of the porous InP layer 102 from which the oxide film had been removed in a direction to smooth the unevenness and reduce the surface energy. As a result, the porous InP layer 102
Has been flattened and buried as a thin InP single crystal thin film 103. At this time, it is possible to further promote the sealing of the holes by irradiating a small amount of In beam. In this example, the element to be supplied is supplied in a solid state, but is not necessarily limited to the solid element. Chemical Beam Epitaxy using organometallic materials such as trimethylindium and hydride phosphine
Alternatively, an MOCVD method or the like may be used.

Next, as shown in FIG.
On III, a group III-V compound semiconductor layer 104 was successively formed. At this time, the thickness of the formed compound semiconductor layer 104 was formed sufficiently thicker than the thickness of the surface portion 103.

As described above, the compound semiconductor 104
Is formed, lattice defects caused by a difference in lattice constant from InP and a difference in coefficient of thermal expansion are reduced by the fragile porous InP layer 102.
Is mainly introduced into the surface layer 103 of the InP single crystal thin film formed thereon, and is hardly introduced into the grown compound semiconductor layer 104. Thus, a single-crystal compound semiconductor layer 104 with very few defects was obtained.

On this substrate, a semiconductor layer having a semiconductor film having a different lattice constant from that of 104 was laminated. In FIG. 3, 10
6 is the same as the configuration of FIG. Numeral 11 has the same composition as the 104 layer, and is n-In _0.38 Ga _0.62 As. On top of this, n-In _0.35 Al which is a cladding layer shown in FIG.
_0.65 As was formed. The lattice constant is 0.58 nm.
InAlAs of the cladding layer used here is InAlAs.
As a result of the increase in the Al composition as compared with the case of lattice matching with P, the band gap of InAlAs is increased by about 0.55 ev as compared with the case of InP matching. A light confinement layer n-In _0.48 Ga _0.38 Al _0.16 As shown in 13 was formed _thereon . Reference numeral 18 denotes an active region, in which an active layer and a barrier layer are included, and the active layer 14 is a compressively-strained n-In.
_It was made of _0.53 Ga _0.47 As and had a compressive strain of 1.2%.

Further, two barrier layers are included, and the composition is the same as that of the light confinement layer shown in FIG. 13 and is not doped. Above this, p, which is an upper optical confinement layer shown in FIG.
After forming -In _0.48 Ga _0.38 Al _0.16 As,
An upper cladding layer shown in p-In _0.35 Al _0.65 As
To form Finally, p-In _0.38 Ga _0.62 A shown in 19
s is formed. In this configuration, the strain is applied only to the active layer. However, the strain may be applied to a part of the barrier layer and the light guide layer.

FIGS. 4A, 4B, and 4C show the structure of the porous layer 1. FIG.
Next, a step of separating only the semiconductor laser configuration from the substrate 101 provided will be described. In FIG. 5A, reference numeral 101 denotes InP as a substrate. 102 denotes a porous InP layer, and 109 denotes a laser configuration formed on the porous layer. This structure is shown in FIG.
It joined on the board | substrate with the P side as a joining surface. After the bonding, as shown in FIG. 4C, the portion of the porous InP 102 was etched with a thin HCL etchant. Porous In
The P region has an etching difference of 1000 times or more compared to the single crystal InP, and only 102 can be easily etched. As shown in FIG. 4C, it is possible to produce a laser by extracting only the laser portion.

FIG. 3B shows the band structure of the semiconductor laser fabricated as described above. ΔEc of the active layer and the barrier layer can be about 0.54 eV. The thickness of the well layer is 1.5
The thickness is set to 6 nm to obtain 5 μm. Lattice constant of 0.5
By changing to 8 nm, InAlAs having a larger band gap can be used as compared with InP, and GaIn having a larger band gap can be used for the barrier layer 15.
AlAs can be used, ΔEc can be increased, and electron confinement is improved.

The magnitude of ΔEc is considered to be 0.5 eV or more, and FIG. 13 shows that To is 180 [K] or more. 70 [K] of conventional InGaAsP laser
It became possible to obtain excellent temperature stability as compared with the degree. As described above, if the cladding is high, the barrier can be made high, and a large To can be obtained. In this case, InAlAs having a band gap of about 0.58 nm, which allows a large band gap of InAlAs, is used. However, basically, a material having a band gap larger than that of InP is effective. The condition that the InAlAs layer used as the cladding layer this time is the direct transition type and has the largest band gap is a lattice constant of about 0.578 nm. When InAlAs is used as the cladding, a desirable configuration with the best carrier confinement can be obtained by using this lattice constant.

As described above, the porous compound semiconductor,
By using (porous InP in this example) and using InAlAs having a lattice constant that is not matched with the substrate, a long-wavelength semiconductor laser with good temperature characteristics could be obtained.

In this embodiment, the barrier layer is GaIn
AlAs was used, but other materials such as (G
A) AlInP, InGaAsP, InGaP, AlG
aInAsP and AlInAsP are raised, and the purpose is achieved by using them for the barrier.

Although the semiconductor laser is taken as a device in this embodiment, the invention is not limited to the semiconductor laser. Since InGaAs with a large In composition has a high electron movement speed, by manufacturing a ternary substrate having a lattice constant capable of forming InGaAs with a large In composition,
A high-speed field effect transistor (FET) can be realized.

(Embodiment 3) In this embodiment, a porous GaAs layer is used.
Utilizing AlInAs layer that does not lattice match with GaAs
In order to improve the temperature characteristics in the used semiconductor laser structure,
This is an example in which InGaP is used as a barrier layer. FIG.
This will be described with reference to FIG. In FIG.
01 is a (100) -GaAs group having a porous layer 202
It is a plate having a thickness of 500 μm. Such a substrate
To fabricate, after n-GaAs substrate is organically washed
Next, an electrode was formed on the back surface of the substrate 201. After this, H
Anodizing treatment is performed in a Cl solution, and the GaAs substrate 20
The porous layer 202 was formed on one surface. porous
The conditions for forming the porous GaAs layer 202 are such that the current is 5 mA / cm.
^TwoAnd anodizing for 20 minutes.
The thickness was 15 μm, and the porosity was 25%.

Next, as shown in FIG.
On the surface of the s layer 202, a surface layer (single crystal thin film layer) 203 in which the holes were sealed was formed. The method of forming the layer 203 is the same as that described in the first embodiment. Next, FIG.
As shown in (c), a group III-V compound semiconductor layer 204 was continuously formed on the surface portion 203. 204 is In
GaP has a composition of In0.71. 204 InGa
P became a film with few defects due to the effect of the porous layer.

Subsequently, a laser structure shown in FIG. Reference numeral 21 denotes 206 in FIG. 5C, and the uppermost layer is n-In _0.71 Ga _0.29 P. On top of that, 22
N-In _0.35 Al _0.65 As which is a cladding layer shown in FIG. The lattice constant is 0.58 nm. An optical confinement layer n-In _0.71 Ga _0.29 P shown in 23 was formed _thereon . The active region includes an active layer 24 and a barrier layer 25. The active layer has a compressive strain of 1.0
% Of undoped InGaAs. Reference numeral 25 denotes two barrier layers. This barrier layer has the same configuration as the optical confinement layer shown in 23 and is not doped. Above this, p-In _0.71 G, which is the upper optical confinement layer shown at 26
After forming a _0.29 P, p-In _0.35 Al _0.65 As, which is the upper cladding layer shown in 27, was formed. Finally 28
In this case, p-In _0.38 Ga _0.62 As shown in FIG. In this configuration, the strain is applied only to the active layer. However, the strain may be applied to a part of the barrier layer and the light guide layer.

FIG. 6B shows a band diagram. Barrier layer I
The energy difference between nGaP and InGaAs well is 460m
You can take eV. In a configuration using a general InGaAsP barrier, ΔEc is 150 m as shown in FIG.
Since it is about eV, by using InAlAs as a clad and using InGaP as a barrier, it becomes possible to obtain a semiconductor laser configuration with better confinement than ever.

The steps shown in FIGS. 7A to 7C are steps for separating the laser structure from the substrate including the porous layer. 201
Is a GaAs substrate and 202 is a GaAs porous layer. 2
Reference numeral 09 denotes a laser structure.

As shown in FIG. 7B, this structure was attached on a substrate (here, a Si wafer) with 209 facing down. Thereafter, 201 was shaved using a polishing liquid. afterwards,
Etching 202 was performed with thin sulfuric acid, leaving only the laser structure 209 as shown in FIG.

As described above, a defect-free InGaP buffer can be manufactured by using a porous GaAs layer, and InAlAs is used for a cladding layer.
By using InGaP for the barrier layer, a laser with better confinement was obtained than when InP was used as the cladding and InGaAsP was used as the barrier layer. In this embodiment, InGaP is used for the barrier layer. However, other barrier layers include AlGaInAs, and InGaAsP, AlGaInP, and AlGaInAs whose band gaps are increased by shifting the lattice constant from InP.
P, AlInAsP and the like.

In this embodiment, the example of InGaAs is given as the well layer of the active region, but InGaAsP may be used. In addition, the composition was changed to reduce the band gap.
nGaAlAs, AlGaInAsP and the like can also be used.

Basically, by providing a lattice constant smaller than that of InP and using InAlAs having a large band gap as a clad, a structure in which the energy difference between the barrier layer and the well layer is increased is provided. As a result, it has become possible to provide a laser exhibiting unprecedented temperature stability. By controlling the lattice constant of the substrate in this manner, a laser having unprecedented characteristics can be realized.

(Embodiment 4) The present embodiment is an example in which GaAsSb is used as an active layer in a semiconductor laser structure in which AlInP that does not lattice match with InP can be realized by using a porous InP layer. is there.

This will be described with reference to FIG. In FIG. 8, reference numeral 31 denotes an n-AlInP film formed on a semiconductor substrate having a 10-nm-thick InP film formed on a porous InP film. On top of that, n-In _0.3 Al _0.7 A which is a cladding layer shown at 32
s. The lattice constant is matched to 0.578 nm. A light confinement layer n-In _0.8 shown on 33 above this
Ga _0.2 P was formed. The active region is an active layer 34
And a barrier layer 35. The active layer is composed of an unstrained undoped GaAsSb5 layer. Reference numeral 35 denotes a barrier layer formed of four layers. This barrier layer has the same configuration as the light confinement layer shown in 33 and is not doped. After forming p-In _0.8 Ga _0.2 P serving as an upper optical confinement layer shown at 36 thereon, p-InAlAs serving as an upper cladding layer shown at 37 is formed. Finally it has a configuration in which the formation of the p-In _0.3 Ga _{0 .7} As shown in 38.

As described above, by using porous InP, a defect-free AlInP buffer can be manufactured, and the energy difference between the barrier layer InGaP and the GaAsSb well is large. By using GaAsSb for the active layer, it has become possible to obtain a semiconductor laser configuration with better confinement than ever before.

In this embodiment, GaAsSb is shown, but InGaAsN or the like may be used as an active layer for obtaining 1.3 μm to 1.6 μm. By combining InAlAs and InGaAsN active layers having a large band gap, a semiconductor laser having excellent temperature characteristics can be obtained.

(Embodiment 5) This embodiment is an example in which a GaAsSb layer which does not lattice match with InP is formed, and GaInTIP having small temperature dependency is used for the active layer. This will be described with reference to FIG.

In FIG. 9, reference numeral 41 denotes a large amount of InP on the InP substrate.
N-Ga is added to the semiconductor layer including the porous layer and the InP thin film 30 nm.
This is a configuration in which AsSb is laminated. On top of that, shown at 42
N-In which is a cladding layer_0.4Al_0.6Forming As
You. The lattice constant is matched to 0.582 nm. On this
The optical confinement layer n-In shown in FIG._0.74Ga_0.26Shape P
To achieve. The active region includes the active layer 44 and the barrier layer.
45. The active layer is undone with no distortion
It is composed of a ped GaIn TIP5 layer. 45 is ba
The rear layer has four layers. This barrier layer is
The configuration is the same as that of the optical confinement layer shown
Absent. On top of this, p-
In_0.74Ga_0.26After the formation of P,
P-In which is a lad layer_0.4Al_0.6As is formed. Most
P-In later shown in 48_0.41Ga _0.59Structure that formed As
It has become.

As described above, by using porous InP, a GaAsSb buffer having no defect can be manufactured, and the barrier layer InGa
The energy difference between the P and GaInTIP wells was large. As a result, it has become possible to suppress carrier overflow.

In addition, GaInTlP containing TlP
Since the change in temperature of the bandgap is smaller than that of a normal material, the gain of a specific wavelength is hardly changed, and a more stable operation can be performed.

Therefore, by using porous InP, the lattice constant can be controlled, and InAlAs can be clad and InAlAs can be used.
By using GaP as a barrier and using GaInTIP for the active layer, it has become possible to obtain a semiconductor laser configuration having better confinement than ever and having good temperature dependence of gain at a specific wavelength. In the present patent, GaI is used for the active layer.
Although nTlP was used, it is also possible to use AlInTlP.

(Embodiment 6) In this embodiment, high quality InGaAs that does not lattice match with InP is formed by the effect of the porous layer, and the active layer has a small temperature dependency, InGaAsBi.
This is an example using.

This will be described with reference to FIG.

In FIG. 10, reference numeral 51 denotes n-In on the InP porous layer and the semiconductor layer including the InP thin film 5 nm on the InP substrate.
_The structure includes _0.39 Ga _0.61 As. An n-In _0.35 Al _0.65 As which is a cladding layer shown by 52 is formed thereon. The lattice constant is matched to 0.58 nm. An optical confinement layer n-In _0.71 Ga _0.29 P shown on 53
To form The active region includes an active layer 54 and a barrier layer 55. The active layer is unstrained un
It consists of two doped InGaAsBi layers. 55
Is a single barrier layer. This barrier layer is 5
The configuration is the same as that of the optical confinement layer shown in FIG. 3 and is not doped. After forming p-In _0.71 Ga _0.29 P as an upper optical confinement layer shown at 56 thereon, p-In _0.35 Al _0.65 As as an upper cladding layer shown at 57 is formed. Finally it has a configuration in which the formation of the p-In _{0. 39} Ga _0.61 As shown in 58.

Also in this configuration, the barrier layer InGaAs
The energy difference between P and InGaAsBi well was large. Since InGaAsBi also has a small temperature dependence of the bandgap, by using InGaAsBi for the active layer,
The temperature dependence of the gain is reduced.

As described above, by using porous InP, a defect-free InGaAs buffer can be manufactured. InAlAs is clad, and InGaAsP is formed.
Can be used as a barrier, and InGaAsBi can be used for the active layer, and it has become possible to obtain a semiconductor laser configuration with better confinement and better temperature dependence of gain than ever before.

(Embodiment 7) In this embodiment, a high-quality InGaP which does not lattice match with InP is manufactured.
A porous layer is used for the AlAs cladding layer, and the active layer is made of In
This is an example in which the wavelength can be shortened by using GaP.

This will be described with reference to FIG. 11 and 61 show an InP porous layer and an InP thin film of 30 nm on an InP substrate.
In this configuration, n-In _0.71 Ga _0.29 P is stacked on a semiconductor layer containing. On top of this, the cladding layer n-
In _0.35 Al _0.65 As is formed. The lattice constant is 0.
578 nm. On top of this, the light confinement layer n shown at 63
-In _0.39 Al _0.23 Ga _0.38 As is formed. The active region includes an active layer 64 and a barrier layer 65. It has become in UndopedIn _0.71 Ga _{0. 29} P. Numeral 65 is a barrier layer formed of two layers. This barrier layer has the same configuration as the optical confinement layer shown in 63 and is not doped. After forming n-InAlGaAs which is an upper optical confinement layer shown by 66 on this,
P-In _0.35Al0.65 A which is the upper cladding layer shown in FIG.
forming s. Finally, p-In _0.38 Ga _0.62 shown in 68
As is formed.

As described above, by introducing a manufacturing method using a porous layer, it is possible to use high quality InAlAs without matching with the substrate for the cladding layer and to use InAlGaAs for the barrier layer. It has been shown that the wavelength can be shortened while maintaining the energy difference ΔEc between the barrier layer and the active layer at 0.4 eV.

In the present embodiment, the source of lattice matching for using InAlAs was aimed at high-temperature operation of a long-wavelength laser. Growing a film having a lattice constant different from that of a substrate increases the degree of freedom in device fabrication and has the potential to realize a new functional device that has been impossible until now. Therefore, the present invention is not limited thereto, and the gist of the present invention lies in a manufacturing procedure in which a high-quality film can be obtained even if the substrate has a different lattice constant. Therefore, the substrate is also In
It is not limited to P, GaAs, and GaP.

As the film formed on the substrate, a general semiconductor film can be used, and InP, GaAs, Si, I
nAlAs, GaInAlAs, InGaAsP, In
GaP, AlInAsP, AlGaInAsP, InG
aAs, GaAsSb, InGaAsN, InGaAs
sBi, TlInGaP, ZnSe, ZnS, Ga
N, AlN, etc. can be used.

[0077]

According to the first aspect of the present invention, by using porous GaAs for the substrate, the defect density of a film having a lattice matching different from that of GaAs can be reduced.
As a second embodiment of the present invention, a high-quality InGaAs that does not lattice-match with InP is obtained using a porous layer of InP,
By using InAlAs having a large band gap for the cladding layer, a semiconductor laser having good temperature characteristics was realized.

As a third embodiment of the present invention, porous Ga
An InGaP buffer that does not lattice match with GaAs is obtained using As, and an In band with a large band gap is formed in the cladding layer.
By using AlAs, a semiconductor laser having good temperature characteristics was realized. As a fourth embodiment of the present invention, a porous I
An AlInP buffer that does not lattice match with InP is obtained using nP, and a large band gap InA is formed in the cladding layer.
By using lAs, a semiconductor laser having good temperature characteristics was realized.

As a fifth embodiment of the present invention, a porous In
GaAsSb that does not lattice match with InP is obtained using P, and InAlAs having a large band gap is formed in the cladding layer.
A semiconductor laser having a good temperature characteristic can be realized by using. According to the sixth embodiment of the present invention, a semiconductor laser having good temperature characteristics can be realized by using porous InP to obtain InGaAs that does not lattice match with InP and using InAlAs having a large band gap for the cladding layer. According to a seventh embodiment of the present invention, a porous InP is used
A semiconductor laser with a short wavelength and good temperature characteristics was realized by obtaining InGaAs that does not lattice match with P, using InAlAs having a large band gap for the clat layer, and obtaining InGaP for the active layer.

[Brief description of the drawings]

FIG. 1 is a graph showing a relationship between a typical III-V semiconductor applied to an embodiment of a semiconductor device and a semiconductor device manufacturing method using a porous substrate of the present invention and a band cap at room temperature.

FIG. 2 is a view showing steps (a), (b), and (c) of forming a film having no lattice matching with a substrate using a porous layer according to the first embodiment and the second embodiment.

FIG. 3 shows a second embodiment and is a band configuration diagram.

FIG. 4 is a view showing a joining / separating step of a second embodiment.

FIG. 5 is a view showing steps (a), (b), and (c) of a third embodiment.

FIG. 6 shows a laser structure diagram and a band configuration diagram showing a third embodiment.

FIG. 7 is a view showing a joining / separating step of a third embodiment.

FIG. 8 is a structural diagram showing a fourth embodiment.

FIG. 9 is a structural diagram showing a fifth embodiment.

FIG. 10 is a structural diagram showing a sixth embodiment.

FIG. 11 is a structural diagram showing a seventh embodiment.

FIG. 12 is a diagram illustrating a configuration example of a conventional semiconductor laser.

FIG. 13 shows a conventional energy difference ΔEc and a temperature characteristic coefficient T.
It is a figure showing relation of o.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Active layer 2 Barrier layer 3 Cladding layer 12, 22 Cladding layer 18 Code active region 14, 24 Active layer 15, 25 Barrier layer 16, 26 Upper light confinement layer 17 Upper cladding layer 101, 201 GaAs (InP) substrate 102, 202 Porous layer 103, 203 Surface layer (single crystal thin film layer) 104, 204 Compound semiconductor layer

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Taku Ezaki 3-30-2 Shimomaruko, Ota-ku, Tokyo F-term (reference) in Canon Inc. 5F073 CA06 CA07 CA13 CA15 CA17 CB02 DA05 DA06 DA28 EA29 5F102 GJ04 GJ05 GJ06 GL00 HC01

Claims (13)

[Claims] A step of forming a porous layer on a substrate; a step of forming a single-crystal thin film having the same element as the substrate on the porous layer; Forming a semiconductor film having a constant different from that of the single crystal thin film; bonding the substrate and another semiconductor substrate such that the semiconductor film is located inside; removing the porous layer after bonding; A method of manufacturing a semiconductor device. 2. A step of forming a porous layer on a substrate, a step of forming a single crystal thin film having the same element as that of the substrate on the porous layer, Forming a different semiconductor film, bonding the substrate to another semiconductor substrate such that the semiconductor film is located inside, removing the porous layer after bonding, and removing the single crystal thin film A method for manufacturing a semiconductor device, comprising the steps of: 3. The semiconductor device according to claim 1, wherein said semiconductor film formed on said thin film is In.
GaAs, InAlP, InAlAs, InGaP, G
ternary compound semiconductors such as aAsSb, InGaAlAs,
InGaAsP, AlInAsP, AlGaInP, I
quaternary compound semiconductors such as nGAsN and TlInGaP;
2. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is a compound semiconductor of five or more elements such as nGaAsBi or InGaAlAsP. 4. The method according to claim 1, wherein the substrate is GaAs, GaP or InP.
4. The method for manufacturing a semiconductor device according to claim 1, wherein: 5. A semiconductor device according to claim 1, wherein the semiconductor film formed on the semiconductor film includes A
The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor device comprises lInAs. 6. The semiconductor device according to claim 1, wherein a lattice constant of a thickest semiconductor thin film formed on the semiconductor film is 0.58 nm ± 0.005 nm. Method of manufacturing. 7. An active layer comprising InGaAs, InGaP,
InGaAsP InGaAlAs, GaAsSb, I
The method of manufacturing a semiconductor device according to any one of claims 4 to 6, comprising nGaN and TlInGaP. 8. The method for manufacturing a semiconductor device using a porous substrate according to claim 1, wherein the semiconductor device is a semiconductor laser. 9. The method for manufacturing a semiconductor device using a porous substrate according to claim 1, wherein the semiconductor device is a field effect transistor. 10. A semiconductor device manufactured by the method for manufacturing a semiconductor device using the porous substrate according to claim 1. Description: 11. The method according to claim 1, wherein an upper portion of the porous layer is buried. 12. The fabrication of a semiconductor device according to claim 1, further comprising the step of forming a semiconductor device including a film having a composition different from that of the semiconductor in a part of a film formed on the semiconductor. Method 13. The method according to claim 1, further comprising a step of removing the substrate and the porous layer after the bonding.