JP2002246279A - Semiconductor substrate, its producing method and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for producing a semiconductor substrate employing a porous film, and a semiconductor substrate, in which a high quality semiconductor film having reduced defect can be formed on the substrate even if the lattice constant is difference between the substrate and a semiconductor material being formed thereon. SOLUTION: On a substrate 1 having a porous layer 2, a crystallized thin film 3 having the same element as the substrate 1 is formed and a semiconductor film 5 having a lattice constant different from that of the thin film 3 is formed on a part of the thin film 3. A dielectric film is formed at least partially on the part of the substrate where the semiconductor film 5 is not formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate, a method for manufacturing the same, and a semiconductor device, and more particularly, to a semiconductor substrate using a compound semiconductor material, a method for manufacturing the same, and a semiconductor device.

[0002]

2. Description of the Related Art Single crystal compound semiconductor materials represented by GaAs and InP are widely used and important materials for high-speed transistors, photodetectors, semiconductor lasers, light emitting diodes and the like. More recently, MOCVD methods,
By improving the crystal growth method by the MBE method, the CBE method, etc., an ultra-thin film configuration has been realized, and a device having unprecedented characteristics has been realized. However, many compound semiconductor materials are still in a state of development despite being materials having such excellent characteristics. The cause is that the substrate for growing the compound semiconductor is limited.

In order to manufacture a compound semiconductor device having excellent characteristics, it is necessary to grow a semiconductor material having few defects. If the lattice constant of the substrate is different from the lattice constant of the grown compound semiconductor material, the grown compound semiconductor material becomes defective, and desired characteristics cannot be obtained.

[0004] As a substrate currently in practical use, S
Although i, GaAs, InP, InAs, InSb, and the like can be used, the compound semiconductor materials that can be used by these substrates are few in view of the entire compound semiconductor, and a technique for growing a compound semiconductor material having an arbitrary lattice constant is not known. ,
It is thought to have a great influence on the future development of compound semiconductor material technology.

As an example of studying the growth of a material different from the lattice constant of the substrate, there is a device in which a GaAs device is formed on a Si substrate. Ga with few defects on Si substrate
A method of forming a layer having a lattice constant between these two materials at the interface between the Si and the GaAs film to grow As, a method of inserting a superlattice structure to reduce threading dislocation,
Further, several lattice relaxation methods and defect reduction methods have been proposed, such as a two-step growth method in which GaAs is once formed at a low temperature, then the temperature is increased and then crystallized to confine crystal defects in a low-temperature layer.

As a result of these studies, a GaAs semiconductor laser that continuously oscillates at room temperature on a Si substrate has been realized.

However, unfortunately, the service life is short, and there is a great difference in characteristics from a product formed on a GaAs substrate, so that it has not been put to practical use. The root cause is that defects generated due to a difference in lattice constant cannot be reduced.

Recently, as another method, a method of forming a compound semiconductor film on a silicon substrate with porous silicon sandwiched therebetween has been proposed (JP-A-10-3321535).
No.). In this method, a silicon substrate having a porous region is subjected to a heat treatment in order to seal holes on the surface of the porous region, and a compound semiconductor layer is laminated on the substrate.

When the compound semiconductor layer is manufactured in this manner, the lattice defects and strains caused by the lattice matching with the silicon substrate and the difference in the coefficient of thermal expansion generated when the temperature is lowered from the film formation temperature to room temperature can be reduced by the porous structure. Is introduced only into the ultra-thin silicon layer that seals the pores of the porous silicon, and not into the compound semiconductor layer. This is because the ultra-thin silicon layer formed on the porous layer, which is more fragile than bulk silicon, is much more fragile than the grown compound semiconductor layer. In this way, the layer into which defects are introduced is preferentially introduced only into the ultra-thin silicon layer instead of the compound semiconductor layer, so that a compound semiconductor layer with very few defects can be formed.

Furthermore, in this method, a compound semiconductor substrate can be manufactured at a lower cost than in the conventional example, since a method which involves the production cost such as bonding and selective etching of the substrates as in the conventional example is not used.

However, the above method has been proposed as a method for forming a compound semiconductor on a silicon substrate. The substrate for forming the compound semiconductor is the same compound semiconductor as the silicon substrate for the purpose of preventing the generation of antifuse domains and improving the wettability to facilitate two-dimensional growth. It is often better to use a substrate. Further, in many compound semiconductors, GaAs, InP, GaP are more preferable than silicon.
Are more suitable for growing a compound semiconductor in many cases because the difference in lattice constant and the difference in thermal expansion coefficient are closer.

[0012]

SUMMARY OF THE INVENTION According to the present invention, even if the substrate and the semiconductor material formed thereon have different lattice constants,
It is an object of the present invention to provide a semiconductor substrate using a porous film capable of forming a high-quality semiconductor film with few defects on the substrate, a manufacturing method thereof, and a semiconductor device.

[0013]

According to the present invention, there is provided a semiconductor substrate comprising:
A structure in which a crystallized crystal thin film having the same element as the substrate is provided on a substrate having a porous layer, and a semiconductor film having a lattice constant different from that of the crystal thin film is partially provided on the crystal thin film. And a dielectric film is formed on at least a part of the substrate on which the semiconductor film is not formed.

The semiconductor substrate of the present invention has a crystallized crystal thin film having the same element as the substrate on a substrate having a porous layer, and further has a crystal constant and a lattice constant on the crystal thin film. The semiconductor device has a different semiconductor film, and a dielectric film is formed at least in part between the substrate and the semiconductor film.

According to the method of manufacturing a semiconductor substrate of the present invention, a step of forming a porous layer on a substrate, a step of forming a single crystal thin film having the same composition as that of the substrate on the porous layer, A step of partially forming a dielectric film on the thin film; and a step of forming a semiconductor film having a lattice constant different from that of the substrate using the dielectric film as a mask.

According to the method of manufacturing a semiconductor substrate of the present invention, a step of forming a porous layer on a substrate, a step of forming a single-crystal thin film having the same composition as that of the substrate on the porous layer, A step of partially forming a dielectric film on the thin film, a step of forming a semiconductor film having a lattice constant different from that of the substrate using the dielectric film as a mask, and attaching and transferring the semiconductor film to another substrate And a step of separating the original substrate.

According to the method of manufacturing a semiconductor substrate of the present invention, a step of forming a porous layer on a substrate, a step of forming a single crystal thin film having the same composition as that of the substrate on the porous layer, Forming a dielectric film partially on the thin film, forming a semiconductor film having a lattice constant different from that of the substrate using the dielectric film as a mask, and forming the semiconductor film on the dielectric film in a lateral direction. And a growing step.

According to the method of manufacturing a semiconductor substrate of the present invention, there are provided a step of forming a porous layer on a substrate, a step of forming a single-crystal thin film having the same composition as that of the substrate on the porous body, A step of partially forming a dielectric film thereon, a step of forming a semiconductor film having a different lattice constant from the substrate using the dielectric film as a mask, and a step of laterally growing the semiconductor film; Attaching and transferring the semiconductor film to another substrate,
Separating the original substrate.

[0019]

(Embodiment 1) An embodiment of the present invention will be described with reference to FIG. In this example, a porous layer formed on a substrate is used.

The substrate 1 shown in FIG. 1A is made of GaAs. A porous GaAs shown in 2 was formed thereon. Porous Ga
P. As can be formed by anodizing n-type GaAs in HCl. Schmuki et al. (Jou
rnal of Electrochemical S
ociety 143, p, 3316 (1996))
And Wada et al. (Preprints 29a-P
C-25). In FIG. 1A, reference numeral 1 denotes GaAs having a (111) plane having a porous region 2.
The substrate has a thickness of 450 μm.

In order to manufacture such a substrate, n-Ga
After cleaning the As substrate by organic cleaning or the like,
An electrode was formed on the back surface of the substrate. Thereafter, anodization was performed in an HCl solution to form a porous region on the GaAs substrate surface. The manufacturing conditions for porous GaAs are as follows.
Anodization was performed for 10 minutes at a flow rate of 0 M / cm ² , the porous thickness was 10 μm, and the porosity was 30%.

Next, as shown in FIG.
On the surface of the As layer 2, a layer 3 of a surface portion in which the holes were sealed was formed. In order to form such a layer 3, the GaAs substrate 1 on which the porous layer 2 is formed is placed on a molecular beam epitaxy apparatus (M
(BE method), the substrate was heated to about 600 ° C. while irradiating As, and held for 20 minutes. At this time, GaA
The oxide film on the surface of the s-substrate was removed, and at the outermost surface of the porous GaAs2, Ga migration occurred in the direction in which the unevenness was smoothed and the surface energy decreased.

As a result, the surface of the porous GaAs layer 2 is flattened and buried as a thin GaAs single crystal film 3.
At this time, the reflected electron beam diffraction image (RHEED) changes from a spot to a streak.

At this time, it is possible to further promote the sealing of the holes by irradiating a small amount of Ga beam.

The thickness of the GaAs single crystal layer 3 formed on the surface is extremely thin, approximately equal to or less than the diameter of the hole, specifically 100 nm or less, more preferably 30 nm or less. This thin GaAs single crystal layer 3
Plays an important role of transmitting the orientation information to the layer laminated thereon. On the other hand, if the GaAs single crystal is too thick, it becomes impossible for the porous layer to reduce the strain due to the difference in lattice constant. That is, the thickness of the layer filling the holes is desirably sufficiently smaller than the thickness of the semiconductor layer formed thereon, and is, for example, preferably 1/5 or less, more preferably 1/100 or less. More specifically, it is in the range of 1 nm to 100 nm, more preferably 1 nm.
It is desirable to consider the thickness of the compound semiconductor between nm and 50 nm. However, the lower limit is 0.3 nm.

Another technique for promoting hole sealing is migration enhanced epitaxy (ME).
There is a method using E). It is effective to promote the migration of group III atoms using this technique.
This method is applicable to III-type devices such as GaAs, InP, and GaP.
In the case of a group V semiconductor, this is a method in which only group III is supplied in order to promote the migration of group III atoms, and the supply amount of group V is limited until the group III reaches an appropriate site.

In the above example, the configuration using the MBE method has been described as a method for filling the porous surface.
The method is not limited to this method.
E method) or MOCVD method. The point is that a good quality semiconductor film can be formed. Similar effects can be obtained by using not only a solid source but also an organic compound such as trimethylgallium or arsine as a form of the supply material.

Next, the substrate is taken out of the apparatus and
A dielectric film (here, SiN) shown in 4 of (b) was formed. Here, SiN _x is formed to a thickness of 100 nm. This SiN _x film is formed using ordinary photolithography as shown in FIG.
An opening shown in 8 of (c) was provided, and the thin GaAs layer 3 was exposed. In this example, the width of the opening is 100 μm, and the pitch is 2000 μm.

The substrate thus formed is put into an LPE apparatus, and as shown in FIG. 1 (d), a semiconductor having a selectively different lattice constant, InGaAs (In composition 0.3
8) was epitaxially grown to a thickness of 1 μm. The growth start temperature was 800 ° C., and the slow cooling rate was 10 ° C./h.

The growth rate of InGaAs is slow on the (111) vertical plane, but is on the side (111) A plane and (111) plane.
A fast speed can be obtained on the B side and the like. As a result, FIG.
(E) As shown in 6 of FIG. 6, the surface of SiN _x 4 is made of InGaAs.
Filled by lateral growth.

The etch pit density of the InGaAs film thus formed was measured. InGaAs grown on the GaAs thin film of No. 3 shown in No. 5 used a porous layer, and the etch pitch was 10 ⁶ cm ^-2 , which is a little smaller than usual, which was reduced by about one digit. Further, the SiN _x shown in FIG.
The etch pitch density of the upper InGaAs film 6 was reduced to 10 ⁴ cm ⁻² or less as a result of the lower InGaAs of 5 as a base.

By using the six InGaAs layers having a low defect density, a high-quality film was obtained, and a device having good characteristics was realized.

A stripe having the cross-sectional structure described with reference to FIGS. 1A to 1E was formed on the substrate 9 in FIG. Figure 1
(A)-(e) is the figure seen from the arrow direction of FIG. In consideration of embedding as shown in FIG. 1E, it is necessary to control the stripe pitch in FIG. Here, the stripe was formed in the <0-11> direction. In this example, they are formed at a pitch of 2100 μm, and the gap between the grooves is
m. By forming them at equal intervals in this manner, it became possible to fill the entire substrate.

Although embedded here, it is possible to use without embedding. For example, by transferring a partially formed film to another substrate, it is possible to partially form a region having a different lattice constant.

As described above, by using the thin GaAs film formed on the porous film, the etch pitch density of the InGaAs film formed thereon can be reduced. Furthermore, by growing in the lateral direction, it is possible to reduce the introduction of defects from the substrate side, so that it is possible to realize InGaAs with a low defect density, which has not been achieved conventionally.

Here, S described in FIGS. 1B and 1C is used.
There are several procedures for producing an opening in iN _x other than the method described above.

First, a thin GaAs layer is formed on the porous layer.
Before forming the s film, a dielectric film (Si) is directly formed on the porous layer.
After forming N _x ) and patterning SiN _x , the opening GaAs portion is crystallized to form thin GaAs.

Second, nonporous Ga is used.
After a dielectric film is directly formed on an As substrate, the dielectric film is removed by patterning.
In this procedure, the film is made porous, and finally, the surface of the porous GaAs is crystallized to form thin GaAs.

In this case, the LPE method was used as a means for forming the InGaAs film.
Lateral growth can also be realized by a CVD) method, a hydride VPE method or the like, and is not limited to the LPE method.

As described above, by using a thin semiconductor layer on a substrate having a porous layer, it is possible to reduce the defect density of semiconductor layers having different lattice constants thereon. In addition, by using the low-defect semiconductor layer formed on the porous material and utilizing the lateral growth of the semiconductor film, a very low-defect-density semiconductor film having a different lattice constant from the substrate can be formed. Was.

Embodiment 2 FIG. 3 shows the second embodiment.
This will be described with reference to (a) to (d). This embodiment shows a means for more effectively using a film whose lattice constant does not match that of the substrate in the first embodiment.

As shown at 6 in FIG. 1 (e), high quality InGaAs was partially obtained. Unfortunately, the defect density of the InGaAs region shown in FIG.
An order of magnitude higher. This shows means for solving this.

This will be described with reference to FIG. FIG. 3 (a)
Reference numeral 7 denotes a Si substrate. The configuration shown in FIG. 1E is attached to this Si substrate using the InGaAs film surface as a bonding surface. 6 is InGaAs with a low defect density, and 4 is a dielectric film (S
iN _x ) and 3 are thin GaAs films. 2 is a porous layer.

At the stage where the attachment was completed, as shown in FIG. 3B, the GaAs substrate 1 was removed by polishing, and then the porous GaAs layer 2 was removed by dry etching of chlorine. As a means for removing the porous GaAs, wet etching may be used. Since the etching rate ratio between the porous GaAs and the crystallized GaAs is 100 times or more, there is no problem that the difference in the etching rate cannot be obtained by removing with the sulfuric acid-based wet etching.

Subsequently, the InGaAs layer 5 was removed by dry etching to obtain a structure shown in FIG.
At this time, the dielectric layer (SiN _x ) 4 is used as a mask.

Finally, ashing is performed on the SiN _x shown in FIG. 4 to form a high-quality In with a low defect density as shown in FIG.
Only the GaAs film 6 was transferred onto the Si substrate 7.

The Si substrate used here is not limited to Si, but may be a semiconductor such as GaAs, InP, GaP, or the like.
There is no particular limitation as long as bonding is possible, such as a metal or dielectric film.

FIG. 4A shows that the InGaAs film 5 is removed at the stage shown in FIG. 3C, and then the lateral growth is performed again to bury the portions corresponding to the region 5 so as to form a whole. This is an example of realizing InGaAs with a low defect density.

The details will be described below.

5 InG by dry etching of chlorine
The aAs was removed to obtain a shape as shown in FIG. Thereafter, in order to remove the surface damage layer due to dry etching, InGaAs corresponding to 6 exposed in the groove was slightly etched with a sulfuric acid-based etchant. After this,
Here, InGaAs is grown by MOCVD using trimethylindium, triethylgallium, and arsine.
The portion of the opening after removing s was filled to form InGaAs with a low defect density.

Finally, as shown in FIG.
It has become possible to uniformly form the nGaAs film on the Si substrate 7. In the case of embedding by MOCVD, a thin (10 nm to 5 nm)
000 nm).

In this embodiment, the method of removing GaAs as the original substrate in FIG. 3A was performed by polishing. However, this GaAs substrate was not removed, and only the porous GaAs of 2 was formed using a sulfuric acid-based etchant. It may be selectively etched. In this case, the higher the porosity, the more easily the etching difference from the single crystal film can be obtained. Therefore, it is necessary to perform etching while controlling the porosity.

As described above, it is possible to select only a high-quality film by removing the InGaAs film having a relatively high defect density, which is not formed in the lateral direction, by transferring the film to another substrate. Becomes Further, by growing again, it is possible to form a film with a low defect density having a lattice constant which has not been obtained conventionally.

Embodiment 3 Embodiment 3 describes a method for manufacturing a semiconductor device on a film having a lattice constant different from that of a substrate. Here, In is used as a substrate for forming a porous material.
P was used. The method for producing an InP substrate having a porous layer is the same as the method described in the first embodiment. n-
After the InP substrate was ultrasonically irradiated with isopropyl alcohol and methyl alcohol, InP was
An electrode for making electrical contact was produced. Thereafter, anodizing treatment was performed in an HCl solution to form a porous region on the surface of the InP substrate.

Subsequently, a thin InP surface layer in which pores were sealed was formed on the porous InP. In order to form such a layer, the porous InP substrate is carried into a molecular beam epitaxy apparatus. In Example 1, As was supplied to form GaAs, but here, the substrate temperature was heated to about 530 ° C. while irradiating P to form an InP thin film. By this process, migration of In occurs in the direction of smoothing the unevenness on the surface of the porous InP and lowering the surface energy. As a result, the surface of the porous InP is flattened and buried as a thin InP single crystal film. still,
At this time, it is possible to further promote the sealing of the holes by irradiating a small amount of In beam.

In this example, the element to be supplied is supplied in a solid state, but is not necessarily limited to the solid element. Chemical Beam using organometallic materials such as trimethylindium and hydride phosphine
Epitaxy, MOCVD, or the like may be used.

Subsequently, a layer having a partially different lattice constant is formed using a selective dielectric film in the same manner as in the first embodiment, and is later spread over the entire substrate by lateral growth. This method is the same as in the first embodiment. Further, the second embodiment may be configured as in the second embodiment. Here, an InGaP layer having a lattice constant of 0.58 μm was formed.

In FIG. 5, the I of the lattice constant of 0.58 μm
An example in which a semiconductor laser is manufactured using an nGaP film will be described.
Reference numeral 11 denotes a substrate containing InGaP. An n-In _0.35 Al _0.65 As which is a clad shown by 12 is formed thereon.

This composition cannot be used in the case of matching with InP. As a result of the increase in the Al composition as compared with the case of matching with InP, the band cap of InAlAs increases by about 0.55 eV. A light confinement layer n-In _0.48 Ga _0.38 Al _0.16 As shown in 13 was formed _thereon .
Reference numeral 14 denotes an active region, which includes an active layer and a barrier layer. The active layer 18 is n-In _0.53 Ga _0.47 A
s, and 1.2% compression strain. The barrier layer 19 is formed in a two-layer configuration so as to sandwich the active layer. This barrier layer has the same configuration as the optical confinement layer shown in FIG. 13 and is not doped.

After p-In _0.48 Ga _0.38 Al _0.16 As, which is the upper optical confinement layer shown in FIG.
P-In _0.35 Al _0.65 which is the upper cladding layer shown in FIG.
As was formed. Finally, p-In _0.38 Ga shown in FIG.
_It has a configuration in which _0.62 As is formed.

The merit of this configuration is that the lattice constant is 0.5
Since it can be reduced to 8 nm, InAlAs having a large band cap can be used for the cladding, and the energy difference ΔEc between the active layer and the barrier layer in the conduction band is increased to 0.54 eV, so that the confinement of electrons can be achieved. A laser that can be improved, has less leakage of carriers at high temperatures, and can operate stably. In addition, the commonly used I
The energy difference between the active layer and the barrier layer in the conduction band of the nGaAsP barrier is as small as 0.15 eV, and the temperature characteristics are poor. As described above, controlling the lattice constant can improve the characteristics of an optical device and an electronic device. In this case, the laser structure was formed on the transferred InGaP film.
A semiconductor laser may be directly grown in a configuration as shown in FIG.

As described above, a semiconductor device having a band gap, which cannot be manufactured using a conventional substrate, has an arbitrary lattice constant by a lattice control method using a porous film. A substrate can now be manufactured.

(Embodiment 4) Embodiment 4 describes an example in which an InP substrate having a (100) plane on the surface is used.
The method for producing an InP substrate having a porous layer is the same as the method described in the third embodiment. After the n-InP substrate was subjected to supersonic cleaning with isopropyl alcohol and methyl alcohol, an electrode was made to make electrical contact with In on the back surface of the substrate. Thereafter, anodizing treatment was performed in an HCl solution to form a porous region on the surface of the InP substrate.

Subsequently, a thin InP surface layer in which pores were sealed was formed on the porous InP. In order to form such a layer, the porous InP substrate was carried into a molecular beam epitaxy apparatus. Substrate temperature 5 while irradiating P
Heated to about 30 ° C. By this process, migration of In occurs in the direction of smoothing the unevenness on the surface of the porous InP and lowering the surface energy. As a result, the porous I
The surface of nP has been flattened and buried as a thin InP single crystal film.

At this time, it is possible to further promote the sealing of the holes by irradiating a small amount of In beam. In this example, the element to be supplied is supplied in a solid state, but is not necessarily limited to the solid element. Chemical Beam Epitaxy using organometallic materials such as trimethylindium and hydride phosphine
Alternatively, an MOCVD method or the like may be used.

Subsequently, it is possible to form a layer having a partially different lattice constant by using a selective dielectric film as in the first embodiment, and to spread the layer over the entire substrate later by lateral growth. As a method of filling the whole, if the thickness is basically increased, the growth proceeds in the lateral direction and the whole is filled. However, in order to perform the process more efficiently, the growth rate of the slope portion may be increased.

FIG. 6 shows Ga by the CBE growth method or the MBE method.
This shows the growth rate on the (100) plane and the growth rate on the plane inclined in the <011> and <0-11> directions from the (100) plane when As is grown. (10
A plane having a low speed is formed at an angle of about 20 ° from the 0) plane, but the growth rate increases before and after that, which is a desirable configuration in the lateral direction. In particular, the fastest growth rate was obtained on slopes of 20 ° or less.

In the CBE method or the like, the growth rate difference between the A-plane and the B-plane is relatively small and shows the same tendency, but is different in other methods. FIG. 7 shows a growth rate on the (100) plane when GaAs is grown by the MOVPE method and a growth rate when the GaAs is inclined from the (100) plane. (10
0) The angle of inclination from the plane is around 25 ° (20 ° to 30 °)
The peak of the growth rate was formed in the sample, and the growth rate was decreased at an angle after that. 45 degrees with the (100) plane
It is desirable to use a surface having a degree of less than or equal to a high growth rate. In MOVPE, the difference between A side and B side is relatively large,
The speed is faster on the A surface (Ga is easily exposed). Here, the growth rates of the A-plane and the B-plane are as follows:
It refers to the growth rate that occurs when the crystal plane is tilted in the direction in which the Ga plane is likely to emerge, and when the crystal plane is inclined in the direction in which As is likely to emerge.

FIG. 8 is a schematic diagram showing the plane dependence of the growth rate when GaAs is grown by the hydride VPE and chloride VPE methods. In the growth on A-side (11
1) The growth rate of the surface is high, which is considered to be suitable in the lateral direction. In the B-plane orientation, the (311) plane is desirably fast in speed. In other words, the fast growth rate depends on the growth method,
It is necessary to reflect on the structure.

In this embodiment, (11) is placed on the (100) surface.
1) InGaP was grown by the hydride VPE method so that the A-plane was exposed to the side. In this method, as compared with the growth rate of the (100) plane in the stacking direction, the (11)
1) The growth speed of the A-plane is as high as 2-3 times, and the speed of covering the surface is also high. In this embodiment, the hydride VPE is used. However, the present invention is not limited to this growth method. In the CBE method, (1) is used in a plane region inclined about 10 ° from the (100) plane.
The growth rate is faster than the (00) plane, and the use of this plane makes it possible to fill the surface. Similarly, MOCV
The method D also has a growth rate peak at about 20 °.
By forming a surface having this angle, the surface can be filled efficiently. This tendency also changes depending on the growth conditions. The important thing is to understand the growth rate of the lamination method and the growth rate in the lateral direction, and to increase the growth rate in the lateral direction to fill efficiently.

(Embodiment 5) Embodiment 5 is an example of embedding by realizing a plane having a higher lateral growth rate by rotating the azimuth of forming the stripe in the wafer plane.

Referring to FIG. FIG. 20 is a view of a GaAs wafer having a (100) plane as viewed from above. S on this
An iNx mask was formed, and the lateral growth rate of the InP film thereon was evaluated. 21 indicates an orientation <0-1-1>,
Reference numeral 22 denotes <0-11>. 22 from 21 directions
The growth rate was measured by controlling the patterning of the dielectric film so as to change the arrow 23.

FIG. 10 shows the results. The vertical axis is the growth rate,
The horizontal direction is the angle θ shown in FIG. The growth rate in the lateral direction increases with increasing distance from the <0-1-1> direction.
It has a peak around 40 °. It decreases around 45 °, and after that, has a second peak around 55 ° to 75 °. From this result, the lateral growth rate is 1
It can be seen that 0 ° to 40 ° and 55 ° to 75 ° are earlier. Therefore, stripes are formed so that a slope is formed in this direction, and InGaAs that is not lattice-matched on the InP substrate is formed.
g was grown.

This will be described with reference to FIG. 2 stripes
When tilted as shown in FIG. 7, the slope of the stripe became a growth surface in the lateral direction, and the growth rate of this slope could be filled approximately twice as fast as the growth rate in the <0-1-1> direction. .

As described above, by changing the direction of the stripe and exposing the surface having the fast growth rate in the lateral direction to the slope, the embedding can be accelerated.

(Embodiment 6) A sixth embodiment of the present invention will be described. The method of forming a porous film using a p-type GaAs substrate having a (111) plane having a thickness of 500 μm is the same as that in the first embodiment.

After that, after forming a thin GaAs film on the surface, the dielectric film was patterned. This step is the same as in the first embodiment. The width of the opening of the dielectric film is 5 μm and the pitch is 205 μm. Thereafter, a GaN layer was selectively formed in the opening of the dielectric. MOCVD
Method is used. Selective growth was performed using triethylgallium and ammonia. Thereafter, if GaN was simply continued to grow, the growth rate of GaN in the lateral direction was relatively high, so that the surface of the dielectric film could be easily covered.

When the dislocation density of this wafer was measured by a transmission electron microscope, a value of 10 ⁵ cm ⁻¹ or less could be obtained. In addition, Ga grown laterally and formed on a dielectric film was used.
In N, a value of 10 ⁴ cm ⁻¹ or less is obtained.

On the substrate thus formed, a p-type GaN layer, a p-Al _0.15 Ga _0.85 N layer and an In _0.05 Ga
_{A 0.95} N layer and an n-Al _0.15 Ga _0.85 N layer were sequentially laminated.
The dopant is Mg for p-type and Si for N-type. A Ti / Al electrode and an Al electrode were formed on the wafer, and the wafer was made ohmic to produce a light emitting diode. The external quantum efficiency of a diode grown on a substrate having a low defect density is 10%.

As described above, by obtaining a porous film, a semiconductor film having an arbitrary lattice constant and a low defect density can be obtained, and a new device can be realized.

In this embodiment, InGaAs, GaN, and InP are formed on a porous substrate.
Although the system was mentioned, it is not particularly limited to this. The present invention is to obtain an arbitrary lattice constant, and for this purpose, it can be applied to all crystals.

Further, even when a material whose lattice constant does not match that of the substrate is formed, it is a promising manufacturing method. S on GaAs
It is also promising to form an i film or an InP film. In particular, a compound semiconductor film which could not be realized without a substrate is a desirable embodiment. For example, binary systems having different lattice constants, InGaAs, GaAsP, InGaP,
Ternary mixed crystals such as GaAsSb, InAsAs, and AlI
4 such as nAsP, InGaAsP, InGaAsAs, etc.
The original mixed crystal is raised. In particular, a ternary mixed crystal capable of lattice matching,
A quaternary mixed crystal and a quaternary mixed crystal or more are desirable for performing lattice control.

The substrate on which the porous material of the present invention is formed is not limited to GaAs or InP. For example, Si, GaP, InSb, and the like are also effective as long as they can form porous material.

[0084]

According to the present invention, a thin single-crystal semiconductor thin film is formed on the surface of a substrate having a porous region, and a dielectric film is partially formed on the surface, and the semiconductor film is grown using the dielectric film as a mask. By controlling the direction in which the defects extend, it is possible to form a high-quality semiconductor film having a different lattice constant.

After forming a thin single-crystal thin film on the surface of a substrate having a porous region, a dielectric film is partially formed on this surface, and a film having a lattice constant different from that of the substrate is selectively grown. By transferring this film to a punishable substrate, it is possible to control the direction in which the defects extend, and to form a high-quality film having a different lattice constant. Becomes

When the patterning direction of the dielectric film is controlled, it is possible to improve the growth rate and form a high-quality surface having a different lattice constant.

[Brief description of the drawings]

FIG. 1 is a view showing a process in a first embodiment.

FIG. 2 is a plan view showing a stripe of a substrate according to the first embodiment.

FIG. 3 is a view showing a process according to a second embodiment.

FIG. 4 is a view showing a process according to a second embodiment.

FIG. 5 is a structural diagram showing a third embodiment.

FIG. 6 is a diagram for explaining the structure of a fourth embodiment.

FIG. 7 is a diagram for explaining a structure of a fourth embodiment.

FIG. 8 is a diagram for explaining the structure of a fourth embodiment.

FIG. 9 is a diagram for explaining the structure of a fifth embodiment.

FIG. 10 is a diagram for explaining the structure of a fifth embodiment.

FIG. 11 is a view for explaining the structure of a fifth embodiment.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 GaAs substrate 2 Porous GaAs 3 Thin GaAs layer (surface layer, thin GaAs single crystal film) 4 Dielectric film (SiNx) 5 InGaAs (In composition 0.38) 6 InGaAs lateral growth 7 Si substrate 8 Opening Part 9 Stripe 11 Substrate containing InGaP 12 Clad (n-In0.35A10.65As) 13 Optical confinement layer (n-In0.48Ga0.38A)
10.16 As) 14 Active region 15 Upper optical confinement layer (p-In0.48Ga0.3
8A10.16As) 16 Upper cladding layer (p-In0.35A10.65)
As) 17 p-In0.38Ga0.62As 18 Active layer (n-In0.53Ga0.47As) 19 Barrier layer (two-layer structure) 20 GaAs wafer 21 Orientation <0-1-1> 22 Orientation <0-11> 27 stripe

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Taku Ezaki 3-30-2 Shimomaruko, Ota-ku, Tokyo F-term in Canon Inc. (reference) 5F041 AA40 CA34 CA35 CA40 CA65 CA77 5F045 AA04 AA05 AB17 AB18 AC02 AC08 AC09 AF03 AF04 BB12 5F073 CB02 CB04 DA05 DA21 DA28 DA35

Claims (24)

[Claims] 1. A semiconductor film having a crystallized crystal thin film having the same element as a substrate on a substrate having a porous layer, and further having a lattice constant different from that of the crystal thin film on a part of the crystal thin film. And a dielectric film is formed on at least a part of the substrate on which the semiconductor film is not formed. 2. A crystallized crystal thin film having the same element as the substrate is provided on a substrate having a porous layer, and a semiconductor film having a lattice constant different from that of the crystal thin film is provided on the crystal thin film. A semiconductor substrate, wherein a dielectric film is formed at least in part between the substrate and the semiconductor film. 3. The semiconductor substrate according to claim 2, wherein a dielectric film is formed at least in part between said porous layer and said semiconductor film. 4. The semiconductor substrate according to claim 2, wherein a dielectric film is formed at least partially between said single crystal thin film and said semiconductor film. 5. The substrate having the porous layer is made of Si, I
5. The semiconductor substrate according to claim 1, wherein the semiconductor substrate is nP, GaAs, or GaP. 6. The semiconductor substrate according to claim 1, wherein said substrate has a (111) plane. 7. The semiconductor substrate according to claim 1, wherein said substrate has a (100) plane. 8. The semiconductor substrate according to claim 7, wherein the angle between the direction in which the inclined surface of the semiconductor film extends and the [0-1-1] axis is from 55 ° to 75 °. 9. The semiconductor substrate according to claim 7, wherein the angle between the direction in which the inclined surface of the semiconductor film extends and the [0-1-1] axis is 15 ° to 40 °. 10. The semiconductor substrate according to claim 7, wherein an angle between the inclined surface of the semiconductor film and the (100) plane is smaller than 20 °. 11. The semiconductor substrate according to claim 7, wherein the angle between the inclined surface of the semiconductor film and the (100) plane is from 20 ° to 30 °. 12. The semiconductor film according to claim 1, wherein the inclined surface is (111) A.
10. The semiconductor substrate according to claim 7, wherein the semiconductor substrate has a surface. 13. The semiconductor film according to claim 1, wherein the semiconductor film is a single element, a binary compound, a ternary mixed crystal, a quaternary mixed crystal, or a mixed crystal of five or more elements. Semiconductor substrate. 14. A semiconductor device structure formed on the semiconductor film of the semiconductor substrate according to claim 1. Description: 15. A step of forming a porous layer on a substrate, a step of forming a single-crystal thin film having the same composition as that of the substrate on the porous layer, and partially forming a dielectric on the single-crystal thin film. A method for manufacturing a semiconductor substrate, comprising: forming a film; and using the dielectric film as a mask, forming a semiconductor film having a lattice constant different from that of the substrate. 16. A step of forming a porous layer on a substrate, a step of forming a single-crystal thin film having the same composition as that of the substrate on the porous layer, and partially forming a dielectric on the single-crystal thin film. Forming a film, using the dielectric film as a mask, forming a semiconductor film having a lattice constant different from that of the substrate, attaching the semiconductor film to another substrate, and transferring the semiconductor film. Separating the semiconductor substrate. 17. A step of forming a porous layer on a substrate, a step of forming a single-crystal thin film having the same composition as that of the substrate on the porous layer, and partially forming a dielectric on the single-crystal thin film. Forming a film, using the dielectric film as a mask, forming a semiconductor film having a different lattice constant from the substrate, and laterally growing the semiconductor film on the dielectric film.
A method for manufacturing a semiconductor substrate, comprising: 18. A step of forming a porous layer on a substrate, a step of forming a single-crystal thin film having the same composition as that of the substrate on the porous body, and partially forming a dielectric film on the single-crystal thin film Forming a semiconductor film having a lattice constant different from that of the substrate using the dielectric film as a mask; growing the semiconductor film in a lateral direction; and applying the semiconductor film to another substrate. A method for manufacturing a semiconductor substrate, comprising a step of attaching and transferring and a step of separating an original substrate. 19. After forming a single-crystal thin film on the porous layer, forming the inducer film, removing the dielectric film by patterning, removing the semiconductor from the single-crystal thin film exposed from the opening. 19. The method according to claim 15, wherein the film is grown epitaxially. 20. forming the dielectric film on the porous layer, patterning and removing the dielectric film, forming a single-crystal thin film on the porous layer exposed from the opening, The semiconductor film is epitaxially grown from the single crystal thin film exposed from the opening.
19. The method for manufacturing a semiconductor substrate according to any one of items 18 to 18. 21. After forming a dielectric film on the substrate, removing the dielectric film by patterning, forming a porous layer on the substrate exposed from the opening, 2. A semiconductor film is epitaxially grown from the single crystal thin film exposed from an opening after forming a single crystal thin film layer on the porous layer which is easily exposed.
19. The method for manufacturing a semiconductor substrate according to any one of 5 to 18. 22. A semiconductor device comprising: MOVPE, CBE,
22. The method of manufacturing a semiconductor substrate according to claim 15, wherein the semiconductor substrate is formed by a hydride VPE method. 23. The method according to claim 15, wherein the patterning of the dielectric film is controlled in a predetermined crystal direction. 24. The dielectric film according to claim 15, wherein an angle between a longitudinal direction of the stripe and the [0-1-1] axis is from 55 ° to 75 °. 22. The method for manufacturing a semiconductor substrate according to any one of the items 22.