JPS628513B2 - - Google Patents

Info

Publication number
JPS628513B2
JPS628513B2 JP960080A JP960080A JPS628513B2 JP S628513 B2 JPS628513 B2 JP S628513B2 JP 960080 A JP960080 A JP 960080A JP 960080 A JP960080 A JP 960080A JP S628513 B2 JPS628513 B2 JP S628513B2
Authority
JP
Japan
Prior art keywords
oxide film
silicon oxide
exposed
negative resist
resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP960080A
Other languages
Japanese (ja)
Other versions
JPS56108880A (en
Inventor
Akira Abiru
Yoshiaki Tanimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP960080A priority Critical patent/JPS56108880A/en
Publication of JPS56108880A publication Critical patent/JPS56108880A/en
Publication of JPS628513B2 publication Critical patent/JPS628513B2/ja
Granted legal-status Critical Current

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  • ing And Chemical Polishing (AREA)
  • Drying Of Semiconductors (AREA)

Description

【発明の詳細な説明】 本発明は、酸化シリコン膜を選択的に除去し、
所定形状にパターニングする方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention selectively removes a silicon oxide film,
The present invention relates to a method of patterning into a predetermined shape.

従来半導体装置の製造方法等において、基板上
の酸化シリコン膜を選択的に除去し、所定の微細
パターン形状にパターニングするには酸化シリコ
ン膜上にネガ型又はポジ型の感光性樹脂(フオ
ト・レジスト)を塗布し、この上に所定パターン
を有するフオト・マスクなどをのせ、紫外線など
を照射し、現像液で現像することにより、該感光
性樹脂を選択的に除去し、該感光性樹脂をマスク
として該酸化シリコン膜を通常の湿式又は乾式エ
ツチング法により選択的に除去している。このよ
うな方法では感光性樹脂を現像する工程が必要で
あり、特に半導体基板上の酸化シリコン膜をパタ
ーニングする際には該現像液により半導体基板が
汚染する問題がある。また感光性樹脂としてネガ
型レジストを使用する場合、ネガ型レジストは、
一般に現像液に浸漬することにより膨潤する傾向
があるため、1μ程度の微細パターンの形式を精
度良く行なうことが、困難である問題がある。
In conventional semiconductor device manufacturing methods, a negative or positive photosensitive resin (photoresist) is used on the silicon oxide film to selectively remove the silicon oxide film on the substrate and pattern it into a predetermined fine pattern shape. ), place a photo mask or the like with a predetermined pattern on it, irradiate it with ultraviolet rays, and develop it with a developer to selectively remove the photosensitive resin and mask the photosensitive resin. Then, the silicon oxide film is selectively removed by a conventional wet or dry etching method. Such a method requires a step of developing the photosensitive resin, and there is a problem in that the semiconductor substrate is contaminated by the developer, especially when patterning a silicon oxide film on a semiconductor substrate. In addition, when using a negative resist as a photosensitive resin, the negative resist is
Generally, there is a problem that it is difficult to accurately form a fine pattern of about 1 μm because it tends to swell when immersed in a developer.

本発明は上記問題点を解決する酸化シリコン膜
の選択蝕刻法を提案するもので、基板上に形成さ
れた酸化シリコン膜上にネガレジストを塗布し、
選択的に紫外線露光し、次いで、該基板全表面を
フツ素系ガスプラズマ雰囲気中に所定時間露呈し
た後、該ネガレジストを剥離することにより、非
露光部に対応する該酸化シリコン膜を選択的に除
去することを特徴とする。
The present invention proposes a selective etching method for a silicon oxide film that solves the above problems, in which a negative resist is applied to a silicon oxide film formed on a substrate,
After selectively exposing the substrate to ultraviolet light and then exposing the entire surface of the substrate to a fluorine-based gas plasma atmosphere for a predetermined time, the negative resist is peeled off to selectively remove the silicon oxide film corresponding to the non-exposed areas. It is characterized by being removed.

本発明は、基板上に形成された酸化シリコン膜
上にネガ型レジストを塗布し、選択的に紫外線を
露光した後、ネガ型レジストを現像液に浸漬する
ことなく、全面に該レジストが塗布された状態
で、フツ素系ガス雰囲気中に露呈すると、紫外線
露光部と紫外線非露光部とでは、該レジスト下の
該酸化シリコン膜が除去される速度が異なる現象
を発見したことに基づくものである。
In the present invention, a negative resist is applied onto a silicon oxide film formed on a substrate, selectively exposed to ultraviolet rays, and then the resist is applied to the entire surface without immersing the negative resist in a developer. This is based on the discovery that when the resist is exposed to a fluorine-based gas atmosphere, the rate at which the silicon oxide film under the resist is removed differs between the UV-exposed area and the UV-unexposed area. .

次に実施例に基づき、本発明を詳細に説明す
る。
Next, the present invention will be explained in detail based on Examples.

半導体基板上の多結晶シリコン層をパターニン
グし、配線パターンを形成する際、該多結晶シリ
コン層上に酸化シリコン膜を形成し、該酸化シリ
コン膜を所定のパターンに形成し、該パターニン
グされた酸化シリコン膜をマスクとして、多結晶
シリコン層を選択的に除去し、パターニングする
工程を一例として説明する。
When patterning a polycrystalline silicon layer on a semiconductor substrate to form a wiring pattern, a silicon oxide film is formed on the polycrystalline silicon layer, the silicon oxide film is formed in a predetermined pattern, and the patterned oxide A process of selectively removing and patterning a polycrystalline silicon layer using a silicon film as a mask will be described as an example.

(第1図参照) シリコン半導体基板1上に厚さ3000乃至5000Å
程度の多結晶シリコン層2を化学気相成長法等に
より形成し、次いで、熱酸化法等により該多結晶
シリコン層2上に厚さ400Å程度の酸化シリコン
膜3を形成する。
(See Figure 1) A film with a thickness of 3000 to 5000 Å is formed on the silicon semiconductor substrate 1.
A polycrystalline silicon layer 2 of approximately 400 Å in thickness is formed by chemical vapor deposition or the like, and then a silicon oxide film 3 of approximately 400 Å in thickness is formed on the polycrystalline silicon layer 2 by thermal oxidation or the like.

(第2図参照) 次に該酸化シリコン膜3上にネガ型レジスト4
例えばOMR(東京応化製)を厚さ8000乃至9000
Åに塗布し、所定のパターン5を有するフオト・
マスク6を介して選択的に紫外線露光し、該レジ
スト膜4を選択的に化学変化させる。露光時間及
び露光強度は、レジスト膜4厚によるが紫外線露
光により、レジスト膜に化学変化を生ずるのに充
分な程度に選択する。
(See Figure 2) Next, a negative resist 4 is applied on the silicon oxide film 3.
For example, use OMR (manufactured by Tokyo Ohka) with a thickness of 8000 to 9000.
A photo coated with a predetermined pattern 5.
The resist film 4 is selectively exposed to ultraviolet light through a mask 6 to undergo a selective chemical change. The exposure time and exposure intensity depend on the thickness of the resist film 4, but are selected to be sufficient to cause a chemical change in the resist film by exposure to ultraviolet light.

(第3図参照) 次にネガ型レジスト4が、該酸化シリコン膜上
に全面塗布された状態で、フツ化水素ガス雰囲気
中に所定時間露呈する。一例としてトリフロロメ
タン(CHF3)ガスを用い、流量40〔c.c./分〕圧
力0.2〔torr〕、出力1250〔W〕で約40分間イオン
照射を行なう。このとき、非電光部領域に対応す
るネガレジスト下の酸化シリコン膜は、1分間に
約10Å程度の速さで消失するのに対し、露光部領
域に対応するネガレジスト下の酸化シリコン膜
は、1分間に約4Å程度の速さで消失していく。
従つて、約40分間の上記イオン照射を行なえば非
露光部領域に対応するネガレジスト下の該酸化シ
リコン膜は完全に消失するのに対し、露光部領域
に対応する該酸化シリコン膜は残存している。フ
ツ素系ガスとしてトリフロロメタン(CHF3)の
他、フツ化メチル(CH3F)等、フツ素系ガスが
適する。
(See FIG. 3) Next, the negative resist 4 is exposed to a hydrogen fluoride gas atmosphere for a predetermined period of time in a state where the entire surface of the silicon oxide film is coated. As an example, using trifluoromethane (CHF 3 ) gas, ion irradiation is performed for about 40 minutes at a flow rate of 40 [cc/min], a pressure of 0.2 [torr], and an output of 1250 [W]. At this time, the silicon oxide film under the negative resist corresponding to the non-lightning area disappears at a rate of about 10 Å per minute, whereas the silicon oxide film under the negative resist corresponding to the exposed area disappears at a rate of about 10 Å per minute. It disappears at a rate of about 4 Å per minute.
Therefore, if the above ion irradiation is performed for about 40 minutes, the silicon oxide film under the negative resist corresponding to the non-exposed areas will completely disappear, whereas the silicon oxide film corresponding to the exposed areas will remain. ing. In addition to trifluoromethane (CHF 3 ), fluorine-based gases such as methyl fluoride (CH 3 F) are suitable as the fluorine-based gas.

次いで、通常の酸素プラズマ照射灰化処理によ
り該ネガ型レジストを剥離すると、非露光部に対
応する酸化シリコン膜が選択的に除去され、所定
パターンに形成された酸化シリコン膜3′が得ら
れる。
Next, when the negative resist is peeled off by ordinary oxygen plasma irradiation and ashing treatment, the silicon oxide film corresponding to the non-exposed portions is selectively removed, and a silicon oxide film 3' formed in a predetermined pattern is obtained.

このようにして、所定パターンに形成された該
酸化シリコン膜3′をマスクとして、該酸化シリ
コン膜3′下の該多結晶シリコン層2を通常の湿
式又は乾式エツチング法により、選択的にエツチ
ング除去する。
In this way, using the silicon oxide film 3' formed in a predetermined pattern as a mask, the polycrystalline silicon layer 2 under the silicon oxide film 3' is selectively etched away by a normal wet or dry etching method. do.

以上説明したように、本発明によれば、レジス
ト膜を現像液に浸漬して現像する工程がないた
め、レジストパターンの膨潤や現像液による汚染
を生ずることがないため精度良く微細パターンを
形成することができ、又、歩留りが向上する利点
がある。
As explained above, according to the present invention, since there is no step of immersing the resist film in a developer to develop it, swelling of the resist pattern or contamination by the developer does not occur, so a fine pattern can be formed with high precision. It also has the advantage of improving yield.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図乃至第4図は本発明による一部工程図を
示す。 1……シリコン基板、2……多結晶シリコン
層、3……酸化シリコン膜、4……レジスト層。
1 to 4 show partial process diagrams according to the present invention. 1...Silicon substrate, 2...Polycrystalline silicon layer, 3...Silicon oxide film, 4...Resist layer.

Claims (1)

【特許請求の範囲】[Claims] 1 基板上に形成された酸化シリコン膜上にネガ
レジストを塗布し、選択的に紫外線露光し、次い
で該基板全表面をフツ素系ガスプラズマ雰囲気中
に所定時間露呈した後、該ネガレジストを剥離す
ることにより、非露光部に対応する該酸化シリコ
ン膜を選択的に除去することを特徴とする酸化シ
リコン膜の選択蝕刻法。
1. A negative resist is applied onto the silicon oxide film formed on the substrate, selectively exposed to ultraviolet light, and then the entire surface of the substrate is exposed to a fluorine-based gas plasma atmosphere for a predetermined period of time, and then the negative resist is peeled off. A selective etching method for a silicon oxide film, characterized in that the silicon oxide film corresponding to the non-exposed portions is selectively removed by etching the silicon oxide film.
JP960080A 1980-01-30 1980-01-30 Selectively etching method for silicon oxide film Granted JPS56108880A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP960080A JPS56108880A (en) 1980-01-30 1980-01-30 Selectively etching method for silicon oxide film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP960080A JPS56108880A (en) 1980-01-30 1980-01-30 Selectively etching method for silicon oxide film

Publications (2)

Publication Number Publication Date
JPS56108880A JPS56108880A (en) 1981-08-28
JPS628513B2 true JPS628513B2 (en) 1987-02-23

Family

ID=11724801

Family Applications (1)

Application Number Title Priority Date Filing Date
JP960080A Granted JPS56108880A (en) 1980-01-30 1980-01-30 Selectively etching method for silicon oxide film

Country Status (1)

Country Link
JP (1) JPS56108880A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0718012B2 (en) * 1985-11-13 1995-03-01 日本電気株式会社 Surface selection treatment method

Also Published As

Publication number Publication date
JPS56108880A (en) 1981-08-28

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