JPS6280339U - - Google Patents

Info

Publication number
JPS6280339U
JPS6280339U JP1985171772U JP17177285U JPS6280339U JP S6280339 U JPS6280339 U JP S6280339U JP 1985171772 U JP1985171772 U JP 1985171772U JP 17177285 U JP17177285 U JP 17177285U JP S6280339 U JPS6280339 U JP S6280339U
Authority
JP
Japan
Prior art keywords
cooling body
semiconductor device
resin layer
resin
coated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1985171772U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985171772U priority Critical patent/JPS6280339U/ja
Publication of JPS6280339U publication Critical patent/JPS6280339U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

【図面の簡単な説明】
第1図は本考案の一実施例を示す断面図、第2
図は本考案の別の実施例を示す断面図、第3図は
従来の絶縁型樹脂封止半導体装置の断面図である
。 1:半導体チツプ、2:金属支持体、3:モー
ルド樹脂、9:ポリイミド樹脂層。

Claims (1)

    【実用新案登録請求の範囲】
  1. 冷却体上に固定する際の冷却体との接触面が絶
    縁性モールド樹脂により被覆されるものにおいて
    、半導体チツプ支持体の少なくとも冷却体との接
    触面側表面に薄いポリイミド樹脂層を備え、その
    上にモールド樹脂層が被覆されたことを特徴とす
    る絶縁型樹脂封止半導体装置。
JP1985171772U 1985-11-08 1985-11-08 Pending JPS6280339U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985171772U JPS6280339U (ja) 1985-11-08 1985-11-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985171772U JPS6280339U (ja) 1985-11-08 1985-11-08

Publications (1)

Publication Number Publication Date
JPS6280339U true JPS6280339U (ja) 1987-05-22

Family

ID=31107707

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985171772U Pending JPS6280339U (ja) 1985-11-08 1985-11-08

Country Status (1)

Country Link
JP (1) JPS6280339U (ja)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5131175A (en) * 1974-09-11 1976-03-17 Hitachi Ltd Handotaisochi oyobi sonoseizohoho

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5131175A (en) * 1974-09-11 1976-03-17 Hitachi Ltd Handotaisochi oyobi sonoseizohoho

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