JPS6278868A - Semiconductor condenser - Google Patents

Semiconductor condenser

Info

Publication number
JPS6278868A
JPS6278868A JP22060085A JP22060085A JPS6278868A JP S6278868 A JPS6278868 A JP S6278868A JP 22060085 A JP22060085 A JP 22060085A JP 22060085 A JP22060085 A JP 22060085A JP S6278868 A JPS6278868 A JP S6278868A
Authority
JP
Japan
Prior art keywords
terminal
capacitor
electrode
capacitance
capacitor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22060085A
Other languages
Japanese (ja)
Inventor
Yasunori Sakaguchi
阪口 康則
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP22060085A priority Critical patent/JPS6278868A/en
Publication of JPS6278868A publication Critical patent/JPS6278868A/en
Pending legal-status Critical Current

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  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce the variation of capacitance due to direct current voltage impressed to a capacitor, by connecting two junction capacitor elements in series for impressing DC bias voltage and in parallel with regard to AC. CONSTITUTION:The P-electrode of the first capacitor element 4 and the N- electrode of the second capacitor elements 5 are connected to make the first terminal 6. A DC bias voltage is impressed between the N-electrode of the element 4 and the P-electrode of the element 5, and these two electrodes are short-circuited with regard to AC to form the second terminal 8. Then the capacitance for the terminal 8 becomes a resultant capacitance C1+C2. The capacitance change of C1 and C2 are inverse relation with each other in respect to the ground potential of the terminal 8, so that the change of the resultant capacitance C1+C2 is offset. Thus, the change of capacitance due to the fluctuation of DC voltage impressed to the terminal 6 is reduced.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は半導体集積回路(以下ICという)等に組込
まれる半導体コンデンサに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor capacitor incorporated into a semiconductor integrated circuit (hereinafter referred to as an IC) or the like.

[従来の技術] ICのチップ内にCR形フィルタを形成する場合、その
コンデンサとしてバイアス電圧が印加されるPN接合で
形成される比較的容量値の大きい接合形コンデンサが多
く用いられる。第3図はこの従来の半導体接合形コンデ
ンサの接続及び特性を示す図で、(1)は接合形コンデ
ンサ、(2) (3)はその端子、横軸は端子(2) 
(3)間に印加されるバイアス電圧、縦軸はコンデンサ
(1)の容量値である。
[Prior Art] When forming a CR type filter in an IC chip, a junction type capacitor having a relatively large capacitance value formed by a PN junction to which a bias voltage is applied is often used as the capacitor. Figure 3 is a diagram showing the connections and characteristics of this conventional semiconductor junction capacitor, where (1) is the junction capacitor, (2) and (3) are its terminals, and the horizontal axis is the terminal (2).
(3) The bias voltage applied between the two, and the vertical axis is the capacitance value of the capacitor (1).

図より明らかなように接合形コンデンサ(1)の容量値
はバイアス電圧値が大になると小さくなる特性を有して
いる。
As is clear from the figure, the capacitance value of the junction capacitor (1) has a characteristic that it decreases as the bias voltage value increases.

[発明が解決しようとする問題点] 従来の半導体コンデンサは以上のように構成され、コン
デンサの両端にかかる電圧値によって容量値が変化する
ので、それをフィルタなどに使用する場合カット周波数
が電圧によって変化するという問題点があった。
[Problems to be solved by the invention] Conventional semiconductor capacitors are constructed as described above, and the capacitance value changes depending on the voltage applied to both ends of the capacitor, so when using it for a filter etc., the cut frequency changes depending on the voltage. The problem was that it changed.

この発明はかかる問題点を解消するためになされたもの
で、端子間に加わる直流電圧の変化に対して容量値の変
化の少ない半導体コンデンサを得ることを目的とする。
The present invention was made to solve this problem, and an object of the present invention is to obtain a semiconductor capacitor whose capacitance value changes little with respect to changes in the DC voltage applied between the terminals.

[問題点を解決するための手段] この発明にかかる半導体コンデンサは、PN接合で形成
される第1のコンデンサ素子と第2のコンデンサ素子と
からなり、上記第1のコンデンサ素子のP電極と第2の
コンデンサ素子のN電極を接続して第1の端子とし、第
1のコンデンサ素子のN電極と第2のコンデンサ素子の
P電極間に直流バイアス電圧を印加し、これら両電極を
交流的に短絡して第2の端子としたものである。
[Means for Solving the Problems] A semiconductor capacitor according to the present invention includes a first capacitor element and a second capacitor element formed by a PN junction, and a P electrode of the first capacitor element and a second capacitor element are connected to each other. The N electrode of the second capacitor element is connected as the first terminal, and a DC bias voltage is applied between the N electrode of the first capacitor element and the P electrode of the second capacitor element, and these electrodes are connected in an alternating current. It is short-circuited and used as a second terminal.

[作 用] この発明においては、第1のコンデンサ素子と第2のコ
ンデンサ素子に、直流バイアス電圧は直列に両端子間へ
の入出力電圧は並列に印加されることになる。従って端
子間への直流電圧の変化は一方が増加すれば他方が減少
し、それによる並列容量値の変化は打消されて小さくな
る。
[Function] In this invention, the DC bias voltage is applied in series to the first capacitor element and the second capacitor element, and the input/output voltage between both terminals is applied in parallel. Therefore, when one of the changes in the DC voltage between the terminals increases, the other decreases, and the resulting change in the parallel capacitance value is canceled out and becomes smaller.

[実施例コ 以下この発明の一実施例を図について説明する。[Example code] An embodiment of the present invention will be described below with reference to the drawings.

第1図はこの発明の一実施例を示す接続図、第2図はそ
れの特性図である0図において(4)は第1の接合形コ
ンデンサ素子、(5)は第2の接合形コンデンサ素子、
(6)は、第1のコンデンサ素子(4)のP電極と第2
のコンデンサ素子(5)のN電極とを接続した第1の端
子、(7)は直流バイアス電源正端子、(8)はアース
端子である。バイアス電源は図示されていないが、一般
のIC回路に使用されている所謂Vcc電源で、大きな
容量値を有し正端子(7)、アース端子(8)間は交流
的に短絡されている。このアース端子(8)をコンデン
サの第2の端子とする。第1の端子(6)の対地電位に
対する第1、第2のコンデンサ素子(4)(5)の容量
値C8、C2の変化は第2図のようになる。今、端子(
7)(8)は交流的に接地されているので、第1の端子
(6)の接地、即ち第2の端子(8)に対する容量はC
,、+C,となる。CIとC2は第1の端子(8)の対
地電位に対して互に逆向きの容量変化を示すので1合成
容量値c、+C,の変化は打消され、第1の端子(6)
への直流電圧の変動による容量値変化は軽減される。
Figure 1 is a connection diagram showing an embodiment of the present invention, and Figure 2 is its characteristic diagram. In Figure 0, (4) is the first junction capacitor element, and (5) is the second junction capacitor element. element,
(6) is the P electrode of the first capacitor element (4) and the second
The first terminal is connected to the N electrode of the capacitor element (5), (7) is the DC bias power supply positive terminal, and (8) is the ground terminal. Although the bias power supply is not shown, it is a so-called Vcc power supply used in general IC circuits, has a large capacitance value, and is short-circuited between the positive terminal (7) and the ground terminal (8). This ground terminal (8) is used as the second terminal of the capacitor. Changes in the capacitance values C8 and C2 of the first and second capacitor elements (4) and (5) with respect to the ground potential of the first terminal (6) are as shown in FIG. Now, the terminal (
7) Since (8) is AC grounded, the capacitance of the first terminal (6) to the ground, that is, to the second terminal (8) is C
,,+C,. Since CI and C2 exhibit capacitance changes in opposite directions with respect to the ground potential of the first terminal (8), the changes in the combined capacitance values c and +C are canceled, and the
Changes in capacitance due to fluctuations in DC voltage are reduced.

なお1以上の実施例では第1のコンデンサ素子(4)の
N電極に直流電源正端子(7)を、第2のコンデンサ素
子(5)のP電極をアース端子(8)に接続した例を示
したが、第1のコンデンサ素子(4)のN電極をアース
し、第2のコンデンサ素子(5)のP電極を直流電源負
端子に接続しても同様の効果を奏することは明らかでき
る。
In one or more embodiments, the DC power supply positive terminal (7) is connected to the N electrode of the first capacitor element (4), and the P electrode of the second capacitor element (5) is connected to the ground terminal (8). However, it is clear that the same effect can be achieved even if the N electrode of the first capacitor element (4) is grounded and the P electrode of the second capacitor element (5) is connected to the negative terminal of the DC power supply.

[発明の効果コ この発明は以上のように2つの接合コンデンサ素子を直
列に接続して直流バイアス電圧を印加し。
[Effects of the Invention] As described above, the present invention connects two junction capacitor elements in series and applies a DC bias voltage.

交流的には並列に接続するようにしたので、コンデンサ
に印加される直流電圧による容量値の変化を軽減するこ
とができる効果を有する。
Since the capacitors are connected in parallel in terms of alternating current, it is possible to reduce changes in capacitance value due to direct current voltage applied to the capacitor.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例を示す接続図、第2図はそ
れの特性図、第3図は従来の半導体接合形コンデンサの
接続及び特性を示す図である。 図において(4)は第1のコンデンサ素子、(5)は第
2のコンデンサ素子、(6)は第1の端子、(7)は直
流バイアス電源端子、(8)は第2の端子である。
FIG. 1 is a connection diagram showing an embodiment of the present invention, FIG. 2 is a characteristic diagram thereof, and FIG. 3 is a diagram showing connections and characteristics of a conventional semiconductor junction capacitor. In the figure, (4) is the first capacitor element, (5) is the second capacitor element, (6) is the first terminal, (7) is the DC bias power supply terminal, and (8) is the second terminal. .

Claims (1)

【特許請求の範囲】[Claims] PN接合で形成される第1のコンデンサ素子と第2のコ
ンデンサ素子とからなり、上記第1のコンデンサ素子の
P電極と第2のコンデンサ素子のN電極を接続して第1
の端子とし、上記第1のコンデンサ素子のN電極と第2
のコンデンサ素子のP電極との間に直流バイアス電圧を
印加し、これら両電極間を交流的に短絡して第2の端子
としたことを特徴とする半導体コンデンサ。
It consists of a first capacitor element and a second capacitor element formed by a PN junction, and the P electrode of the first capacitor element and the N electrode of the second capacitor element are connected to form the first capacitor element.
and the N electrode of the first capacitor element and the second
A semiconductor capacitor characterized in that a DC bias voltage is applied between the P electrode of the capacitor element and the two electrodes are short-circuited in an AC manner to form a second terminal.
JP22060085A 1985-10-01 1985-10-01 Semiconductor condenser Pending JPS6278868A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22060085A JPS6278868A (en) 1985-10-01 1985-10-01 Semiconductor condenser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22060085A JPS6278868A (en) 1985-10-01 1985-10-01 Semiconductor condenser

Publications (1)

Publication Number Publication Date
JPS6278868A true JPS6278868A (en) 1987-04-11

Family

ID=16753517

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22060085A Pending JPS6278868A (en) 1985-10-01 1985-10-01 Semiconductor condenser

Country Status (1)

Country Link
JP (1) JPS6278868A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009506823A (en) * 2005-09-06 2009-02-19 ザ ジレット カンパニー Razor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009506823A (en) * 2005-09-06 2009-02-19 ザ ジレット カンパニー Razor

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