JPH01136402A - Bias circuit - Google Patents
Bias circuitInfo
- Publication number
- JPH01136402A JPH01136402A JP62293119A JP29311987A JPH01136402A JP H01136402 A JPH01136402 A JP H01136402A JP 62293119 A JP62293119 A JP 62293119A JP 29311987 A JP29311987 A JP 29311987A JP H01136402 A JPH01136402 A JP H01136402A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- supply side
- resistor
- bias circuit
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 8
- 238000010586 diagram Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 1
Landscapes
- Amplifiers (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はバイアス回路に関し、特に電源からの電圧を抵
抗で分割してデバイスに与えるバイアス回路に関するも
のである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a bias circuit, and more particularly to a bias circuit that divides a voltage from a power supply by a resistor and applies the divided voltage to a device.
従来の電子回路におけるこの種のバイアス回路は、第２
図に示される様に、電源からの電圧ｖｃｃを電源側抵抗
Ｒ，とアース側抵抗Ｒ２で分割し。This type of bias circuit in conventional electronic circuits is
As shown in the figure, the voltage vcc from the power supply is divided by the power supply side resistor R and the ground side resistor R2.
さらにバイパスコンデンサＣ２によって雑音等を防止し
、デバイスに安定な電源を供給しようとするものである
。Furthermore, the bypass capacitor C2 is used to prevent noise and the like and to supply stable power to the device.
上記のような従来の技術では１時定数Ｒ，Ｃ２が比較的
大きいので、バイアス電圧が定常状態となるまでかなり
の時間がかかってしまうという不具合があった。すなわ
ち電圧ｖｃｃの電源を投入したとき得られるバイアス電
圧Ｅは
となり、ｔの係数（Ｒ１＋ Ｒ２）／ （ＲＩ Ｒ２Ｃ
２）が比較的小さいのセ、定常状態になるまでかなシの
時間オペアン７’ＯＡが動作しないという欠点があった
。In the conventional technique as described above, since the time constants R and C2 are relatively large, there is a problem in that it takes a considerable amount of time until the bias voltage reaches a steady state. In other words, the bias voltage E obtained when the voltage vcc is turned on is as follows, and the coefficient of t (R1+R2)/(RI R2C
2) is relatively small, but there is a drawback that the operational amplifier 7'OA does not operate for some time until it reaches a steady state.
したがって本発明の目的は電源電圧の立上シが可及的に
短かくて済むバイアス回路を得ようとするものである。Therefore, an object of the present invention is to provide a bias circuit in which the rise time of the power supply voltage is as short as possible.
本発明は前述のような従来回路に、電源側の抵抗Ｒ１に
並列に
ＲｌＣ，＝Ｒ２Ｃ，・・・・・・・・・（２）となるよ
うな電源側容量Ｃ１を付加接続したものである。この式
（２）の関係から、電源から電圧ｖｃｃを供給された時
瞬時にデバイスの電圧が定常状態に立上がる。The present invention is a conventional circuit as described above, in which a power supply side capacitor C1 is additionally connected in parallel to the power supply side resistor R1 such that RlC, = R2C, ...... (2). be. From the relationship in equation (2), the voltage of the device rises to a steady state instantaneously when the voltage vcc is supplied from the power supply.
第１図は本発明の一実施例の構成を示す図である。第２
図の従来の装置に加えて、電源側の抵抗Ｒ１には式（２
）の関係を満たす電源側容量Ｃ８が並列に接続されてい
る。従って交流印加時の出力電圧ｅは
Ｒ鵞
となる。ここで式（２）の関係を入れると、交流時の電
流ｅと直流時の電圧Ｅは。FIG. 1 is a diagram showing the configuration of an embodiment of the present invention. Second
In addition to the conventional device shown in the figure, the resistance R1 on the power supply side has the formula (2
) are connected in parallel. Therefore, the output voltage e when AC is applied becomes R. Inserting the relationship of equation (2) here, the current e during AC and the voltage E during DC are as follows.
で示されるように等しくなる。are equal as shown in .
このことはオペアンプ立上シにＣ１Ｃ，及び時ｖｃｃに
立上り１回路が動作しない時間が零となる。This means that when the operational amplifier rises, C1C and when Vcc rises, the time during which the circuit does not operate becomes zero.
〔発明の効果〕
以上述べたように１本発明によれば、電子回路において
１重要なバイアス回路での時定数における立上シ遅れが
解消できる。[Effects of the Invention] As described above, according to the present invention, the start-up delay in the time constant of the bias circuit, which is one important factor in electronic circuits, can be eliminated.
第１図は本発明のオペアンプバイアス回路図であり、第
２図は従来のオペアンプバイアス回路で島る。
記号の説明：１０はオペアンプ、Ｒ１は電源側の抵抗、
Ｒ３はアース側抵抗、Ｃ１は電源側の容量、Ｃ２はバイ
パス容量をそれぞれあられしている。
第１図
第２図FIG. 1 is a diagram of an operational amplifier bias circuit according to the present invention, and FIG. 2 is a diagram of a conventional operational amplifier bias circuit. Symbol explanation: 10 is an operational amplifier, R1 is a resistance on the power supply side,
R3 is the ground side resistance, C1 is the power supply side capacitance, and C2 is the bypass capacitance. Figure 1 Figure 2
Claims (1)
アース側の抵抗に並列にバイパス容量が接続されている
バイアス回路において、前記電源側の抵抗に並列に電源
側容量を接続し、この電源側容量と前記電源側抵抗のＲ
Ｃ積と前記バイパス容量と前記アース側抵抗のＲＣ積を
等しくした事を特徴とするバイアス回路。1. In a bias circuit in which voltage is divided by a resistance on the power supply side and a resistance on the ground side and a bypass capacitor is connected in parallel to the resistance on the ground side, the power supply side capacitor is connected in parallel to the resistance on the power supply side, R of this power supply side capacitance and the power supply side resistance
A bias circuit characterized in that a C product and an RC product of the bypass capacitance and the ground side resistance are made equal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62293119A JPH01136402A (en) | 1987-11-21 | 1987-11-21 | Bias circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62293119A JPH01136402A (en) | 1987-11-21 | 1987-11-21 | Bias circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01136402A true JPH01136402A (en) | 1989-05-29 |
Family
ID=17790677
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62293119A Pending JPH01136402A (en) | 1987-11-21 | 1987-11-21 | Bias circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01136402A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51150255A (en) * | 1975-06-18 | 1976-12-23 | Trio Kenwood Corp | Bias circuit of grounded base type transistor amplifier |
-
1987
- 1987-11-21 JP JP62293119A patent/JPH01136402A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51150255A (en) * | 1975-06-18 | 1976-12-23 | Trio Kenwood Corp | Bias circuit of grounded base type transistor amplifier |
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