JPS6276771A - Charge transfer device - Google Patents

Abstract

PURPOSE:To obtain a charge transfer device which has small load capacity as observed from an external clock terminal even when transfer stages are increased and does not affect the influence to the transfer of signal charge with uniform heating by dispersing clock drivers as small heat generation corresponding to transfer electrodes. CONSTITUTION:Clock drivers 16-1-16-9 for driving transfer electrodes 2-1-2-9 are provided in the same number as the transfer electrodes in the vicinity, and integrated in an array parallel to the electrodes in a semiconductor substrate 1. Driver pulse input terminals 20 are connected to clock drivers 16-1-16-9. Then, terminals 21-23 are wired to connect at every three clock drivers. Thus, the input capacitances of the drivers are set smaller than the electrodes, the drivers causing the heats to generate are distributed to array on a chip. Accordingly, on-chip drivers uniformized in heat generation is formed with small load capacity.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a charge transfer device, and particularly to a charge transfer device that generates uniform heat and has a small load capacitance when viewed from an external terminal. - (Technical Background of the Invention) A charge transfer device applies transfer pulses according to the number of phases to be adopted at a predetermined timing to transfer electrodes arranged on a transfer channel corresponding to a gate region, and transfers pulses under each transfer electrode. Signal charge is transferred by changing the depth of the potential well of the generated depletion layer, and its use in solid-state image transfer devices and the like is increasing in particular.

This charge transfer device includes a signal charge injection means that electrically or optically injects signal charges, a charge transfer section that stores and transfers these signal charges, and a charge transfer section that transfers the transferred charges into a desired state. The basic configuration is a detection means that converts into an output form and outputs it.

FIG. 3 is a plan view showing the structure of a charge transfer section of a conventional charge transfer device. The device shown in Figure 13 is 4
A phase-driven charge transfer section is shown.

On the surface of the semiconductor substrate 1 are transfer electrodes 2-1, 2-2.・・・
- Transfer electrodes 2-1. . . . A transfer chitnel 3 is formed on the semiconductor substrate 1 below 2-9.

Semiconductor substrate 1 and transfer electrode 2-1. There is a so-called gate oxide film between 2-9, and by making this gate oxide film sufficiently thin, the applied pulses φ, .
A depletion layer is created within the transfer channel 3 due to φ4.

These transfer electrodes 2-1.2-2. ...2-9 are commonly connected every third, and 4-phase pulse application terminal 4
, 5.6.7. These pulse application terminals 4, 5, and 6.7 receive pulses φ1. φ, φ3. φ4 is applied.

Note that these transfer electrodes 2-1. . . . 2-9, when a multilayer polysilicon structure is adopted, it is possible to overlap the adjacent transfer electrodes without providing a space between them.

FIG. 4 is a diagram showing pulse waveforms of each phase supplied to the application terminals 4 to 7. 4 out of phase by 90' each
By applying phase pulses φ, to φ4 to the respective application terminals 4 to 7, depletion layers are sequentially generated in the transfer channel 3, and charge is transferred.

[Problems with frontal technology]

In the conventional device as shown in FIG. 3, the load capacitance connected to each terminal 4 to 7 increases as the number of transfer stages increases.

As shown in Figure 4, an external driver is normally used to supply lock pulses to each terminal 4 to 7, but as the load capacity of each terminal increases, this external driver There is a problem in that a saw with a high driving power is required for this purpose, and as a result, the price of the entire system increases.

In order to avoid this problem, a configuration as shown in FIG. 5 is adopted. On-chip drivers 8 to 11 for each phase for generating pulses of the first to fourth phases are incorporated into the semiconductor substrate 1, and pulse input terminals 12 to 15 are provided to the on-chip drivers 8 to 11. It is composed of

However, this structure simply transfers the burden that conventional external drivers had to the on-chip drivers 8 to 11, and in order to drive large capacity loads, the on-chip driver 8
-11 requires a large size, which causes an increase in chip size, and causes localized heat generation in the driver array area on the chip, causing fluctuations in signals, especially temporary signals in solid-state imaging devices, etc. It has the disadvantage of having an adverse effect on

That is, there is a problem that signal charges increase in the heat generating portion due to local heat generation of the chip driver and are mixed in as a false signal.

[Purpose of the invention]

The present invention has been made in consideration of the above circumstances, and even when the number of transfer stages increases, the load capacitance seen from the external clock terminal is small, and the heat generation is uniform, so that the charge does not affect the transfer of signal charges. The purpose is to provide a transfer device.

[Summary of the Invention] To achieve the above object, the present invention provides a plurality of transfer electrodes arranged at a predetermined pitch on the surface of a semiconductor substrate, and a clock driver that supplies clock pulses for transfer driving to the transfer electrodes. The charge transfer device is characterized in that the clock driver has a small heat generating portion and is arranged in a dispersed manner away from the transfer electrode.

Thereby, the heat generated in the clock driver is dispersed, and the transfer characteristics can be improved.

[Embodiments of the invention]

Some embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention.

In this embodiment, transfer electrode 2-1. . . . 2-9. ...16-9
The same number of electrodes as the transfer electrodes are disposed close to each other, and are integrated in the semiconductor substrate 1 in an arrangement parallel to the transfer electrodes.

The drive pulse input terminal 20 is connected to the clock driver 16-1.
16-5. Connected to 16-9. Terminals 21 to 23 below
are connected to connect every third clock driver.

With such a structure, an on-chip driver with small load capacity and uniform heat generation can be formed. The load capacitance is small because the input capacitance of each driver can be set smaller than the transfer electrode.
Furthermore, heat generation is made uniform because the drivers that cause heat generation can be distributed and arranged on the chip.

FIG. 2 shows another embodiment of the invention! j is a configuration diagram.

In this embodiment, two transfer electrodes to which in-phase pulses are applied are commonly connected and driven by one clock driver C.

That is, the first and fourth transfer electrodes 2-1a.

2-1b is commonly connected to one clock driver 35.
-1.

Similarly, the clock driver 35-2 is connected to the transfer electrode 2.
-2a, 2-2b, 35-3 is 2-3a, 2-3b
, 35-4 is 2-4a, 2-4b, 35-5 is 2-
58, 2-5b, 35-6 is 2-6a, 2-6b,
35-7 is 2-7a.

2-7b, and 35-8 drives 2-8a and 2-8b, respectively. The input portions of the clock drivers 35-1 and 35-5 are commonly connected and connected to the 'C terminal 30.

Thereafter, terminals 31 to 33 are similarly connected to respective clock drivers. In this way, in the embodiment shown in FIG. 2, there are 211! clock drivers that generate clock pulses of the same phase. The configuration is such that one transfer electrode is prepared for each transfer electrode.

Even in such a configuration, the same effects as in the case of FIG. 1 can be expected. In particular, from the perspective of uniform heat generation, whether a driver is provided for each transfer electrode or a driver is provided in multiple stages, these clock drivers should be arranged so as to extend in the charge transfer direction with a predetermined interval. is desirable.

Next, a description will be given of how to determine the arrangement interval of this clock driver. In general, when there is a local heat source on a chip, the temperature rise it causes in other parts of the chip depends firstly on the shape and material of the chip, secondly on the mounting method, and thirdly on the package shape. It is difficult to accurately calculate this, as it depends on parameters such as the temperature and material, fourth, the atmosphere (low temperature bath), and fifth, the size of the heat source. Therefore, it is practical and highly accurate to determine it experimentally.・The following can be considered as one type of experimental data. In other words, if the ambient temperature is 20℃ for a chip that is considered to be almost -dimensional, and there is a current gate cost of 40mW with a heat source that is almost point-shaped compared to chip size, the temperature inside the chip will increase decreased exponentially for this point source, the attenuation distance was approximately 8.5 m, and the temperature peak at the point source was 16°C.

Therefore, assuming similar chip shapes and other parameters are the same, if there is a heat source with heat generation ff1W per unit time at the origin, the temperature rise ΔT (x, W) at a point X away from this source is: ΔT (x, W>=A (W
) exp (-1x I/L) L curvature 8.5NR...
... It is given by the experimental formula (1). It is practical to determine the spacing based on such experiments.

Physically speaking, it is considered appropriate to arrange the heating elements for each pixel so that they are almost uniformly distributed from any point of the pixel.

This reference is set at a position a distance a from the pixel column.
When the drivers are arranged, the closest heating element as seen from point A, which is the point on the pixel column corresponding to the midpoint between the drivers on the pixel column, and point 8 on the pixel column corresponding to the driver. The difference in the distance to the attenuation distance 1111L is set to be sufficiently smaller than the attenuation distance 1111L. In other words, the standard is □ku1 (2). In any case, it is most practical to determine the optimal arrangement using the above-mentioned experimental formula.

In the above actual R example, the case of four-phase drive was shown, but it can be applied regardless of the number of phases, such as single-phase, two-phase, or three-phase drive.

Further, the number of receiving and transferring electrodes that the formed clock driver has can be set to any number as long as the amount of heat generated does not become large.

〔Effect of the invention〕

As described above, according to the present invention, a configuration is adopted in which a plurality of clock drivers that generate clock pulses of the same phase are prepared for each phase of clock pulses and are integrated on a semiconductor substrate in a predetermined arrangement. Therefore, the heat generation source is dispersed and local heat generation is eliminated, and a charge transfer position with uniform heat generation and small load capacity can be realized.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing one embodiment of the present invention, Fig. 2 is a block diagram showing another embodiment of the present invention, Fig. 3 is a block diagram of a conventional device, and Fig. 4 is a four-phase drive FIG. 5 is a configuration diagram showing another conventional configuration. 2-1.2-2...2-9...Transfer electrode, 3...
・Transfer V channel, 16-1.16-2,...16-9
...clock driver, 20. ...23...Tarlock terminal, 35-1. ...35-8...Clock driver, 30°...33...Clock terminal. Applicant's agent: Sato - Ite 1 Figure 5 Figure 3 Figure 4

Claims (1)

[Claims] 1. In a charge transfer device comprising a plurality of transfer electrodes arranged at a predetermined pitch on the surface of a semiconductor substrate, and a clock driver that supplies clock pulses for driving transfer to the transfer electrodes. . A charge transfer device, characterized in that the clock driver has a small heat generation value and is arranged in a distributed manner corresponding to the transfer electrodes. 2. The charge transfer device according to claim 1, wherein a clock driver is provided for each transfer electrode and arranged in the same direction as the arrangement direction of the transfer electrodes.