JPS6275840A - 桁上げ選択加算器 - Google Patents

桁上げ選択加算器

Info

Publication number
JPS6275840A
JPS6275840A JP21668785A JP21668785A JPS6275840A JP S6275840 A JPS6275840 A JP S6275840A JP 21668785 A JP21668785 A JP 21668785A JP 21668785 A JP21668785 A JP 21668785A JP S6275840 A JPS6275840 A JP S6275840A
Authority
JP
Japan
Prior art keywords
gate
carry
output
exclusive
supplied
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21668785A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0460252B2 (enrdf_load_stackoverflow
Inventor
Kenji Sakagami
健二 坂上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Device Solutions Corp
Original Assignee
Toshiba Corp
Toshiba Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Microelectronics Corp filed Critical Toshiba Corp
Priority to JP21668785A priority Critical patent/JPS6275840A/ja
Publication of JPS6275840A publication Critical patent/JPS6275840A/ja
Publication of JPH0460252B2 publication Critical patent/JPH0460252B2/ja
Granted legal-status Critical Current

Links

JP21668785A 1985-09-30 1985-09-30 桁上げ選択加算器 Granted JPS6275840A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21668785A JPS6275840A (ja) 1985-09-30 1985-09-30 桁上げ選択加算器

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21668785A JPS6275840A (ja) 1985-09-30 1985-09-30 桁上げ選択加算器

Publications (2)

Publication Number Publication Date
JPS6275840A true JPS6275840A (ja) 1987-04-07
JPH0460252B2 JPH0460252B2 (enrdf_load_stackoverflow) 1992-09-25

Family

ID=16692348

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21668785A Granted JPS6275840A (ja) 1985-09-30 1985-09-30 桁上げ選択加算器

Country Status (1)

Country Link
JP (1) JPS6275840A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02183328A (ja) * 1989-01-09 1990-07-17 Matsushita Electric Ind Co Ltd デジタル信号処理装置
JPH02301827A (ja) * 1989-04-28 1990-12-13 Internatl Business Mach Corp <Ibm> 論理合成ネツトワーク
WO1991000568A1 (en) * 1989-06-23 1991-01-10 Vlsi Technology, Inc. Conditional-sum carry structure compiler
US5047976A (en) * 1988-03-25 1991-09-10 Fujitsu Limited Logic circuit having carry select adders

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56147236A (en) * 1980-04-17 1981-11-16 Toshiba Corp Adding circuit
JPS5957343A (ja) * 1982-08-23 1984-04-02 Yokogawa Hewlett Packard Ltd 加算回路

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56147236A (en) * 1980-04-17 1981-11-16 Toshiba Corp Adding circuit
JPS5957343A (ja) * 1982-08-23 1984-04-02 Yokogawa Hewlett Packard Ltd 加算回路

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5047976A (en) * 1988-03-25 1991-09-10 Fujitsu Limited Logic circuit having carry select adders
JPH02183328A (ja) * 1989-01-09 1990-07-17 Matsushita Electric Ind Co Ltd デジタル信号処理装置
JPH02301827A (ja) * 1989-04-28 1990-12-13 Internatl Business Mach Corp <Ibm> 論理合成ネツトワーク
WO1991000568A1 (en) * 1989-06-23 1991-01-10 Vlsi Technology, Inc. Conditional-sum carry structure compiler
US5126965A (en) * 1989-06-23 1992-06-30 Vlsi Technology, Inc. Conditional-sum carry structure compiler

Also Published As

Publication number Publication date
JPH0460252B2 (enrdf_load_stackoverflow) 1992-09-25

Similar Documents

Publication Publication Date Title
US4573137A (en) Adder circuit
EP0210579B1 (en) Parallel multiplicator
KR100449963B1 (ko) 가산 회로 및 이를 구비한 승산 회로
JPH0431413B2 (enrdf_load_stackoverflow)
JP3153370B2 (ja) 乗算装置
JPH0479013B2 (enrdf_load_stackoverflow)
JPS6055438A (ja) ２入力加算器
US3535502A (en) Multiple input binary adder
JPS595349A (ja) 加算器
US4878192A (en) Arithmetic processor and divider using redundant signed digit arithmetic
US4623872A (en) Circuit for CSD-coding of a binary number represented in two&#39;s complement
US4709346A (en) CMOS subtractor
JPH07121354A (ja) 倍精度・単精度・内積演算および複素乗算が可能な乗算器
US5047976A (en) Logic circuit having carry select adders
JPS6275840A (ja) 桁上げ選択加算器
US4571701A (en) Integrated circuit fast multiplier structure
US3842250A (en) Circuit for implementing rounding in add/subtract logic networks
US4873660A (en) Arithmetic processor using redundant signed digit arithmetic
US4263660A (en) Expandable arithmetic logic unit
JPH0312738B2 (enrdf_load_stackoverflow)
US3462589A (en) Parallel digital arithmetic unit utilizing a signed-digit format
US4935892A (en) Divider and arithmetic processing units using signed digit operands
JP2700876B2 (ja) 並列乗算器
US5031136A (en) Signed-digit arithmetic processing units with binary operands
JPH0467211B2 (enrdf_load_stackoverflow)

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term