JPS6263994A - Effect apparatus - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an effect device configured using a digital circuit including a waveform memory and a voltage-controlled filter.

[Vr scene of invention]

Conventionally, M effectors have been developed that add divine effects to musical instrument sounds to obtain a sound that is quite different from the original sound. Some devices have a feedback loop that feeds back to the input side, but since they simply feed back the output sound to the input side, the output signal is monotonous, which is not desirable.

[Purpose of the invention]

The present invention has been made in view of the above points, and it is an object of the present invention to provide an effect device that can add various effects to input original sound.

[Key points of the invention]

The present invention has been made to achieve the above-mentioned object, and consists of converting an input waveform signal into a digital signal, writing the digital signal once into a waveform memory means, and transmitting the written digital signal into a plurality of digital signals. The waveform readout/write channel reads it out, converts it to an analog signal, and outputs it as an audio output.
Furthermore, at least one of the analog signals is connected to a voltage-controlled V
The key point is that a feedback loop is provided in which the timbre is controlled via the filter and then fed back as an input signal.

〔Example〕

Hereinafter, the present invention will be described in detail below.
An example will be described using an electronic musical instrument having a so-called sampling function that can perform modulation such as ED Modulatron, digitally record it, and use it as a sound source signal for a keyboard instrument.

The 11th ¥1 shows the circuit Wt configuration of this embodiment, and the input (1
The input signal (IN) is suitably amplified by the input amplifier 1, then supplied to the analog/pg adder circuit 2, and then supplied to the filter 3, where unnecessary high-frequency components are appropriately removed, and then sent to the sample/hold circuit. (8/H) 5 at an appropriate sampling frequency, and then A/DtR converter 6#
This is supplied. The A/D converter 6 converts the input analog signal into a corresponding digital signal (no.
supply to.

This sound generation unit 8 is equipped with, for example, four waveform readout channels/fr-, and can independently write or read waveform signals to and from the waveform memory 7. It is designed to operate based on the control from the CPU 9, which consists of 11 pages, and the details will be described later, but in response to the 4 waveform read/write channels of this sound generation control section 8, up to 4 channels are A digital signal corresponding to the waveform memory 7 is read out from the waveform memory 7 and applied to the D/A converter IO in a time-divisional manner, and then the sample lH/L/D circuit (S/H) 1
1a to 11d.

The sample and hold circuits 11a to 11lid perform a sampling operation at each time of each time-division processing channel using timing signal ports 4 to 4, which will be described later.

The voltage signals held in the sample ψ hold circuits 11a to lid are supplied to VCFs (1! pressure control type filters) 12a to 12d in a corresponding manner. voltage signal FC
VI-FCV4 is supplied, and this voltage signal FCVI-F
According to CV4, the filtering process is performed independently, respectively. Then, the filtered analog waveform signals are sent to VCA (voltage controlled amplifiers) 13a to 13d.

The amplification factors of the VCAs 13a to 13d are independently controlled by the supplied control voltage signals ACV1 to ACV4, and the output levels or green leaf envelopes for the waveform signals supplied from the VCFs 12a to 12d are determined.

The output signals of the CAs 13a to 13d are sent out as outputs OUT1 to OUT4 of each channel, respectively, and are appropriately amplified and emitted as a 4M signal. Further, the outputs of the VCAs 13a to 13d are supplied to an analog adder circuit 141, mixed, and can be output externally as a mixed output OtJ TMIX.

Also, ■CF12d corresponding to the fourth channel mentioned above.
The output of the VCFI 2d and the output of the analog adder circuit 14 are supplied to an analog switch 15 which performs a switching operation according to the control signal from the CPU 9 described above. Select output and V CA
IEEEmm#1llfNG) 161c supplied.

VCAt6 is supplied with the Mj control voltage signal ACV.

The signal is amplified accordingly and fed back to the analog adder circuit 2 described above.

Therefore, the external sound signal supplied via the input amplifier l,
The waveform signal obtained by reading out the waveform memory 7 can be mixed in this analog adder circuit 2 and supplied to the waveform memory 7 again, so that a so-called overdubbing function can be realized in this embodiment. becomes. Note that when overdubbing is not performed, the voltage control signal ACVO for VCAI6 is set to zero level.

The signal is applied via the switch 15 and the VCAI 6, and is digitized together with the input signal again by the sample/hold circuit 5 and the A/D converter 6, and written into the waveform memory 7. As a result, appropriate VC
The output signal filtered by F'12d can be fed back. Therefore, an effect can be realized in which the harmonic components of the original sound signal are gradually reduced each time the signal passes through the feedback loop. Furthermore, the VCAI 6 can also realize an effect of decreasing the sound and electric level as appropriate.

Reference numeral 4 in the figure is a keyboard display section consisting of a keyboard with keys and various control switches, and a liquid crystal display panel for displaying various statuses. Give and receive.

In addition, this CPU 9 supplies digital signals to the A converter group 17 to generate (1) / A converter group 17 to convert them into respective voltage signals by software processing. may have a number of 1)/A converters corresponding to the number of control signals C, or one I)/A converter may be used in a time-sharing manner,
The required number of control signals Cv may be obtained in combination with a sample and hold circuit.

Next, the detailed circuit configuration of the sound generation control section 8 will be explained using FIG. 2.

The digital signal supplied from the A/D converter 6 is supplied to the waveform memory 7 via the gate 81 and is also sent to the D/A converter IO via the gate 82.

For the gate 81 described above, a read/write signal is generated from a control circuit (not shown) inside the sound generation control section 8 based on a control command generated by the CPU 9.1. /W is supplied to perform opening/closing control.

That is, when writing a waveform signal into the waveform memory 7, this gate 81 is opened, and when reading a waveform signal from the waveform memory 7, this gate 81 is closed.

The gate 82 receives a control signal 1 from the control circuit.
Based on this, the gate signal Ga te from the open/close signal generator flft83 is given, and only when outputting the digital signal supplied via the gate 81 or when outputting the digital signal read from the waveform memory 7. , this gate 82 is opened; otherwise, this gate 82 is closed and its output is set to zero level.

Reference numeral 84 in FIG. 2 is an address register composed of a shift register having a predetermined number of bits in four stages, and 11 shifts are performed in response to a master clock φ, which will be described later. This address register 84 operates in a time-sharing manner as a 4-channel address register, and the contents of the final stage are supplied as address data to the waveform memory 7 and input via the gate 81 described above. waveform (rfi number, read/write signal R, /W
Only when R is at Low level, the read/write signal R is read from the waveform memory 7.
When /W is at a high level, a digital signal is read from the corresponding memory address.

Further, the contents of the address register 84 are stored in the gate 85.
In addition to being supplied to the opening/closing f1 generator gland 83 and a control circuit (not shown).

The address signal via the gate 85 is fed back to the adder 84.

Further, the adder 86 is supplied with initial addresses (16 people) from the control circuit via the gate 87.

That is, the load signal LD is directly supplied to the gate 85#, and the inverted signal is supplied to the gate 87 via the inverter 88. When the load signal LD is at a low level, the initial address (CA) from the control circuit is supplied. is gate 87
If the load signal LD is at a high level, the gate 85 is opened and the contents from the address register 84 are supplied to the adder 86.

The adder 86 is supplied with a p-tuk signal from a clock generation circuit 89, and when reading out a digital signal from the waveform memory 7 according to the scale frequency, the adder 86 receives the p-tuk signal at a rate corresponding to the pitch data from the control circuit. is supplied to the adder 86, but when this embodiment functions as an effect device, the clock signal is always supplied to the clock generation circuit 89.
, and is supplied to the adder 86.

FIG. 3 shows how the waveform memory 7 is divided into areas, so that, for example, N pieces of waveform information can be recorded in variable lengths.

Next, the operation of this embodiment will be explained. FIG. 4 shows the relationship between the time division processing state of the plurality of channels of the sound generation control section 8 and the timing signals 1 to [4 supplied to the sample and hold circuit 11aN11d. In the example, four waveform read/write channels are implemented in a time-sharing configuration, and for each waveform read/write channel, you can select whether to perform read processing or write processing. In the state shown in Figure 4, filter 3, sample and
The waveform signals obtained through the hold circuit 5 and the A/I converter 6 are written, and the other channels 2 to 4 (ch2 to 4) write digital waveforms of predetermined areas from the waveform memory 7. It is possible to read out the Igi number.

Further, the above-mentioned timing signals u to t4 go high at times corresponding to the respective channels (ch 1 to 4).
It is designed to take the level, and D at each channel time.
The analog wave shadow signal output from the /A converter IO is sampled by sample-reference-and-hold circuits 111 to lid, and thereafter held.

In addition, each waveform read-write channel of the sound generation control section 8 is
It is now possible to independently specify the read/write area. For example, for channel 2% 3.4, the 3rd
Read out tones 1, 2.3 in the figure and apply them to VCF12b.
~12d, VC" A13b ~13d, mixed with external sound signals as necessary, input via sample reference hold circuit 5 and A/D converter 6, and processed by channel l to generate tone N. It is also possible to perform overdubbing processing.

Further, the CPU 9 sends a switching signal to the analog switch 15 so that the waveform I/H read out from the waveform memory 7 by the processing of the channel 4 is further applied to the VCA 16 via the sample/hold circuit 1idSVCF12d. The waveform signal obtained in this way is
It is also possible to supply the signal to the analog adder circuit 2, mix it with the external sound signal in the same manner as described above, and then write it into a predetermined area of the waveform memory 7.

Next, the operation of this embodiment when used as an effect device will be described with reference to FIGS. 5 and 6.

First, assuming that the area to be used in the waveform memory 7 for performing this operation is up to the rear address n''-'m as shown in Figure 6, the control circuit in the sound generation control section 8 is configured to operate at the address shown in Figure 2. For the register 84, the initial address is n for channel l (chi) and channel 2 (chi).
Input n-1 for channel 2), n-3° for channel 3 (ch3), and n-6 for channel 4 (ch4).

That is, as shown in FIG. 5, the load signal LD is set to Low level for one cycle of channels 1 to 4, and the initial address (CA) is n-1 for channel 1 and n- for channel 2. 2, n-4 for channel 3, n for channel 4
-7 is input, the adder 86 performs +1 processing, and the above-mentioned respective values are set as address data.

Then, channel 1 is configured to sequentially write digital signals from the A/D converter 6 into the waveform memory 7.
The above read/write signal R/W is set to Low level, and the other channels 2 to 4 read out the digital signal written immediately before waveform memory 7 in channel 1 from waveform memory 7. , sets the read/write signal R/W to )(high level).

The open/close signal generating device 83 generates a gate signal Gate which always opens the gate 82 at the timing of channel 1, and for other channels 2 to 4, the address register 84 generates the gate signal Gate 82 as shown in FIG. address n to indicate
Only when you start specifying gate 8
Rub the mixture until it becomes 2.

As a result, due to the operation of channel 1, the waveform memory 7 has wave height values f (rl), f (
n+1), f (n+2), ... are written, and the data is transferred to D via the gate 82.
/A converter 10 and sample hold circuit 1
1 a s V CF 12 a s V CA 13
The signal is converted into an acoustic signal via a, and the sound is emitted.

In addition, in channel 2, as shown in FIG. 5, the digital signal written in the waveform memory 7 by the operation of channel
T (T=4X channel time) late, waveform memory 7
Similarly, in channel 3, reading is performed with a 3T delay, and in channel 4, reading is performed with a 6T delay.

That is, each channel 2 to 4 has an initial address (CA
) is shifted in time by the difference value set as Figure 6.1.
A digital signal corresponding to the indicated peak value is sent to the 1)/A converter 10J.

As a result, the waveform signals of channels 2 to 4 are as follows: ■CF12
b-12d, output via VCA13b-13d,
It is also possible to output sound by controlling the tone and volume separately from the waveform signal of channel 1, which is the original sound.

Below, channel 1 writes the waveform signal supplied via A/D converter 6 to waveform memory 7, channel 2 shifts the time by IT, channel 3 shifts the time by 3T, and channel 4 shifts the time by IT. The time is shifted by 6T and the four sounds are read out from the waveform memory 7, respectively, and four sounds are generated simultaneously. When the address data reaches address m of the waveform memory 7 in FIG. By inputting a new waveform signal and writing a new waveform signal again from address n of the waveform memory 7 in channel l, and reading it out in channels 2 to 4, it becomes possible to continuously use it for extended use over a long period of time. .

Then, during this performance, a swipe from CPU9.

A switching signal is output to circuit 15 so that the output signal from VCF 12d is supplied to VCA 16. VCA
At step 16, an amplification factor is set by the control voltage signal ACVo, and a waveform signal is supplied to the analog adder circuit 2 at the amplification level.

Therefore, the waveform signal stored in the waveform memory 7 by the read process of channel 4 is fed back and converted into a digital signal again by the A/D converter 6, and then by the write process of channel l. , will be written into the waveform memory 7 with the delay time of 6T mentioned above.

Then, this waveform signal to be written again is VCF12
d, in the VCA 16, the tone and flit pass through a feedback loop consisting of the variable control circuit, this vCF 12 d1 switch 15, the VCAI 6, etc. Every summer, for example? It is possible to achieve an effect in which the i & harmonic components gradually decrease and the volume gradually decreases, and the waveform signals written in the waveform memory 7 through the feedback loop in this way are Since 49 colors and volume are varied, and outputs 0UT1 to 4 of the first to fourth channels or a mix output OUTMIX are obtained, effects can be diversified and musically preferable sound can be obtained.

In addition, in the above explanation, all 4 channels are operated,
Although generation is possible at four volumes, fewer channels may be selectively operated to output the original sound and one or more delayed sounds.

Furthermore, in the above description, the delay times for channels 2, 3, and 4 with respect to channel 1 are IT, 3'16jI', but they can be specified on the keyboard/display unit 4, respectively.

In addition, in the above-mentioned embodiment, the VCF is 12° to 12°.
Although the timbre and volume are controlled by the dSVCA13a and N15d, other processing may be applied to the waveform signal.

In addition, the circuit configuration of the sound generation control unit 8 is different from the one in which discrete waveform reading/writing channels are configured by time-division processing as in the above embodiment, to the circuit configuration using separate hardware, that is, the same circuit configuration for the number of channels. The number of waveform read/write channels may be provided by using a waveform reading/writing channel.

Furthermore, a specific channel among multiple channels,
A write-only channel may be used for writing waveform signals into the waveform memory 7, and other channels may be used as read-only channels for reading waveform signals from the waveform memory 7. [Waveform read/write channel] in the present invention refers to an iJ
It means any channel that can be used.

Further, although the above embodiments apply the present invention to an electronic musical instrument having a sampling function, it goes without saying that the present invention can be realized as a digital effect device having a dedicated circuit configuration.

Further, in the above embodiment, only the output of the CF 12d is fed to the VCA 16 via the switch 15 in order to be fed back, but channels 1 to 1 obtained from the analog adder circuit 14
A switch or the like may be separately provided so that all outputs of 4 can be supplied by the switch, and in that case, the versatility is further improved.

〔Effect of the invention〕

As mentioned above, this invention realizes an effect device with a simple circuit configuration, so it is inexpensive.Moreover, since a voltage-controlled filter is provided in the feedback loop, it is musically preferable and can be used in various ways. 0, which has the effect of being able to take on a performance form.

[Brief explanation of the drawing]

The drawings show one embodiment of the present invention, and FIG. 1 is a diagram of its overall circuit configuration, FIG. 2 is a detailed circuit diagram of the sound generation control section 8, and FIG.
4 is a diagram explaining the basic operation of this embodiment. FIG. This figure is a diagram for explaining the operating state of FIG. 5. 6... A/D converter, 7... Waveform memory, 8...
・Sound control unit, 9...CPU, 1g・I)/A converter, 12a to 12d"・VCP. 13a to l3d-VCA. 15...Switch, 16... VCA. 81, 82. 85. 87... Ge
- t, 84...address register, 86...adder.

Claims (3)

[Claims] (1) analog-to-digital conversion means for converting an input waveform signal into a digital signal; waveform memory means for storing the digital signal output from the analog-to-digital conversion means; reading out the digital signal from the waveform memory means;
a control means having a plurality of waveform read/write channels for performing write processing; and one waveform read/write channel of the control means to write the digital signal supplied from the analog-to-digital conversion means into the waveform memory means. and means for reading out the digital signal written in the waveform memory means by at least two waveform read/write channels of the control means, provided corresponding to the plurality of waveform read/write channels, a plurality of voltage-controlled filters whose filter characteristics can be independently varied; and a plurality of voltage-controlled filters whose filter characteristics can be varied independently; and a plurality of voltage-controlled filters each having a digital-to-analog conversion of the digital signal read out from the waveform memory means by the at least two waveform read/write channels. feedback means for feeding at least one waveform signal among the waveform signals outputted through the plurality of voltage-controlled filters to the analog-to-digital conversion means; An effect device characterized by comprising means. (2) The digital signal obtained by conversion by the analog-to-digital conversion means, together with the digital signal read from the waveform memory means by the at least two waveform read/write channels of the control means, is 2. The effect device according to claim 1, wherein, after being converted, the signals are sent to the corresponding voltage-controlled filters to produce acoustic outputs. (3) The control means includes variable setting means capable of variably setting the delay time when the digital signal is read from the waveform memory means by the at least two waveform read/write channels. An effect device according to claim 1 or 2.