JPS6262395A - Effect apparatus - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an effect device in which at least a main part thereof is constructed using a digital circuit including a waveform memory and a voltage-controlled filter.

[Background of the invention]

A variety of so-called effectors have been developed in the past that add various effects to musical instrument sounds to produce sounds that are quite different from the original sound.
Many of them use elements such as BDs, which have drawbacks such as poor S/N ratio. In addition, in recent years, devices have been developed that have a digital memory called a digital delay device, into which a waveform signal is written and read out after a delay time, but the output signal is monotonous, so this is not desirable. It wasn't.

[Object of the Invention] The present invention has been made in view of the above point K11i, and an object thereof is to provide an effect device that can add various effects to input original sound.

[Key points of the invention]

This invention was made to achieve the above-mentioned object, and it converts an input waveform signal into a digital signal,
The digital signal is once written into the waveform memory means, the written digital signal is read out by multiple waveform reading/writing channels, and after being converted into an analog signal, it is filtered independently for each waveform reading/writing channel. The key point is that the voltage is applied to a plurality of voltage-controlled filters whose characteristics can be varied, and the timbre is controlled to obtain acoustic output.

〔Example〕

The present invention is as follows.
An example will be described in which an electronic musical instrument having a so-called sampling function is used, in which modulation such as CodedModulation is performed and digitally recorded, and the resulting signal can be used as a sound source signal for a keyboard instrument.

FIG. 1 shows the circuit configuration of this embodiment, and shows the input signal (IN
) is suitably amplified by the input amplifier 1, then supplied to the analog adder circuit 2, and then supplied to the filter 3, where unnecessary high-frequency components are appropriately removed, and then sent to the sample/hold circuit (S/H). After being sampled at a suitable sampling frequency at 5, the signal is supplied to an A/D converter 6. A/
The D converter 6 converts the input analog signal into a corresponding digital signal and supplies it to the sound generation control section 8.

This sound generation control section 8 includes, for example, four waveform read/write channels, each of which can independently write or read waveform signals into or from the waveform memory 7.

This sound generation control unit 8 operates under the control of a CPU 9 consisting of a microcomputer, etc., and the details thereof will be described later, but the sound generation control unit 8 corresponds to four waveform read/write channels. Digital signals corresponding to up to four tones are read out from the waveform memory 7 in a time-division manner and applied to the D/A converter 10 in a time-division manner, and then sent to a sample and hold circuit (S/H). ~lid.

The sample and hold circuits 11a to 11lid perform a sampling operation for each time-division processing channel time using timing signals t1 to t, which will be described later.

The voltage signals held in the sample and hold circuits 11a to 11d are supplied to VCFs (voltage controlled filters) 12a to 12d in a corresponding manner. Each of these VCFs 12a to 12d K is a voltage signal F which will be described later.
CVI~FCV4 is supplied, and this voltage signal FCVI~
Independent busy filtering processing is performed according to FCV4. That is, for example, the cutoff frequency is varied by each voltage signal FCVI to FCV4, and VCF12a
The respective outputs of ~12d have different frequency characteristics.

The VCFs 12a to 12d send filtered analog waveform signals to VCAs (voltage side @current amplifiers) 133 to 13d.

The amplification factors of the VCAs 13a to 13d are independently controlled by the supplied control voltage signals ACV1 to ACV4, and the output level or volume envelope of the waveform signals supplied from the VCFs 12a to 12d is determined.

The output signals of the VCAs 13a to 13d are sent out to the outside as outputs 0UT1 to 0UT4 of each channel, respectively, and are appropriately amplified and emitted as a sound spring signal. In addition, the outputs of these VCAs 13a to 13d are
It is also possible to supply the signals to the analog adder circuit 14, mix them, and take them out as a mixed output OUTMIX.

In addition, vCF12d corresponding to the fourth channel mentioned above
The output of the analog adder circuit 14 and the output of the analog adder circuit 14 are supplied to an analog switch 15 that performs a switching operation according to a control signal from the CPU 9 described above.

This analog switch 15 connects the output of the VCF 12d,
The output of the analog adder circuit 14 is selected and supplied to a VCA (voltage controlled amplifier) 16.

The VCAI 6 amplifies the supplied control voltage signal ACVO and feeds it back to the analog adder circuit 2 described above.

Therefore, the external sound signal supplied via the input amplifier 1,
The waveform signal obtained by reading out the waveform memory 7 can be mixed in this analog adder circuit 2 and supplied to the waveform memory 7 again, so that a so-called overdubbing function can be realized in this embodiment. Become. Note that when overdubbing is not performed, the voltage control signal ACVO for VCAI 6 is set to zero level.

Reference numeral 4 in the figure denotes a keyboard/display unit consisting of a keyboard with performance keys and various control switches, and a liquid crystal display panel for displaying various statuses, and the CPU 9 and this keyboard/display unit 4 exchange data. I do.

In addition, this CPU 9 performs the above-mentioned through software processing.
? , : Each control signal FC■1 to FCv4. ACv1～
The voltage is supplied to converter group 17 and converted into respective voltage signals.

This D/A conversion group 17 may have a number of D/A converters corresponding to the number of control signals cv, or
A single D/A converter is used in a time-division manner to
In combination with a hold circuit.

A necessary number of control signals Cv may be obtained.

Next, the detailed circuit configuration of the sound generation control section 8 will be explained using FIG. 2.

A digital signal supplied from the A/D converter 6 is supplied to the waveform memory 7 via a gate 81 and is also sent to the D/A converter 1o via a gate 82.

The above-mentioned gate 81 is controlled to open and close by being supplied with a read/write signal R/W generated from a control circuit (not shown) inside the sound generation control section 8 based on a control command generated by the CPU 9.

That is, when writing a waveform signal into the waveform memory 7, this gate 81 is opened, and when reading a waveform signal from the waveform memory 7, this gate 81 is closed.

The gate 82 also receives a gate signal Gate from an opening/closing signal generator 83 based on a control signal from a control circuit.
is given, and this gate 82 is opened only when outputting the digital signal supplied via the gate 81 or when outputting the digital signal read out from the waveform memory 7; otherwise, this gate 82 is opened. Gate 82 is closed.

Its output is set to zero level.

Reference numeral 84 in FIG. 2 is an address register composed of a shift register having a predetermined number of bits in four stages, and a shift operation is performed by a master clock φ, which will be described later. This address register 84 operates in a time-division manner as a %4 channel address register, and the contents of the final stage are supplied to the waveform memory 7 as address data and inputted via the gate 81 mentioned above. The waveform signal is written to the memory address only when the read/write signal R/W is at Low level, and the read/write signal R/Wb;
When it is at high level, the digital signal will be read from the corresponding memory address.

Further, the contents of the address register 84 are stored in the gate 85.
In addition to being supplied to the switching signal generator 83 and the control circuit.

The address signal passed through the gate 85 is sent to an adder 86, and after addition and subtraction are performed to increment the address as necessary, it is fed back to the address register 84.

Further, an initial address (CA) is supplied to this adder 86 from the control circuit via a gate 87.

That is, the load signal LD is directly supplied to the game) 85,
The initial address (CA) from the control circuit is inverted and applied to the gate 87 via an inverter 88, and when the load signal LD is at a low level, the initial address (CA) from the control circuit is supplied to the adder 86 from K when the gate 87 is opened. On the other hand, if the load signal j is at a high level, the gate 85 is opened.

The contents from address register 84 are provided to adder 86.

The adder 86 is supplied with a clock signal from a clock generation circuit 89, and when reading the digital signal from the waveform memory 7 according to the musical scale frequency, the clock signal is supplied to the adder 86 at a rate according to the pitch data from the control circuit. However, when this embodiment functions as an effector device, the clock signal is always supplied to this clock generation circuit 89.
, and will be supplied to adder 86.

FIG. 3 shows how the waveform memory 7 is divided into areas, so that, for example, N pieces of waveform information can be recorded in variable lengths.

Next, the operation of this embodiment will be explained. FIG. 4 shows the relationship between the time-divided processing states of a plurality of channels of the sound generation control unit 8 and the timing signals t, -t4 supplied to the sample and hold circuits 11a-lid, and as described above,
In this embodiment, four waveform read/write channels are realized in a time-division configuration, and at each waveform read/write channel, it is determined whether to perform read processing or V-input (write) processing. It can be specified selectively, and the fourth
In the state shown in the figure, the processing of channel 1 (ch4) causes the filter 3. A waveform signal obtained via a sample/hold circuit 5 and an A/D converter 6 is written.

Other channels 2 to 4 (ch2 to 4) can read digital waveform signals in predetermined areas from the waveform memory 7.

In addition, the above-mentioned timing signal 1. -1. is at the time corresponding to each channel (chl~4).

The analog waveform signal outputted from the D/A converter 10 at each channel time is sampled by the sample/hold circuits 11a to 11lid and held thereafter.

In addition, each waveform read/write channel of the sound generation control section 8 is
It is possible to specify the area to be read and written independently. For example, on channel 2.3.4, tone 1.2.3 in Figure 3 is read out and it is sent to VCF12b ~
12d, the processing is controlled by VCAs 13b to 13d, and the analog addition circuit 14, switch 15. After being supplied to the analog adder 2 via the VCAI 6 and mixed with an external sound signal as necessary, the sample and hold circuit 5. A
It is also possible to input the signal through the /D converter 6 and record it again in the waveform memory 7 as tone N by processing the channel 1, that is, to perform overdubbing processing.

Further, the CPU 9 sends a switching signal to the analog switch 15, and supplies the waveform signal read out from the waveform memory 7 by the processing of the channel 4 to the sample/hold circuit 11d and VCF 12d. It is also possible to write the signal into a predetermined area of the waveform memory 7 after mixing it with the external sound signal in the same manner.

Next, the operation of this embodiment when used as an effect device will be described with reference to FIGS. 5 and 6.

First, assuming that the area used in the waveform memory 7 for performing this operation is from addresses n to m as shown in FIG.
The control circuit in the sound generation control section 8 sets the initial address n for channel 1 (chi) and n for channel 2 (ch) for the address register 84 shown in FIG.
2), n-1°, channel 3 (ch3), n-3, channel 4 (ch4), n
Enter -6.

That is, as shown in FIG. 5, the load signal LD't Low level is set for one cycle of channels 1 to 4, and channel 1 is set as the initial address (CA).
Input n-1 for channel 2, n-2 for channel 3, n-4 for channel 4, and n-7 for channel 4, perform +1 processing in adder 86, and add the above-mentioned values to the address. Set as data.

Then, channel 1 is configured to sequentially write digital signals from the A/D converter 6 into the waveform memory 7.
Set the above read/write signal R/W to Low level,
The other channels 2 to 4 are configured to read the read/write signal R/W from the waveform memory 7 so that the digital signal written in the waveform memory 7 immediately before in the channel 1 is read out from the waveform memory 7.
Set W to H3gh level.

Further, the opening/closing signal generating device 83 generates a gate signal Qate that always opens the gate 82 at the timing of channel 1, and for other channels 2 to 4,
The gate 82 is opened only when the address register 84 specifies an address after address n shown in FIG.

As a result, the waveform memory 7 has wave height values f(n), f(n+1
), f (n+z), .
The signal is converted into an acoustic signal via the CF 12a and the VCA 13a, and is emitted as sound.

In addition, in channel 2, as shown in FIG.
T (T=4X channel time) later, read from the waveform memory 7, and similarly in channel 3, 3T
Read with delay, 6 on channel/L/4
The data will be read out over a T-day delay.

That is, each channel 2 to 4 has an initial address (CA
), the D/A converter 10 outputs a digital signal corresponding to the peak value shown in FIG.
Send to.

As a result, the waveform signals of channels 2 to 4 are
b to 12d and VCAI 3b to 13d, the tone is different from the waveform signal of channel 1, which is the original sound.
It is also possible to control the volume and output the sound.

Thereafter, channel 1 writes the waveform signal supplied via A/D converter 6 to waveform memory 7.

In channel 2, the time is shifted by IT, in channel 3, the time is shifted by 3T, and in channel 4, the time is shifted by 6T, and these are read out from the waveform memory 7, and four sounds are generated simultaneously, as shown in Fig. 6. Address m of waveform memory 7
When the address data arrives, the initial address is input again as n-1, and channel 1 writes a new waveform signal from address n of waveform memory 7 again, and channels 2 to 4 read it. If you do this, you will be able to continue playing for a long time.

In addition, in the above explanation, all 4 channels are operated,
Although generation at four volumes is possible, fewer channels may be selectively operated to output the original sound and one or more delayed sounds.

Further, in the above description, the delay times of channels 2, 3, and 4 with respect to channel 1 are IT and 3T.

6T, but each can be specified using the keyboard/display section 4.

As mentioned above, in this embodiment, multiple waveform readout and
While writing the waveform signal in the waveform memory 7 using the write channel, each waveform signal is read out with a delay of a predetermined time, and is combined with the waveform signal which is the original sound and output, and each waveform read/write channel VCF 12a~1 per
Since the timbre is variably controlled in 2d, a variety of delay effects can be achieved.

In addition, K for each waveform read/write channel, VCA13
Since the sound waves a to 13d are generated independently by variable control of the sound waves or the volume envelope, even more effective sound can be obtained.

In addition, in the embodiment described above, the VCFs 12a to 12
d. Although the timbre and volume are variably controlled by the VCAs 13a to 13d, other processing may be applied to the waveform signal.

In addition to the circuit configuration of the sound generation control unit 8, in addition to configuring a plurality of waveform read/write channels by time-division processing as in the above embodiment 5, the circuit configuration is made of separate hardware, that is, the same circuit configuration for the number of channels. A plurality of waveform read/write channels may be provided by using a plurality of waveform read/write channels.

In addition, 4 out of multiple channels! A certain channel may be a write-only channel for writing waveform signals into the waveform memory 1J7, and other channels may be read-only channels for reading waveform signals from the waveform memory 7.

In the present invention, the term "waveform read/write channel" refers to any channel that can perform either read or write operations, or both.

Further, in the above embodiment, the present invention is applied to an electronic musical instrument having a sampling function, but it goes without saying that the present invention can be realized as an effect device having a dedicated circuit configuration.

〔Effect of the invention〕

As mentioned above, this invention realizes an effect device with a simple circuit configuration, which is inexpensive, and also controls the timbre of multiple sounds based on the input sound by varying the filter characteristics of the voltage-controlled filter. Since the music is made to occur at the same time after the music, it is musically preferable and has the effect of making it possible to take a variety of performance forms.

[Brief explanation of drawings]

The drawings show one embodiment of the present invention, and FIG. 1 is an overall circuit configuration diagram thereof, FIG. 2 is a detailed circuit configuration diagram of the sound generation control section 8, and FIG.
4 is an explanatory diagram of the basic operation of this embodiment. FIG. 5 is a diagram showing a time chart when operating as an effect device. FIG. 6 is a diagram for explaining the operating state of FIG. 5. 6... A/D converter, 7... Waveform memory, 8...
Sound generation control section, 9...CPU, 10.D/A converter, 12
a~12d・VCF, 13a~13d-VCA
, 81° 82.85, 87...gate, 84...address register, 86...adder.

Claims (3)

[Claims] (1) analog-to-digital conversion means for converting an input waveform signal into a digital signal; waveform memory means for storing the digital signal output from the analog-to-digital conversion means; reading out the digital signal from the waveform memory means;
a control means having a plurality of waveform read/write channels for performing write processing; and one waveform read/write channel of the control means to write the digital signal supplied from the analog-to-digital conversion means into the waveform memory means. Further, means for reading out the digital signal written in the waveform memory means by at least two waveform read/write channels of the control means, and means provided corresponding to each waveform read/write channel of the control means. a plurality of voltage control amount filters whose filter characteristics can be independently varied for each waveform read/write channel; and digital-to-analog conversion of the digital signals read by the at least two waveform read/write channels. , means for supplying the signal to the corresponding voltage-controlled filter and obtaining an acoustic output after filtering. (2) The digital signal obtained by conversion by the analog-to-digital conversion means, together with the digital signal read from the waveform memory means by the at least two waveform read/write channels of the control means, is 2. The effect device according to claim 1, wherein the converted signal is supplied to the corresponding voltage-controlled filter for filtering. (3) The control means includes variable setting means capable of variably setting the delay time when the digital signal is read from the waveform memory means by the at least two waveform read/write channels. An effect device according to claim 1 or 2.