JPS6262643A - Data transmission system - Google Patents

Abstract

PURPOSE:To attain a data transmission between a host computer and a center equipment at high speed by adopting a bus coupling using a dual port RAM (common RAM) between a computer and the center equipment and providing a communication mail box and a private data memory in the common RAM. CONSTITUTION:The main box MB is transferred from the computer 41 to the center equipment 43 or vice versa, its content is analyzed and decoded. If a change requiring urgent communication takes place as to a Di data at the terminal 45 of an address an, the new Di data is transferred and set to the mail box MB, an interruption iNT signal is outputted and informed to the computer 41 to transmit a data between the computer 41 and the center equipment 43 at the high speed.

Description

[Detailed description of the invention] [Technical field to which the invention pertains]

The present invention is a center device (also referred to as a master station) that controls transmission.
, a plurality of terminal devices (also referred to as terminal stations or terminals),
In a transmission system that is equipped with a host computer a (also referred to as a computer in nL) and exchanges data between a main station and a terminal station or between the terminal station and the same dome, and also exchanges data between the main station and a host computer. The present invention relates to a system that can perform data transmission according to requests for speeding up data exchange between a host computer and a terminal.

[Prior art and its problems]

In the following description of each figure, the same reference numerals indicate the same or corresponding parts. The prior art closest to the present application is Japanese Patent Application No. 59-244251 "Data Transmission System" (hereinafter referred to as Application (1)) by the present applicant;
No. 4254 Data Transmission System” (hereinafter referred to as application (2)
). Like the general-purpose multiplex signal transmission device (product name: remote terminal) to which these inventions are applied,
For the purpose of collecting input data from scattered devices to a central computer (e.g., a personal computer) in order to perform centralized monitoring and control of devices scattered in various places, and transmitting control outputs to the scattered devices from the computer, Various data transmission devices have been made. These data transmission systems generally have a center device (main station) that controls communication for data transmission and exchanges data with terminals, and a plurality of terminals.
How should the data collected from the terminal to the center device be transmitted to the computer, or how should the control output data that the computer is equipped to output to the terminal be transmitted to the terminal via the above-mentioned center device? A problem arises. Conventionally, therefore, it has been common practice to provide a center device with a communication interface with an external host computer, and to perform data transmission between the center device and the host computer via this interface. As a general-purpose interface, the R3232C or GPiB interface, which is also installed in personal computers, is used. However, even if these interfaces are used, a communication protocol (control procedure) is still required, and in addition to error handling during data communication, data to execute the above procedure is also added. However, there is a drawback that the data transmission time between the computer and the center device becomes slow. For this reason, even if the center device collects data from the terminal at high speed, there may be a delay in the arrival time of the data from the center device to the computer side, or a delay in the time for control output from the computer to the terminal to be transmitted to the terminal. There is a problem with storing it away. In order to solve these problems, it is conceivable that data transmission speed can be increased by connecting a center device using a bus within a computer. This lotus is a computer with its internal memory or a person. Since it is a lotus for controlling output devices, it basically matches the operating speed of the computer.
It is convenient because data can be exchanged, and the above problem, that is, it takes time to transmit and the data transmission is slow, is improved. There are methods that are used as standard in the industry, such as Intel Corporation's trademark), as well as methods that are independently designed on the computer side.There are various methods for these hash combinations, but
In this case, there are two types of access: from the computer side to the center device side, or conversely from the center device side to the computer side.
There are two modes. In addition, the center device side has a timing for collecting data from terminals, and the computer side has a timing determined by the flow of the program, and these will conflict unless they cooperate. For this reason, in many data transmission systems, how to control these timings and determine priorities has become an important issue. In addition, as one method for controlling these communications, dual port RAM is used to ensure data exchange without abnormalities.
Data is exchanged using a mailbox method. This dual port RAM is a RAM device that has a port for the data bus and address bus on the computer side and a port for the data bus and address bus on the center device side, and this device also has one of the ports. A bus control circuit is provided for writing to or reading from the RAM device. By the way, as mentioned above, the mailbox method is used as a method for exchanging data using dual-port RAM, but even with this method, various information is added in the same way as with serial transmission. However, in order to take measures against errors and abnormalities, the problem remains that the net data transmission time inevitably becomes slower. Also, regarding the method of sending control output from a computer to a terminal, there are cases where data is periodically transmitted to several terminals, and cases where data should be transmitted and output with priority to one terminal. Therefore, it is desired that such various data transmissions can be carried out efficiently.

[Purpose of the invention]

The present invention eliminates the above-mentioned problems, enables high-speed data transmission between a host computer and a center device, and
Sequential and periodic normal data transmission between a host computer and a large number of terminals (hereinafter referred to as cyclic communication), and emergency data transmission between a specified terminal (hereinafter referred to as individual communication). The purpose is to provide a data transmission system that can be carried out efficiently.

[Key points of the invention]

The main point of the present invention is to connect a host computer and a center device via a bus using a dual port RAM.
There are two areas within M, namely, a mailbox (area) for transferring terminal addresses, Di, Do data, registration data, etc., which should be given priority to data transfer at any given time, through individual communication giving priority to cyclic communication. ) and cycle
D arranged by address of all terminals for Tsuk communication
i. A dedicated data memory (area) is provided for storing DO data, and DO data is written from the computer side. By reading the Di data and allowing the center device to read the DO data and write the Di data, it is possible to individually communicate with the terminal at the address using the mailbox and to use the dedicated data memory. The aim is to efficiently transmit prioritized data through cyclic communication with terminals. In other words, the main point of the present invention is to provide a system that includes a center device, a plurality of address-specific terminals connected from the center device via transmission paths, and a host computer connected to the center device via a common RAM (common RAM, etc.). , the center device controls data transmission and exchanges data with the terminal, and the host computer sends the data written in the common RAM to the terminal via the center device, and the center device receives the data from the terminal. In a data transmission system in which data is exchanged with a terminal by reading data written to a common RAM, a data storage area (dedicated data memory, etc.) for normal communication (such as cyclic communication) is provided in the common RAM. and data storage area used for emergency communications (individual communications, etc.)
(hereinafter referred to as a mailbox), and the data storage area for normal communication is provided for each address of each terminal, and each data area (Do data and Di data) that the host computer sends to and receives from the terminal. In addition, the mailbox should contain at least the address of the terminal related to emergency communication and the data (
Do data, etc.), and the center device reads the data storage area for normal communication,
While writing, repeatedly specify the address of each terminal or the corresponding address (block address, etc.) in a predetermined order to exchange data, read at least the mailbox, and give priority to the data exchange. , the data transmission is performed by specifying the terminal with the address related to the emergency communication.

[Embodiments of the invention]

The present invention will be described in detail below based on FIGS. 1 to 4. FIG. 1 is a RAM layout diagram as an embodiment of the present invention, FIG. 2 is an explanatory diagram of communication order, FIG. 3 is a configuration diagram of a data transmission system, and FIG. This is a configuration diagram of a port RAM. In FIG. 3, 45 (45-1, 45-2, -) is a terminal for each address, 43 is a center device, and the device 43 is
It controls data transmission between the terminals 45 or between the center device 43 and the terminal 45, and also exchanges data with the terminal 45 through this transmission. 44 is a center device 43 and each terminal 4
A common transmission path 41 connects the two terminals 5 and 41 is a host computer (also simply referred to as a computer) that exchanges data with the center device 43 via the dual port RAM 42. Also, 46 is
Di data inputted to the terminal 45 from outside this system and further sent to the computer 41 via the center device 43;
47 is from the computer 41 to the terminal 45 via the center device 43.
This is Do data that is sent to the terminal 45 and is further output from the terminal 45 to the outside of this system. Although the configuration of the transmission path 44 is shown in a multi-drop format in FIG. 3, it may be connected in a loop, so the format of the transmission path is not particularly important. Next, in the dual port RAM 42 shown in FIG. 4, the left side of the figure is a bus for the computer 41, and the right side is a bus for the center device 43. This dual port RAM M42
has two ports, one on the computer 41 side and one on the center device 43 side, and writing to or reading from the common RAM 1 is performed from either one. Common RAMI owns address space of 2 bytes, so address bus 2
．． 5.8 consists of l1 bit. Since the computer 41 side has a predetermined address space (for example, 1 Mbyte), addresses of 12 bits or more are given to the address bus 12, and the address decoder 11 detects that the common RAMI has been designated as a memory address. When detected, the chip select signal port from the decoder 11 is connected to the common RA.
The signal is generated toward the M selection circuit 10. Furthermore, since an 8-bit microcomputer is used in this example, data buses 3, 6.9 represent 8 bits. The common RAM selection circuit 10 configured as shown in this figure is connected to the computer 41.
Control is performed so that only either the side or the center device 43 side can use the common RAMI. That is, if either one of them is generating the chip select α]) signal, the selection circuit 10 gives the right to use the common RAMI preferentially, gives the signal to the bus controller 4 or 7, and also outputs the signal to the common RAMI. Chip select (63) signal read/write (WR/π lower) signal 13 or 17
Control is performed so that the right to use is granted from the bus side to which it has been granted. Further, when the computer 41 side preferentially uses the common RAM, the common RAM selection circuit 10 puts the center device 43 side in a wait state by applying the LOCK signal 15 to the selection circuit 10, and conversely, the center device 43 side uses the selection circuit 10
If you give override signal 19 to
A CK signal 14 is generated to the computer 41 and the process can proceed to the next step. In addition, in order to communicate mutual movements between the computer 41 side and the center device 43, the computer 41 side provides a system reset signal 21, and when data to be transmitted is generated from the center device 43 side, the interrupt iNT A signal 16 is provided. FIG. 1 is a RAM layout diagram of the common RAMI configured in this manner. Common RAMI is 2 bytes and (
As shown in a), it is divided into four areas here. That is, the upper two MBs (MBI, MB 2) are communication mailboxes (also simply referred to as mailboxes), and the lower two MDs (MDI, MD2) are Di data 46. This is a dedicated data memory as a storage area for Do data 47. (b) shows an allocation diagram for each address a of the terminal 45 in the dedicated data memory MD. Further, (C) is a layout diagram of the mailbox MB, which will be described in detail later, in which MBF is flag control data, MBP is parameter data, and MBD is a data area. FIG. 2 shows the communication order in this data transmission system. FIG. 5A shows an example of cyclic communication T1 that is normally performed. That is, for example, if the address of the terminal 45 is set in advance,
It is divided into groups consisting of a predetermined number of addresses (however, each address within this group is ordered in advance), and block addresses B (Bl to B4) are assigned to each group. B1 to B4 (Bl
-B2-B3-B4→B1 . While sequentially specifying the address of each terminal belonging to the block, the D0 data 47 is transmitted from the center device 43 to the terminal.
, the center device 43 receives Di data sequentially from each terminal 45, and allows communication between the terminals. In addition, FIG. 2(b) is an example in which the individual communication T2 is included in the cyclic communication TI. In this example, in the middle of the cyclic communication TI, a certain Address a (a4.a
Communication T2 between the three terminals 45 (m, an) and the center device 43 is performed within the period indicated by each terminal address an, am, an in the same figure, and then cyclic communication T2 is performed again.
It has returned to l. These transmission controls have already been disclosed in the above-mentioned application (1), so a detailed explanation will be omitted. Returning to FIG. 1, the Di data 46. or DO data 47 in the dedicated data memory shown in FIG.
The Di data 46, that is, the manual data of the terminal 45 obtained by the center device 43, is transferred to the dedicated data in the common RAMI by the center device 43 in the cyclic communication TI shown in FIG. It is written to the memory MDI and read out when required by calculation i41. Further, the Do data 47 written to the dedicated data memory MD2 of the common RAMI by the computer 41 is read out by the center device 43 and used as terminal output data in the cyclic communication T1 shown in FIG. With this configuration, the dedicated data memory MD
The DO data 47 or Di data 46 in
It is written in the memory and can be pulled out and used when necessary.
Extremely simple operations, that is, data exchange, can be realized in a short time. However, in this cyclic communication TI method, if the cyclic cycle is long, even if the DO data 47 is written to the common RAMI, it may not be transmitted until the transmission timing of the data in that cycle is reached. Even if certain data changes in the Di data 46, various operations must be performed in order to detect this change on the computer 41 side, which has the disadvantage that detection is delayed. As a method for supplementing these, the communication mailbox MB (MHI, MB2) shown in FIG. 1 can be used. The reason why two mailboxes MB1 and MB2 are prepared as communication mailboxes MB is so that if one mailbox is in the process of receiving, it is possible to write the next mail in the other mailbox. This mailbox MB is used in various other ways, but in individual communication T2 (Fig. 2), it is used in Fig. 1 (Fig. 1).
In the flag control data MBF section like C1,
The presence/absence of data (referred to as main data for convenience) in the data area MBD in the mailbox, the data length of the main data, the designated classification of the contents of the main data, whether the mailbox is in use or not, and the message type. Flags and data indicating transfer quality, etc. are stored. Next, the parameter data MBP stores parameter data for indicating the details of the data format for the specified classification of the main data contents. In addition, the data area MBD contains main data, that is, DO data 47 sent urgently from the computer 41 to the terminal 45 and the address of the terminal, or Di data 46 sent urgently from the terminal 45 to the computer 41 (however, this data 46 is temporarily sent to the center device 43 is received from the terminal 45 through the above-mentioned cyclic communication T1, etc., and then transferred to the mailbox MB by the center device 43) and the address of the terminal are stored. Such a mailbox MB is transferred to the computer 41-center device 43, or the center device 43-computer 41, and its contents are analyzed and interpreted. By using such a mailbox, for example, the address an,
The computer 41 instructs the center device 43 to transmit the Do data 47 to the am and an terminals, or the center device 43 receives the D+ data obtained from the terminal 45.
Data 46 (this is stored in data memory MDI)
In the terminal 45 with the address an consisting of, Di data 4
If a change occurs that requires emergency notification regarding 6.
The new Di data 46 is transferred to the mailbox MB, and the interrupt iNT signal 16 shown in FIG. 4 is output.
By notifying the computer 41 of the information, high-speed data transmission between the calculation all and the center device 43 becomes possible. As mentioned above, the center device 43 receives the addresses al and am from the computer 41 via the mailbox MB. Upon receiving the Do data 47 for an's terminal 45, the second
As shown in FIG.
2 is executed sequentially with priority. After this individual communication T2 ends, the process returns to cyclic communication T1. In addition to performing this individual communication T2, the center device 43
updates and stores the corresponding DO data 47 in the corresponding address section in the dedicated data memory MDZ in the common RAMI as new o data, and performs the next cyclic communication TI.
be reflected in. The details of the transmission of the changed Di data 46 to the computer 41 side are described in the above-mentioned application (2). On the other hand, if you use this communication mailbox MB,
Any kind of control and data transmission is possible, but as shown in Figure 1 (C1), various flag control data and parameter data are added, so it is necessary to interpret such data. Therefore, Figure 1 fa)
Dedicated data memory MDI, Di data 46 in MDZ
．． Compared to directly exchanging Do data 47, there is a problem that data transmission takes time (
However, this comparison excludes the time during which the terminal waits for its turn to update during cyclic communication). According to some calculations, there is a difference between reading Di data directly from the dedicated data memory MDI and receiving Di data via the mailbox MB. , it takes 10 times as much time as when a request command is transmitted to the center device side, and then the center device writes Di data into a mailbox and reads it out with a computer. This will reduce the processing power of the computer, and it is not desirable to use the mailbox MB frequently. However, 1. As mentioned above, the change Di data 46 on the terminal side
, or when you want to send Do data 47 to a certain terminal as soon as possible, it is more rational to use a mailbox, as using only the cyclic communication procedure will delay the final data transmission, which is undesirable. . Also, cyclically communicated dedicated data memo + JMDI
, D1 data in MDZ 46. The Do data 47 is 1. when displaying the operating status of the terminal. Since it can be used as is, there is also the advantage that creating programs is extremely easy.

【Effect of the invention】

As is clear from the above description, according to the present invention, the computer and the center device can be connected to a dual-baud RAM (common RAM).
), and this common RAM includes a communication mailbox for individual communication with terminals, and a dedicated data memory that allows direct access to D i and DO data for cyclic communication for each terminal. is provided, and when it is necessary to transmit data at high speed using the communication mailbox and dedicated data memory, the communication mailbox is used preferentially in an individual communication method, and when high-speed transmission is not required, the Using a cyclic communication method using a dedicated data memory, change Di data and failure Di data are transmitted from the terminal to the computer side via the center device, and similarly, control output DO is sent from the computer side to the terminal side via the center device. Since data is transmitted, flexible data transmission can be realized.

[Brief explanation of the drawing]

Fig. 1 is a common RAM layout diagram as an embodiment of the present invention, Fig. 2 is also an explanatory diagram of the communication order, Fig. 3 is also a configuration diagram of the data transmission system, and Fig. 4 is also a dual port It is a block diagram of RAM. 1: Common RAM, 41: Upper computer (computer), 42
dual port RAM, 43: center device, 44: transmission line, 45 (45-1, 45-2--): terminal, 4
6: Di data, 47: Do data, MB: (M
B 1゜MB2): Communication mailbox (mailbox)
Nox), MD (MD I, MD 2):
Dedicated data memory, B block address, a (a
ff, am, an): terminal address, T1: cyclic communication, T2: individual communication. (Q) Common RAM 1 (C) Communication endpoint M3

Claims (1)

[Scope of Claims] 1) A center device, a plurality of address-specific terminals connected from the center device via a transmission path, and a host computer connected to the center device via a common RAM, the center device is capable of transmitting data. In addition to controlling the terminal, it also exchanges data with the terminal.
The host computer sends data written to the common RAM to the terminal via the center device, and the center device reads the data received from the terminal and written to the common RAM, thereby exchanging data with the terminal. In the data transmission system, a common RAM is provided with a data storage area for normal communication and a data storage area (hereinafter referred to as mailbox) used for emergency communication, etc., and the data storage area for normal communication is
The mailbox is provided with each data area for each terminal address, and the host computer sends and receives data to and from the terminal. The center device reads the data storage area for normal communication, and stores the data to be transmitted in the terminal.
While writing, repeatedly specify the address of each terminal or the corresponding address in a predetermined order to send and receive data, read at least the mailbox, and give priority to the data transfer and receive the relevant emergency message. A data transmission system characterized in that data transmission is performed by specifying a terminal having an address related to communication.