JPS6232748A - Data transfer equipment - Google Patents

Abstract

PURPOSE:To speedily recognize the same periodicity of communicated data of one block for each block data unit at a time in terms of periodical communication processing by adding a frame and a flag to communication data. CONSTITUTION:Prior to writing transmission data in a port memory 3a, a transmission side sets 00H value as flag information in the flag area of the memory 3a. Then frames different from each other for every data transmitting period are added before and after each transmission data of a byte or word construction. At this time frames before and after said data are identical. After all transmission data is written in a transfer data area, the flat in the flag area is set to 01H value. A reception side decides whether the flag information is 00H value or not among a piece of transmitted data, and judges the write termination of transmission data in a current transmission processing period if said information is 01H value. Then the reception side decides whether frames before and after one block transmission data are different or no, and decides that all the data is of the same period, if said frames are identical.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a data transfer device that performs data communication between a plurality of decentralized control devices or between a control device and a host computer using a data way system. be.

[Conventional technology]

When a plant is controlled by a plurality of digital control devices, communication between each control device and data transfer to a host computer are essential. Although there are various methods for transferring these data, a method using a data way system is well known. FIG. 4 shows the configuration of a digital control system using the data way system.

In Fig. 4, (Ia), (Ib) to (In) are decentralized digital control devices, (2) is a host computer that monitors the plant, (3) is a data way system station, and (4) is a host computer that monitors the plant. ) is the plant, (5) is the host computer (2) and each type I control device (la), (lb) ~(
(in) is a data transmission line that transfers data between.

Next, the operation will be explained. Each digital control device (l
a), (Ib) to (in) input the signal (analog or digital signal) from the plant (4),
After performing predetermined control calculations, control signals and the like are outputted to the plant (4) as analog or digital signals. Here, when the digital control device (la) performs plant control, other digital control devices m (Ib) or (I
n) may require a signal input from the plant (4) or a result calculated by the digital control device (lb) or (In). In such a case, the digital control device (la) is connected to the digital control device (1b) or (1n) via the station (3) using a dataway system.
) periodically receives the necessary signals.

That is, as shown in FIG.
a) is a data way system (broadcast type/
When sending data via memory access method),
Writes the transmission data in bytes to the transmission area (3b) of the 2-port memory (3a) on the station (ffi)
In addition, the station (3) of the dataway cloud system transmits the data in the transmission area (3b) of the 2-port memory (3a) from the modem (3c) (processing in Figure 3, ■).
Figure, ■Processing).

Next, the receiving station (3) writes the received data sent from the transmitting station (3) into the receiving area (3b1) of the 2-port memory (3a1) on the station (processing in Figure 3, ■). , and the reception-side digital control device (1b) reads the received data from the reception area (3b, ) of the two-port memory (3a1) on the station (processing (2) in FIG. 3).

In addition, the host computer (2) sends data used for monitoring the plant (4) to the digital control device (Ia) via the station (3) using the dataway system.
(lb) to (1n) periodically based on the above communication process.

The processing operation of writing the above transmission data to the 2-port memory transmission area (3b) of station (3), h and the above 2
The data in the port memory transmission area (3b) is sent to the modem (3
Since the process of transmitting data from c) is performed asynchronously, while the digital control device (la) is loading the transmission data into the 2-port memory/transmission area (3b) on the station, the station (3) Data in the memory/transmission area (3b) may be transmitted.

In other words, when data is written to the port memory in byte format, a periodic data transfer cycle occurs before the data from the previous transmission cycle is completely rewritten to the data from the current transmission cycle, and the port memory contents are updated with the data from the previous transmission. Data may also be left unwritten and transmitted by the modem.

Therefore, in order to guarantee the same periodicity of this data, a conversational (message type) communication procedure is used, and a check is made to see if all received l-block data have the same periodicity. To check, the highest bit or lowest bit of each byte in the transmission data consisting of multiple bytes is set as a check bit, and the above bits are changed from 0 to 1 → every time transmission processing is periodically performed on the transmitting side. 0
→..., and the receiving side reads and examines the check bits of all data in one received block from the data in each byte structure, and uses a method to check whether the check bits of all data are the same. I've been doing it.

[The interlayer point that the invention attempts to solve]

Conventional data transfer devices are configured as described above, so if a conversational data communication procedure is used, periodic communication processing becomes difficult, the software configuration on the controller side becomes complicated, and checking bits are required. The method to set up is
All of the transmitted data must be converted, and when there is a large amount of transmitted data, there is a problem in that it places a heavy load on the CPU.

This invention was made to solve the above problems, and in periodic communication processing, the received one
It is an object of the present invention to provide a data transfer device capable of checking whether all data in a block has the same cycle without imposing a large load on a CPU.

[Means for solving problems]

In the data transfer device according to the present invention, for example, two
When writing word-structured transmission data to the port memory word by word, a flag is set in the flux area of the port memory to determine whether 2-word transmission data has been completely written, and a specific frame for each data transmission cycle is set before and after each 1-word data. a transmission controller section that writes the transmission data to the port memory by adding a 2-word transmission data, and a reception controller that reads the flag contents from the reception data read out from the port memory and compares the previous and previous frames of the 2-word transmission data in the data transfer cycle. A section is provided at each station of the data way system.

[Effect]

In this invention, in addition to completely writing the transmission data,
The flag set in the flag area of the port memory is reset, and the flag state is determined based on the transmission data read from the port memory and transferred to the reception controller section in each data transfer cycle. By comparing the frames, it is possible to determine whether the transmission data has the same cycle in the data transmission cycle.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure shows an example of the operation of the transmission controller section on the data way station side shown in FIG. 3 and the contents of the 2-port memory, and FIG. This shows the memory contents.

Here, the communication use of the data way system used for data communication is broadcast type (cyclic type).
Communication, memory access method (Communication is performed by write/read access to the 2-port memory on the station of the data way system. In other words, the data is transmitted by writing the data to be sent to the 2-port memory on the station, and the data is sent to the 2-port memory on the station. (receives data by reading data from the upper 2-port memory).

As shown in the flowchart of FIG. 1, the transmitting side controller section (3-1) (see FIG. 3) performs a transmission process, that is, before writing transmission data to the 2-port memory (3a). Set the 00H value in the flag area (3f) (Step 1-1), then (Step 1
In -2), different frames are added for each data transmission cycle before and after each transmission data in byte or word configuration. At this time, the previous and subsequent frames are equivalent. Then, each transmission data with frames added before and after is written in the transfer data area of the 2-port memo (3a). After all the transmission data is written in the transfer data area, the flag in the flag area (3'') is set to the 01H value (step ?-4).

As described above, the flag information and transmission data written in the two-port memory (3a) of the transmission controller (3-1) are periodically processed by the data way system as shown in the flowchart of FIG. 2-port memory (
3a) and the modem (3c) (3rd rI!
J) is written to the 2-port memory (3a1) of the reception controller unit (3-2) (see Figure 3) via the data transmission line (5) (step 2-1),
It is determined whether the flag information written to the 2-port memory (3at) is a 00H value as shown in (step 2-2), and if the flag is an OIH value instead of a 00)1 value, the transmission controller section (Step 2
In -3), it is determined whether or not the frames before and after the 1-broke transmission data, each having a predetermined number of bytes or words, are different. (Stella 7' 2-3) If it is determined that the preceding and following frames are not different, it is determined that the received one block transmission data are all of the same cycle.

However, in (step 2-2), if it is determined that the fteg has a value of 00 or 1, the control device transfers the received data in units of bytes or words to the 2-port memory (3-1) of the transmission controller section (3-1). 3a), the data transfer cycle is delayed, and it is determined that the data transfer was performed while the transmission data was being written incompletely. Therefore, it is determined whether the received l block data is mixed with transmission data in the previous data transmission cycle (step 2-5), and (step 2-3).
) in ! If it is determined that the preceding and following frames of the block received data are different, it is naturally determined that the received data includes data with different data transmission cycles (step 2-5).

This data transfer procedure also applies when communicating data consisting of multiple bytes (for example, 4 bytes for real number data) and when these multiple bytes are required to be continuous. Is possible.

〔Effect of the invention〕

As described above, according to the present invention, by adding a frame and a flag to communication data, one block of data to be A@ can be processed at the same cycle without placing a large load on the CPU on the controller side in periodic communication processing. Gender is 1
There is an effect that can be quickly confirmed at once in Brotsuku de Itta's funeral position.

[Brief explanation of the drawing]

1 and 2 are operational flowcharts showing the implementation of a data transfer method in an embodiment of the present invention, FIG. 3 is a configuration diagram of a data transfer device, and FIG. 4 is a diagram of a digital control system using a data way system. FIG. (1a) to (In) are control devices, (3) is a station, (3-1) is a transmission controller section, (3-2) is a reception controller section, (3a) and (3al') are 2-port memories, (5) is a data transmission path. Agent Masuo Oiwa Figure 1 Figure 4 Figure 5 De'-74 LvF Figure 2

Claims (1)

[Claims] A dataway system is constructed in which a control device for controlling and monitoring the plant is connected via a data transmission path through a data transmission/reception station provided in each control device, and data is exchanged periodically between each control device. Data exchange is performed by periodically accessing the port memory in each station.
In a data transfer device using a cyclic communication memory access method in which read data is written to another control device via a data transmission path, a predetermined value is set to the flag area of the port memory when transmitting data configured in units of multiple bits is written. , adds a flag to the transmitted data whose value is reset when data writing is completed, and adds specific frame information that differs for each control data transmission cycle from the control device before and after each multi-bit unit data and writes it to the port memory. Each station is equipped with a transmission controller section and a reception controller section that determines flag information from transmission data read by periodic port memory access, and compares frames before and after the transmission data to determine whether the transmission data has the same periodicity. A data transfer device comprising: