JPS61170859A - Computer connecting system - Google Patents

Abstract

PURPOSE:To prevent the load accompanied with connection between computers from being applied to operation processors of computers by providing a transmission controller which is operated asynchronously with the operation processor independently for the purpose of data exchange between computers. CONSTITUTION:If data contents in a transmission data storage device 112 are changed as the result of the processing in a computer 1, an operation processor 121 accesses a transmission controller 113 through a bus controller 130 and writes the instruction of data transmission from a designated address of the storage device 112. In accordance with this write, data is written successively in a data transmission device 111 and is transmitted. Since a signal line group 1A for data transmission control is separated completely from a signal line group 1B for operation processing control, the data transmission processing at this time is performed asynchronously with the operation of the operation processor 121 and completely independently of and in parallel with this operation and has no influences upon the load of the operation processor 121 at all.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a computer coupling method in a multiplexed computer system, and is particularly suitable for a multiplexed computer system using computers with limited processing capabilities such as microcomputers. Concerning the connection method of six total calculators.

[Background of the invention]

In systems using computers, a multiplexed computer system is often constructed by combining multiple computers to increase reliability.

By the way, in such a multiplexed computer system, if an abnormality that occurs in each multiplexed computer spreads to other computers, the benefits of multiplexing cannot be maintained. should be electrically as sparse as possible (it is necessary).

On the other hand, the benefits of multiplexing cannot be obtained unless information such as control status information is sufficiently exchanged between multiplexed computers. In order to maintain a loose electrical connection, a data transmission function with considerably large transmission capacity is required between each computer.

By the way, in such a conventional multiplexed computer system, the data transmission process for data exchange necessary for connection between the computers mentioned above is also performed by the arithmetic processing unit of each computer. Ta.

However, as a result of this, in conventional multi-electronic computer systems, when using a total of The processing power required for data exchange in the computer will take up a large amount of the processing power of the computer, resulting in a lack of processing power necessary to control the control target, which is originally required. The disadvantage was that it was not possible to maintain

[Purpose of the invention]

An object of the present invention is to eliminate the drawbacks of the prior art described above, and even when the physical connections between computers are kept relatively sparse so that the merits of multiplexing can be fully obtained, the original processing of computers An object of the present invention is to provide a computer coupling method that allows sufficient capacity to be used for controlling necessary control objects and easily maintains high reliability.

[Summary of the invention]

In order to achieve the above object, the present invention separates a signal line for connection between computers from a signal line that connects a computer's arithmetic processing unit and storage device, and separates a signal line for connection between computers, and separates a signal line for data exchange between each computer. is characterized in that it includes a transmission control device that operates asynchronously and independently of the arithmetic processing device, thereby eliminating the burden on the arithmetic processing device of the computer due to connection of the computers.

[Examples of actual rights to inventions]

Hereinafter, the computer coupling method according to the present invention will be explained in detail with reference to illustrated embodiments.

Figure 1 shows an example in which the present invention is applied to a redundant computer system. In the figure, 1 and 2 are computers with the same hardware configuration, and 3 is a data transmission line which transmits necessary data between the two computers 1 and 2 and functions to connect them functionally.

111 and 211 are data transmission devices, and the two computers 1
．． It functions to control data exchange between the two.

Note that these data transmission devices 111 and 211 are connected by a data transmission line 3, and are provided with an interface that maintains electrical isolation from each other.

Reference numerals 112 and 212 are transmission data storage devices, which serve to hold data that is transmitted and received via the data transmission devices 111 and 211 and to be exchanged between the two computers 1 and 2.

113°, 213 is a transmission control device, and data transmission device 1
11, 211 and transmission data storage devices 112, 212
It functions to control the exchange of data directly between the parties.

114, 115, 116 and 214.215, 2
Reference numerals 16 denote an address bus signal line, a data bus signal line, and a control signal line, which are connected to data transmission devices 111 and 2, respectively.
11, the transmission data storage devices 112, 212, and the transmission control devices 113, 213 thereto.

121 and 221 are arithmetic processing units, which form the center of arithmetic processing in each computer 1 and 2.
Reference numeral 22 denotes a storage device which functions to store control programs and control data necessary for the original operation of the computer.

Reference numerals 123 and 223 are input/output control devices that function to exchange data with external devices.

1.24, 125, 126 and 224, 225
, 226 are an address bus signal line, a data bus signal line, and a control signal line, respectively, and the arithmetic processing units t 121 , 22
1, storage devices 122, 222, and input/output control devices 123, 223 thereto.

130 and 230 are bus control devices, and each signal line 114 to
Between 116 and 124-126 or each signal line 214-21
6 and 224-226. Note that as a result, each arithmetic processing unit 121.
221 is bus system @130. or the respective data transmission devices 111 , 211 , via 230
It is possible to access any of the transmission data storage devices 112 , 212 and the transmission control devices 113 , 213 , and therefore, these data transmission devices 1.11 , 211 and transmission control devices 113 , 213 are connected to each arithmetic device 121 , 22 .
Although they are configured to operate asynchronously and independently from each processing unit t 121
, 221 is possible.

And, at this time, the bus control wholesale device 130, 23
Each arithmetic processing unit f 121 , 22
Access to the transmission control devices 113 and 213 by 1 is as follows:
The half-cycle period of the operating clock of these transmission control devices is used, and the operation is carried out without interruption, and during this period,
Each arithmetic processing unit is configured to stop operating until access is completed.

Next, the operation of the path control devices 130 and 230 will be explained in more detail.

These path control devices 130 and 230 include respective transmission control devices 113 and 213 and arithmetic processing device t121.
．． Signal lines $lA, 2A (address bus signal lines 114, 21
4, data bus signal lines 115, 215, and control signal lines 116, 216), that is, data transmission lit Nl, 211, which is controlled by signal line groups IA and 2A. and (XX
a data storage device 112, 212 access from 113° 213 and @calculation processing 1f
Access conflicts from fi 121 and fi 221 are controlled as follows.

(1) Each winding fi (
111 to 113, 211 to 213), the signal line groups IA and 2A are not accessed.
The right to use is given to the transmission control devices 113 and 213.

(2) When access is made to each device [(111-113, 211-213) connected from the arithmetic processing units 121 and 221 to the data transmission control signal line groups IA and 2AK, the arithmetic processing 1trll is ignored. Message - return line group IB, 2B (address bus signal line 124
゜224, data bus signal lines 125, 225, and control signal lines 126, 226) are connected to data transmission control panel signal lines $IA, 2A, and the right to use these signal line groups IA, 2A is established. is the arithmetic processing unit 121,
221.

As a result, when the arithmetic processing units 121 and 221 are not accessing the devices connected to the data transmission control signal line groups IA and 2A.

Each signal line group IA, 2A and IB, 2B is the path control device 1
30 and 230, the transmission control units 113 and 213 and the arithmetic processing units 121 and 221 are completely independent and can operate in parallel. Therefore, data exchange between each computer is possible. The processing and the arithmetic processing within each computer have no influence on each other (they proceed).

Here, according to the time chart of FIG. 2, the path control device t
The right to use the data transmission control signal line groups IA and 2A by 130 and 230 will now be described in more detail.

In this embodiment, the transmission data storage devices 112, 212
Writing and reading of data in is configured to be performed within one cycle of the basic control clock 2ψ2 shown in FIG. Note that this -period is called one cycle. Also, a signal line group IA for data transmission control.

The right to use the signal line group IA for the two people is granted by the signal line occupancy signal ψ2. When the signal ψ2 is at level "1", the right to use the signal line group IA for the two people is granted to the transmission control devices 113 and 213, and the signal ψ2 is granted. When the level of is 0'', the signal line group IA is connected to the arithmetic processing units 121 and 221.

Grant usage rights to 2.

On the other hand, this signal ψ2 is generated by the access signal SEL from the arithmetic units 121 and 221 to the devices connected to the data transmission control signal line groups IA and 2A.

That is, when access is performed by the arithmetic processing units 121 and 221 and the signal SEL changes from level "1" to O', data transmission processing using the signal line groups IA and 2A by the transmission control units 113 and 213 is performed. Finished signal 2
At the beginning of the cycle of ψ2, the level of the signal ψ2 changes from 1'' to '
0'', and the processing units 121 and 221 are given the right to use the signal line groups IA and 2A.
This signal ψ2 is stored for only one cycle period after its level becomes 0'', and returns to level ``1'' at the beginning of the next cycle, whereupon the transmission control devices 113, 2
13 is given the right to use the signal line group Ik, 2A. Thereby, it is possible to guarantee the lowest data transmission rate when access between the transmission control devices 113, 213 and the arithmetic processing units 121, 221 is mirrored.

Furthermore, as a result, the arithmetic processing units 121 and 221 control the devices connected to the data transmission control signal line groups IA and 2A, including the transmission control devices 113 and 213, and the arithmetic and control sieve signal line groups IB and 2B. It can be accessed in exactly the same way as any device connected to the computer, and for this reason, the arithmetic processing unit!
121 and 221, the devices connected to the signal line groups IA and 2A can be considered to be allocated to the same address space as the devices connected to the signal line groups IB and 2B. An example of address space allocation at this time is shown in FIG.

Next, the data exchange operation between each computer will be explained. In this case, it is considered sufficient to explain data transmission from one of the computers to the other computer, so data transmission from computer 1 to computer 2 will be explained here as an example.

Suppose now that the data content in the transmission data storage device 112 has changed as a result of processing within the computer 1. Then, the arithmetic processing unit 121 accesses the transmission control device 113 via the path control device 130 and writes therein a command to send data from the specified address in the transmission data storage device 112. Along with this, the transmission control device 113 reads the data in the transmission data storage device 112 from the designated address and sequentially writes it into the data transmission device 111, thereby causing the data to be sent.

Since the data transmission control signal line group IA is separated from the arithmetic processing control signal line group IB, the data transmission processing at this time is asynchronous with the operation of the arithmetic processing unit 121.
The processing is performed completely independently and in parallel, so the load on the processing unit 121 is not affected at all.

On the other hand, in response to the data sending process from the computer 1 performed in this way, the computer 2 performs a process for receiving this data.
Is 1 the transmission control value? 11ffi213 and the transmission data storage vc? The received data storage address within t212 is specified. Then, when data from computer 1 is received, data transmission group 'f12
11 sends a data reception control signal to the transmission control al*rt213, which causes the transmission control at213 to read the data received from the data transmission device 211 and store it at the specified address of the transmission data storage rumor #212. Store and end the reception process.

This data reception process is also performed by the data transmission control signal line group 2A.
Since this is separated from the arithmetic processing control signal line group 2B, it is performed completely independently and in parallel, asynchronously with the operation of the arithmetic processing unit 221, and does not affect the load on the arithmetic processing unit 221 at all.

By the way, in this embodiment, the processing necessary for the above-mentioned data exchange is performed by starting the corresponding processing program by an interrupt for both data transmission and data reception.
This is accomplished without the application program being aware of data transmission.

Also, at this time, the transmission data storage devices 1ii112, 2
The 12 address spaces are divided so that the storage areas for transmission data are blocks of the same size, so that the data storage areas are checked when transmitting and receiving data.

Therefore, in this embodiment, the operation at the time of data transmission is as shown in the flowchart of FIG. 4, and the operation at the time of reception is as shown in the flowchart of FIG. Further, an example of the format of transmission data is shown in FIG. 6.

Next, in the present invention, in any of the multiplexed computers, if data is written to a predetermined memory in that computer, for example, the transmission data storage device f 112 , 212, the data will be stored in the other computer. automatically transferred to the specified memory. Therefore, in this invention, the contents of the memory of another computer are copied to a predetermined area of the address space of the computer i.
Each computer can be viewed as virtually sharing a portion of the address space of other computers.

Therefore, in the present invention, by making the storage addresses for sending and receiving data the same in all multiplexed computers, the programs in each computer can read the memory contents of other computers by referring to the same address. The same image can always be maintained between multiplexed computers in the same address space.

An example of address allocation for such a virtually shared address space is shown in FIG.

〔Effect of the invention〕

As explained above, according to the present invention, there is no need to burden the arithmetic processing units of the computers with an increase in the load for data exchange processing between computers, which is necessary when multiplexing computers. Except for the drawbacks, sufficient multiplexing can always be achieved without considering the capacity of the arithmetic processing unit.

Further, as a result, according to the present invention, reliability can be sufficiently improved by multiplexing even in a case where a microcomputer or the like with limited processing capacity is used.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing an example of the total Ii iso coupling method according to the present invention, Figure 2 is a time chart for explaining its operation, and Figure NK3 is an example of address space allocation in the present invention. 4 and 5 are flowcharts for explaining the operation, FIG. 6 is an explanatory diagram showing an example of the format of transmission data, and FIG. 7 is an illustration of address assignment to obtain a shared address space. It is an explanatory view showing one example. 1.2... Computer, 3... Data transmission-1111゜211... Data transmission device, 11
2, 212...transmission data storage device, 113
, 213...Transmission I! lll-apparatus, 114
/~116, 124~-126, 214~
216, 224-226...Signal line, 121
, 221... Arithmetic processing unit, 122°222
...Storage device, 123, 223...
Input/output control device, 130, 230--Bus-based RSJ device, IA, IB. 2A, 2B...Signal line group. [−111−−−−−−−−−−−−−−−−−−−−
--'' No. 21 Figure 3 Figure 6

Claims (1)

[Claims] 1. In a multi-system system in which a plurality of computers are connected, a control signal for connection between computers is transmitted from a control signal line that connects an arithmetic processing unit and a storage device in each computer. A transmission control device that operates independently and asynchronously from the arithmetic processing unit is provided to separate the lines and control the separated control signal lines, and this transmission control device exchanges data necessary for connection between computers. A computer coupling method characterized by being configured to perform processing. 2. In claim 1, the data exchange processing by the transmission control device sets the sending side address and the receiving side address to be the same, and exchanges information between computers among the contents of data in the storage device. A computer coupling method characterized in that the processing is performed each time data to be exchanged between the computers changes.