JPS6261059U - - Google Patents

Info

Publication number
JPS6261059U
JPS6261059U JP1986130382U JP13038286U JPS6261059U JP S6261059 U JPS6261059 U JP S6261059U JP 1986130382 U JP1986130382 U JP 1986130382U JP 13038286 U JP13038286 U JP 13038286U JP S6261059 U JPS6261059 U JP S6261059U
Authority
JP
Japan
Prior art keywords
input signal
pulse
transition
response
window
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1986130382U
Other languages
English (en)
Japanese (ja)
Other versions
JPS6232380Y2 (https=
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS6261059U publication Critical patent/JPS6261059U/ja
Application granted granted Critical
Publication of JPS6232380Y2 publication Critical patent/JPS6232380Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/38Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40Transmitting circuits; Receiving circuits
    • H04L25/49Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4904Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Ultra Sonic Daignosis Equipment (AREA)
JP1986130382U 1976-09-22 1986-08-28 Expired JPS6232380Y2 (https=)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/725,210 US4065796A (en) 1976-09-22 1976-09-22 Digital data decoder

Publications (2)

Publication Number Publication Date
JPS6261059U true JPS6261059U (https=) 1987-04-15
JPS6232380Y2 JPS6232380Y2 (https=) 1987-08-19

Family

ID=24913605

Family Applications (2)

Application Number Title Priority Date Filing Date
JP1977133013U Expired JPS6038967Y2 (ja) 1976-09-22 1977-10-03 超音波cwドプラシステム
JP1986130382U Expired JPS6232380Y2 (https=) 1976-09-22 1986-08-28

Family Applications Before (1)

Application Number Title Priority Date Filing Date
JP1977133013U Expired JPS6038967Y2 (ja) 1976-09-22 1977-10-03 超音波cwドプラシステム

Country Status (3)

Country Link
US (1) US4065796A (https=)
JP (2) JPS6038967Y2 (https=)
DE (1) DE2741316A1 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0023783A1 (en) * 1979-07-19 1981-02-11 Exxon Research And Engineering Company Data recovery circuit
US4338569A (en) * 1980-03-11 1982-07-06 Control Data Corporation Delay lock loop
US4459623A (en) * 1982-01-18 1984-07-10 Mds Qantel Corporation Method and apparatus for recovering NRZ information from MFM data
US4635280A (en) * 1985-05-28 1987-01-06 Harris Corporation Bit synchronizer for decoding data
US4726022A (en) * 1986-04-30 1988-02-16 International Business Machines Corporation Method and apparatus for stressing the data window in magnetic storage devices
US4868514A (en) * 1987-11-17 1989-09-19 International Business Machines Corporation Apparatus and method for digital compensation of oscillator drift

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3755798A (en) * 1972-02-29 1973-08-28 Honeywell Inf Systems Data recovery system having tracking sampling window
US3979771A (en) * 1975-03-19 1976-09-07 Xerox Corporation Magnetic tape phase encoded data read circuit

Also Published As

Publication number Publication date
DE2741316A1 (de) 1978-03-23
JPS6038967Y2 (ja) 1985-11-21
US4065796A (en) 1977-12-27
JPS6232380Y2 (https=) 1987-08-19
JPS5458889U (https=) 1979-04-23

Similar Documents

Publication Publication Date Title
ES450960A1 (es) Perfeccionamientos en circuitos de recuperacion de tempori- zacion para datos digitales.
KR890004497A (ko) 바이페이즈 신호의 복조방법
JPS6261059U (https=)
US3506923A (en) Binary data detection system
JPS57203213A (en) Clock signal reproducing circuit
KR890007564A (ko) 라인 동기화 회로
JPS6113312B2 (https=)
JPS5252616A (en) Synchronous signal generating circuit in data reading device
JPS60125021A (ja) 位相制御ル−プの疑似同期検出装置
JPS6019686B2 (ja) Pwm変調方式
SU570087A1 (ru) Устройство дл воспроизведени магнитной сигналограммы
JPS5257760A (en) Phase lock loop circuit
SU665319A1 (ru) Способ демодул ции воспроизведенного фазомодулированного сигнала и устройство дл его осуществлени
JPS6040149U (ja) ビツト同期pll用位相比較器
SU970445A1 (ru) Устройство выделени синхроимпульсов
SU585624A1 (ru) Устройство дл приема -краткого фазоманипулированного сигнала
JPS5460814A (en) Timing circuit of dipulse system
JP2671371B2 (ja) 位相比較器
SU864512A1 (ru) Регенератор импульсов
KR100257870B1 (ko) 위상제어장치
JPS5479017A (en) Sector clock generating system
JPH0465470B2 (https=)
JPS5528567A (en) Mfm demodulator circuit
JPS6372938U (https=)
JPS5593528A (en) Data demodulation unit