KR890004497A - 바이페이즈 신호의 복조방법 - Google Patents

바이페이즈 신호의 복조방법 Download PDF

Info

Publication number
KR890004497A
KR890004497A KR1019880010848A KR880010848A KR890004497A KR 890004497 A KR890004497 A KR 890004497A KR 1019880010848 A KR1019880010848 A KR 1019880010848A KR 880010848 A KR880010848 A KR 880010848A KR 890004497 A KR890004497 A KR 890004497A
Authority
KR
South Korea
Prior art keywords
time interval
value
clock frequency
biphasic
clock
Prior art date
Application number
KR1019880010848A
Other languages
English (en)
Other versions
KR0135087B1 (ko
Inventor
퓔트너 프리드리히
Original Assignee
로베르트 아인젤
도이체 톰손-브란트 게엠베하
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 로베르트 아인젤, 도이체 톰손-브란트 게엠베하 filed Critical 로베르트 아인젤
Publication of KR890004497A publication Critical patent/KR890004497A/ko
Application granted granted Critical
Publication of KR0135087B1 publication Critical patent/KR0135087B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K9/00—Demodulating pulses which have been modulated with a continuously-variable signal
    • H03K9/04—Demodulating pulses which have been modulated with a continuously-variable signal of position-modulated pulses
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H20/00—Arrangements for broadcast or for distribution combined with broadcast
    • H04H20/28—Arrangements for simultaneous broadcast of plural pieces of information
    • H04H20/33—Arrangements for simultaneous broadcast of plural pieces of information by plural channels
    • H04H20/34—Arrangements for simultaneous broadcast of plural pieces of information by plural channels using an out-of-band subcarrier signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M5/00—Conversion of the form of the representation of individual digits
    • H03M5/02—Conversion to or from representation by pulses
    • H03M5/04—Conversion to or from representation by pulses the pulses having two levels
    • H03M5/06—Code representation, e.g. transition, for a given bit cell depending only on the information in that bit cell
    • H03M5/12—Biphase level code, e.g. split phase code, Manchester code; Biphase space or mark code, e.g. double frequency code
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H40/00—Arrangements specially adapted for receiving broadcast information
    • H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H2201/00—Aspects of broadcast communication
    • H04H2201/10—Aspects of broadcast communication characterised by the type of broadcast system
    • H04H2201/13—Aspects of broadcast communication characterised by the type of broadcast system radio data system/radio broadcast data system [RDS/RBDS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stereo-Broadcasting Methods (AREA)
  • Burglar Alarm Systems (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Measurement And Recording Of Electrical Phenomena And Electrical Characteristics Of The Living Body (AREA)
  • Amplifiers (AREA)
  • Measurement Of Velocity Or Position Using Acoustic Or Ultrasonic Waves (AREA)
  • Television Systems (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

내용 없음.

Description

바이페이즈 신호의 복조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 바이페이즈신호를 복조하기 위한 본 발명에 의한 방법을 실시하기 위한 장치의 블록회로도.
제2도는 제1도 회로의 각 부의 신호파형을 나타내는 펄스 파형도.
제3도는 본 발명에 의한 방법을 설명하기위한 플로우챠트.

Claims (1)

  1. 도래하는 바이페이즈신호의 각각2개의 순차로 연속하는 레벨도약 사이의 시간간격(T)을 검출하고, 클록발생기를 설치하여 이 클록발생기에 의해 바이페이즈신호의 비트레이트에 거의 상당하는클록주파수를 형성하거나 도출가능하게 하고, 이 클록주파수의 클록지속시간(1/B)을 각각 2개의 레벨도약사이의 시간간격(T)과 비교하고, 클록주파수(B)에 의하여 제어되는 검출회로가, a) 직접 선행해서 2회순차 연속하는 시간간격(T)에 대하여 1/B의 1/4과 3/4사이의 값이 검출되는 경우나, 또는 b) 직접선행하는 시간간격(T)에 대하여 1/B의 3/4와 5/4사이의 값이 검출되는 경우에 바이페이즈신호의 논리값이 향상 검출하고, 논리값에 상응하는 신호를 송출하는 것을 특징으로 하는 2진부호화된 바이페이즈신호의 복조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019880010848A 1987-08-27 1988-08-26 바이페이즈 신호의 복조 방법 KR0135087B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19873728655 DE3728655A1 (de) 1987-08-27 1987-08-27 Verfahren und/oder einrichtung zum demodulieren eines biphasesignales
DEP3728655.2 1987-08-27

Publications (2)

Publication Number Publication Date
KR890004497A true KR890004497A (ko) 1989-04-22
KR0135087B1 KR0135087B1 (ko) 1998-04-25

Family

ID=6334644

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880010848A KR0135087B1 (ko) 1987-08-27 1988-08-26 바이페이즈 신호의 복조 방법

Country Status (10)

Country Link
US (1) US5001728A (ko)
EP (1) EP0304799B1 (ko)
JP (1) JPS6471326A (ko)
KR (1) KR0135087B1 (ko)
AT (1) ATE131974T1 (ko)
DE (2) DE3728655A1 (ko)
DK (1) DK478488A (ko)
FI (1) FI883954A (ko)
MY (1) MY103398A (ko)
NO (1) NO883832L (ko)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR910007815B1 (ko) * 1988-12-31 1991-10-02 삼성전자 주식회사 바이패이즈 엔코딩 데이터의 디코딩방법
US5025328A (en) * 1989-03-22 1991-06-18 Eastman Kodak Company Circuit for decoding binary information
DE4010798A1 (de) * 1990-04-04 1991-10-10 Bodenseewerk Geraetetech Demodulatorbaustein und damit aufgebaute signalverarbeitungsschaltung
US5185766A (en) * 1990-04-24 1993-02-09 Samsung Electronics Co., Ltd. Apparatus and method for decoding biphase-coded data
DE4024593A1 (de) * 1990-08-02 1992-03-05 Sgs Thomson Microelectronics Verfahren und vorrichtung zur demodulation eines biphasenmodulierten signals
EP0475447A3 (en) * 1990-09-14 1992-09-23 Fuji Photo Film Co Ltd Magnetically recordable photographic film, recording method and system therefor and camera-laboratory system
US5209019A (en) * 1990-09-27 1993-05-11 Tokai Kogyo Kabushiki Kaisha Seal structure for automobile doors
JP3006067B2 (ja) * 1990-10-19 2000-02-07 富士写真フイルム株式会社 撮影用写真フィルム処理方法
NL9100065A (nl) * 1991-01-16 1992-08-17 Philips Nv Werkwijze en inrichting voor het opwekken van een kloksignaal uit een biphase gemoduleerd digitaal signaal.
US5200980A (en) * 1991-08-09 1993-04-06 Memorex Telex N.V. Digital bi phase data recovery system
WO1993017509A1 (de) * 1992-02-19 1993-09-02 Werner Henze Demodulator für radio-daten-signale
DE4443790C1 (de) * 1994-12-08 1996-04-18 Sgs Thomson Microelectronics Verfahren und Vorrichtung zur Phasensynchronisation mit einem RDS-Signal
DE4444601C1 (de) * 1994-12-14 1996-07-11 Sgs Thomson Microelectronics Verfahren und Vorrichtung zur empfängerseitigen RDS-Phasensynchronisation
DE4444602C1 (de) * 1994-12-14 1996-09-19 Sgs Thomson Microelectronics Verfahren zur Bewertung eines RDS-Signals
JP3108364B2 (ja) * 1996-04-22 2000-11-13 三洋電機株式会社 データ復調装置
JPH09289465A (ja) * 1996-04-22 1997-11-04 Sanyo Electric Co Ltd Ｒｄｓ信号識別装置
JP3459339B2 (ja) * 1997-07-03 2003-10-20 株式会社リコー Ｐｐｍ方式を採用する変調回路、復調回路及び変復調回路システム
EP1091484B1 (en) * 1999-10-04 2006-04-05 Motorola Semiconducteurs S.A. Sample and hold demodulator circuit
DE10112638A1 (de) * 2001-03-16 2002-09-26 Harman Becker Automotive Sys Verfahren und Schaltungsanordnung zur Erzeugung des RDS-Bittaktes
US7760835B2 (en) * 2002-10-02 2010-07-20 Battelle Memorial Institute Wireless communications devices, methods of processing a wireless communication signal, wireless communication synchronization methods and a radio frequency identification device communication method
US7072431B2 (en) * 2002-10-30 2006-07-04 Visteon Global Technologies, Inc. Clock timing recovery using arbitrary sampling frequency
US7310390B2 (en) * 2003-10-30 2007-12-18 Apple Inc. Decoding coded data streams
US9281816B2 (en) * 2012-01-31 2016-03-08 Rambus Inc. Modulated on-die termination

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3243580A (en) * 1960-12-06 1966-03-29 Sperry Rand Corp Phase modulation reading system
US3491349A (en) * 1966-10-27 1970-01-20 Sperry Rand Corp Phase modulation data recovery system for indicating whether consecutive data signals are the same or different
US3903474A (en) * 1974-07-29 1975-09-02 Bell Telephone Labor Inc Periodic pulse check circuit
US3982195A (en) * 1975-05-29 1976-09-21 Teletype Corporation Method and apparatus for decoding diphase signals
US4040100A (en) * 1975-09-25 1977-08-02 Adams-Smith Incorporated Digital video tape frame code readout system
JPS52112311A (en) * 1976-03-18 1977-09-20 Sony Corp Demodulating circuit
US4027267A (en) * 1976-06-01 1977-05-31 International Business Machines Corporation Method of decoding data content of F2F and phase shift encoded data streams
US4167760A (en) * 1978-03-28 1979-09-11 Ampex Corporation Bi-phase decoder apparatus and method
US4344039A (en) * 1979-03-13 1982-08-10 Sanyo Electric Co., Ltd. Demodulating circuit for self-clocking-information
US4320525A (en) * 1979-10-29 1982-03-16 Burroughs Corporation Self synchronizing clock derivation circuit for double frequency encoded digital data
NL8101825A (nl) * 1981-04-14 1982-11-01 Philips Nv Inrichting voor het afvragen en korrigeren van een serieel data-signaal.
US4626670A (en) * 1983-06-16 1986-12-02 Xico, Inc. Method and system for decoding time-varying, two-frequency, coherent-phase data
US4608702A (en) * 1984-12-21 1986-08-26 Advanced Micro Devices, Inc. Method for digital clock recovery from Manchester-encoded signals
US4606052A (en) * 1984-12-21 1986-08-12 Advanced Micro Devices, Inc. Method for detection of line activity for Manchester-encoded signals
DE3629227A1 (de) * 1985-08-29 1987-03-05 Victor Company Of Japan Demodulationsschaltung zur demodulation eines zweiphasig modulierten signals

Also Published As

Publication number Publication date
NO883832D0 (no) 1988-08-26
NO883832L (no) 1989-02-28
DK478488A (da) 1989-02-28
US5001728A (en) 1991-03-19
ATE131974T1 (de) 1996-01-15
JPS6471326A (en) 1989-03-16
DE3854805D1 (de) 1996-02-01
DE3728655A1 (de) 1989-03-09
FI883954A (fi) 1989-02-28
EP0304799A2 (de) 1989-03-01
MY103398A (en) 1993-06-30
EP0304799B1 (de) 1995-12-20
FI883954A0 (fi) 1988-08-26
EP0304799A3 (en) 1990-06-20
KR0135087B1 (ko) 1998-04-25
DK478488D0 (da) 1988-08-26

Similar Documents

Publication Publication Date Title
KR890004497A (ko) 바이페이즈 신호의 복조방법
GB1504449A (en) Tion
DE69128912D1 (de) Differenzieller Empfänger zur Feststellung und Korrektur von umgekehrter Polarität
KR840005635A (ko) 디지탈 변조신호 판독장치에 있어서의 클록 발생용 pll의 록 검출 방식
KR880009473A (ko) 주파수 변조회로
KR920702097A (ko) 2진 데이타를 변조하는 방법
YU160584A (en) Signal generator for signals with inclined edges
JPS5764170A (en) Zero cross detecting circuit
JPS52124849A (en) Timing signal detection circuit
KR910007235A (ko) 디지틀 주파수 편이 키잉 복조회로
JPS5225610A (en) Dropout compensation circuit
JPS5468610A (en) Recording and reproducing system of address signal in disc- shaped recording medium having spiral recording track
JPS5768943A (en) Bipolar pulse error discrimination circuit
JPS53102008A (en) Demodulation circuit
JPS5377455A (en) Pcm telemeter demodulation system
JPS57154613A (en) Digital modulating system
JPS57141143A (en) Intercode interference detecting circuit
JPS6485518A (en) Bus line service interruption detector
JPS57201358A (en) Start-stop synchronous receiver
JPS542647A (en) Data demodulation system
DE69023714D1 (de) Verfahren für Wellenformdatenkorrektur bei der Modulation von digitalen Signalen und Basisband-Signalgenerator, der die durch dieses Verfahren erzeugten Daten benutzt.
KR880002378A (ko) Mac(다중 아날로그성분)시스템용 영상신호의 스크램블링 방법
JPS5580868A (en) Address signal generator circuit
JPS5283214A (en) Data demodulation system
JPS5433629A (en) Information reproducing lircuit

Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19880826

PG1501 Laying open of application
A201 Request for examination
PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 19930824

Comment text: Request for Examination of Application

Patent event code: PA02011R01I

Patent event date: 19880826

Comment text: Patent Application

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 19970328

Patent event code: PE09021S01D

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 19971210

GRNT Written decision to grant
PR0701 Registration of establishment

Comment text: Registration of Establishment

Patent event date: 19980109

Patent event code: PR07011E01D

PR1002 Payment of registration fee

Payment date: 19980109

End annual number: 3

Start annual number: 1

PG1601 Publication of registration
PR1001 Payment of annual fee

Payment date: 20001226

Start annual number: 4

End annual number: 4

PR1001 Payment of annual fee

Payment date: 20011227

Start annual number: 5

End annual number: 5

FPAY Annual fee payment

Payment date: 20021224

Year of fee payment: 6

PR1001 Payment of annual fee

Payment date: 20021224

Start annual number: 6

End annual number: 6

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

Termination category: Default of registration fee

Termination date: 20041009