JPS62599B2 - - Google Patents
Info
- Publication number
- JPS62599B2 JPS62599B2 JP23347482A JP23347482A JPS62599B2 JP S62599 B2 JPS62599 B2 JP S62599B2 JP 23347482 A JP23347482 A JP 23347482A JP 23347482 A JP23347482 A JP 23347482A JP S62599 B2 JPS62599 B2 JP S62599B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- holes
- metal layer
- plating
- printed wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000007747 plating Methods 0.000 claims description 39
- 239000002184 metal Substances 0.000 claims description 26
- 229910052751 metal Inorganic materials 0.000 claims description 26
- 229910000679 solder Inorganic materials 0.000 claims description 22
- 238000000034 method Methods 0.000 claims description 21
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical group [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 18
- 238000004519 manufacturing process Methods 0.000 claims description 16
- 229910052759 nickel Inorganic materials 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 8
- 239000011248 coating agent Substances 0.000 claims description 5
- 238000000576 coating method Methods 0.000 claims description 5
- NLXLAEXVIDQMFP-UHFFFAOYSA-N Ammonia chloride Chemical compound [NH4+].[Cl-] NLXLAEXVIDQMFP-UHFFFAOYSA-N 0.000 claims description 4
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 4
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 4
- 238000009713 electroplating Methods 0.000 claims description 3
- 235000019270 ammonium chloride Nutrition 0.000 claims description 2
- QRUDEWIWKLJBPS-UHFFFAOYSA-N benzotriazole Chemical compound C1=CC=C2N[N][N]C2=C1 QRUDEWIWKLJBPS-UHFFFAOYSA-N 0.000 claims description 2
- 239000012964 benzotriazole Substances 0.000 claims description 2
- OOHAUGDGCWURIT-UHFFFAOYSA-N n,n-dipentylpentan-1-amine Chemical compound CCCCCN(CCCCC)CCCCC OOHAUGDGCWURIT-UHFFFAOYSA-N 0.000 claims description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 35
- 229910052802 copper Inorganic materials 0.000 description 27
- 239000010949 copper Substances 0.000 description 27
- 239000011889 copper foil Substances 0.000 description 7
- 229920005989 resin Polymers 0.000 description 5
- 239000011347 resin Substances 0.000 description 5
- 230000004907 flux Effects 0.000 description 4
- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- 238000011109 contamination Methods 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000007730 finishing process Methods 0.000 description 2
- RSWGJHLUYNHPMX-UHFFFAOYSA-N Abietic-Saeure Natural products C12CCC(C(C)C)=CC2=CCC2C1(C)CCCC2(C)C(O)=O RSWGJHLUYNHPMX-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- KHPCPRHQVVSZAH-HUOMCSJISA-N Rosin Natural products O(C/C=C/c1ccccc1)[C@H]1[C@H](O)[C@@H](O)[C@@H](O)[C@@H](CO)O1 KHPCPRHQVVSZAH-HUOMCSJISA-N 0.000 description 1
- BGTFCAQCKWKTRL-YDEUACAXSA-N chembl1095986 Chemical compound C1[C@@H](N)[C@@H](O)[C@H](C)O[C@H]1O[C@@H]([C@H]1C(N[C@H](C2=CC(O)=CC(O[C@@H]3[C@H]([C@@H](O)[C@H](O)[C@@H](CO)O3)O)=C2C=2C(O)=CC=C(C=2)[C@@H](NC(=O)[C@@H]2NC(=O)[C@@H]3C=4C=C(C(=C(O)C=4)C)OC=4C(O)=CC=C(C=4)[C@@H](N)C(=O)N[C@@H](C(=O)N3)[C@H](O)C=3C=CC(O4)=CC=3)C(=O)N1)C(O)=O)=O)C(C=C1)=CC=C1OC1=C(O[C@@H]3[C@H]([C@H](O)[C@@H](O)[C@H](CO[C@@H]5[C@H]([C@@H](O)[C@H](O)[C@@H](C)O5)O)O3)O[C@@H]3[C@H]([C@@H](O)[C@H](O)[C@@H](CO)O3)O[C@@H]3[C@H]([C@H](O)[C@@H](CO)O3)O)C4=CC2=C1 BGTFCAQCKWKTRL-YDEUACAXSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910000365 copper sulfate Inorganic materials 0.000 description 1
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- DITXJPASYXFQAS-UHFFFAOYSA-N nickel;sulfamic acid Chemical compound [Ni].NS(O)(=O)=O DITXJPASYXFQAS-UHFFFAOYSA-N 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- KHPCPRHQVVSZAH-UHFFFAOYSA-N trans-cinnamyl beta-D-glucopyranoside Natural products OC1C(O)C(O)C(CO)OC1OCC=CC1=CC=CC=C1 KHPCPRHQVVSZAH-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、高品質なスルーホールを有する印刷
配線板の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a printed wiring board having high quality through holes.
周知の如く、部品のピンを挿着すべきスルーホ
ールが銅金属のみからなる銅スルーホール印刷配
線板が用いられている。
As is well known, a copper through-hole printed wiring board is used in which the through-holes into which component pins are inserted are made only of copper metal.
かかる印刷配線板は、従来、主として次の２通
りの方法により製造されている。第１に、例えば
化学銅めつき及び電気銅めつき処理した両面銅張
積層板の貫通穴や回路パターン形成部にドライフ
イルムを被覆した後、このドライフイルムをマス
クとして化学銅めつき部分、電気銅めつき部分及
び銅箔部分をエツチングしてスルーホール、回路
パターンを形成し、しかる後前記ドライフイルム
を剥離し、更にソルダーレジスト膜をスルーホー
ルを除く全面に塗布することにより形成する方
法。第２に、例えば化学銅めつき及び電気銅めつ
き処理した両面銅張積層板の貫通穴に樹脂を埋め
込んで第１の樹脂層を形成し、更にこの第１の樹
脂層を含む貫通穴や回路パターン形成部に第２の
耐エツチング用樹脂層を形成した後、前述した第
１の印刷配線板の製造方法とほぼ同様のエツチン
グ工程を経て形成する方法。しかしながら、前述
した第１、第２の印刷配線板の製造方法によれ
ば、スルーホールを除く全面にソルダーレジスト
膜を形成する際、露出するスルーホールが酸化さ
れたり、あるいはレジストインクの飛散でそれら
の表面が汚染されるという欠点があつた。特に、
後者の製造方法の場合、スルーホールや回路パタ
ーンに直接樹脂層を形成するため、一層汚染が激
しかつた。したがつて、半田のりが悪く、部品実
装時の安定性が悪い。このようなことから、最終
仕上げ工程で脱錆処理や表面研摩処理をしなけれ
ばならなかつた。 Such printed wiring boards have conventionally been manufactured mainly by the following two methods. First, for example, after covering the through holes and circuit pattern forming areas of a double-sided copper-clad laminate that has been subjected to chemical copper plating and electrolytic copper plating, dry film is used as a mask to coat the chemically copper plated parts and the electrical A method of forming through holes and circuit patterns by etching copper plated parts and copper foil parts, then peeling off the dry film, and further applying a solder resist film to the entire surface except the through holes. Second, a first resin layer is formed by filling the through holes of a double-sided copper-clad laminate that has been subjected to chemical copper plating and electrolytic copper plating, for example, and then the through holes containing this first resin layer are filled with resin. A method of forming a second etching-resistant resin layer on a circuit pattern forming area, and then performing an etching process that is substantially the same as the first printed wiring board manufacturing method described above. However, according to the first and second printed wiring board manufacturing methods described above, when forming a solder resist film on the entire surface except for the through holes, the exposed through holes may be oxidized or the resist ink may be scattered. The disadvantage was that the surface was contaminated. especially,
In the case of the latter manufacturing method, the resin layer was formed directly on the through holes and circuit patterns, resulting in even more contamination. Therefore, solder paste is poor and stability during component mounting is poor. For this reason, it was necessary to perform rust removal treatment and surface polishing treatment in the final finishing process.
また、他の印刷配線板の製造方法として、以下
に述べる方法が知られている。即ち、化学銅めつ
きおよび電気銅めつき処理を施した両面銅張積層
板の貫通穴及び回路パターン形成部を除く全面に
逆パターンの耐めつき被膜を形成した後、この耐
めつき被膜をマスクとして半田金属めつき処理を
行つて半田金属層を形成し、しかる後この半田金
属層をマスクとして化学銅めつき層、電気銅めつ
き層及び銅箔をエツチングしてスルーホール、回
路パターンを形成し、更に前記半田金属層を除去
した後、スルーホールを除く全面にソルダーレジ
スト膜を塗布して銅スルーホール印刷配線板を製
造する。こうした製造方法によれば、選択めつき
でスルーホール、回路パターンを形成できるた
め、既述した第１、第２の製造方法では困難であ
つたランドレススルーホールを形成でき、高密度
な回路パターンを形成できるという利点を有す
る。しかしながら半田金属層を除去する工程が入
り、一工程増加するとともに、該半田金属層の除
去に際し多量のエツチング液を必要としコストが
大きくなる。また、ソルダーレジスト膜の塗布は
半田金属層を除去した後に行うため、露出するス
ルーホールが酸化されたり、あるいはその塗布時
にスルーホール、特にランド面が汚染されたりす
る。したがつて、最終仕上げで銅表面を脱錆処理
したり、表面研摩処理をしなければならなかつ
た。 Further, as another method for manufacturing printed wiring boards, the method described below is known. That is, after forming a reverse-pattern plating-resistant coating on the entire surface of a double-sided copper-clad laminate that has been subjected to chemical copper plating and electrolytic copper plating, excluding the through-holes and circuit pattern formation areas, this plating-resistant coating is applied. A solder metal layer is formed by performing a solder metal plating process as a mask, and then, using this solder metal layer as a mask, the chemical copper plating layer, electrolytic copper plating layer, and copper foil are etched to form through holes and circuit patterns. After the solder metal layer is formed and the solder metal layer is removed, a solder resist film is applied to the entire surface except for the through holes to manufacture a copper through hole printed wiring board. According to this manufacturing method, through holes and circuit patterns can be formed by selective plating, so landless through holes, which were difficult to form using the first and second manufacturing methods described above, can be formed, and high-density circuit patterns can be formed. It has the advantage that it can be formed. However, the step of removing the solder metal layer is added, which adds one step, and requires a large amount of etching solution to remove the solder metal layer, increasing costs. Furthermore, since the solder resist film is applied after the solder metal layer is removed, the exposed through holes may be oxidized, or the through holes, especially the land surfaces, may be contaminated during the application. Therefore, the final finish required the copper surface to be derusted or polished.
本発明は上記事情に鑑みてなされたもので、ス
ルーホールの酸化、汚染を阻止することにより脱
錆処理工程、表面研摩工程等を省略でき、高品質
なスルーホールを有する印刷配線板の製造方法を
提供するを目的とするものである。
The present invention has been made in view of the above circumstances, and is a method for manufacturing a printed wiring board having high-quality through holes, which can omit the rust removal process, surface polishing process, etc. by preventing oxidation and contamination of the through holes. The purpose is to provide
本発明は、表面及び貫通壁に金属層が形成され
た絶縁板のスルーホール形成品と回路パターン形
成部を除く全面に耐めつき被膜を形成し、しかる
後この耐めつき被膜をマスクとして前記金属層上
に電気めつき層及び前記金属層と異種の金属薄層
を順次形成し、更に前記耐めつき被膜の除去後、
前記金属薄層をマスクとして前記金属層を除去
し、スルーホールと回路パターンを形成し、次に
少なくともスルーホールを除く全面にソルダーレ
ジスト膜を形成し、次いでこのソルダーレジスト
膜をマスクとして前記金属薄層を除去することに
よつて、工程数の減少とスルーホールの高品質化
を図つた。
The present invention involves forming a plating-resistant film on the entire surface of an insulating plate with a metal layer formed on the surface and through-walls, excluding the through-hole formed product and the circuit pattern forming area, and then using the plating-resistant film as a mask to After sequentially forming an electroplating layer and a thin metal layer different from the metal layer on the metal layer, and removing the plating-resistant coating,
The metal layer is removed using the metal thin layer as a mask to form through holes and a circuit pattern. Next, a solder resist film is formed on the entire surface except for at least the through holes, and then the metal thin layer is removed using the solder resist film as a mask. By removing this layer, we were able to reduce the number of steps and improve the quality of the through holes.
以下、本発明の印刷配線板の製造方法を第１図
〜第８図を参照して説明する。
Hereinafter, the method for manufacturing a printed wiring board of the present invention will be explained with reference to FIGS. 1 to 8.
〔〕 まず、第１図に示す如く紙エポキシ材か
らなる絶縁板１の両面に銅箔２，２を貼着した
両面銅張積層板３を製作した後、この積層板３
に貫通穴４……を穿設した（第２図図示）。つ
づいて、無電解銅めつき（シツプレー社
（製）；商品名CP−78）を用い、前記銅箔２，
２の表面及び貫通穴４……の側壁に厚さ２〜３
μｍの無電解めつき層５を形成した（第３図図
示）。次いで、後記スルーホールのランド及び
回路パターンに対応する部分を除く無電解銅め
つき層５上に、耐めつき被膜としての感光性ド
ライフイルム（デユポン社製；商品名リストン
1015）６を被覆した（第４図図示）。[] First, as shown in FIG. 1, a double-sided copper-clad laminate 3 is manufactured by pasting copper foils 2, 2 on both sides of an insulating plate 1 made of paper epoxy material, and then this laminate 3
A through hole 4 was bored in the hole (as shown in Figure 2). Next, the copper foil 2,
Thickness 2 to 3 on the surface of 2 and the side wall of through hole 4...
An electroless plating layer 5 having a thickness of .mu.m was formed (as shown in FIG. 3). Next, a photosensitive dry film (manufactured by DuPont; trade name: Riston) is applied as a plating-resistant coating on the electroless copper plating layer 5 excluding the portions corresponding to the through-hole lands and circuit patterns described later.
1015) 6 was coated (as shown in Figure 4).
〔〕 次に、前記積層板３を硫酸銅めつき浴中
で60分間電気めつき処理を行つた露出する無電
解銅めつき層５上に厚さ25〜30μｍの電気銅め
つき層７を形成した後、、更にスルフアミン酸
ニツケルめつき浴中で３分間電気めつき処理を
行つて厚さ１〜２μｍの電気ニツケルメツキ層
８を形成した（第５図図示）。つづいて、前記
ドライフイルム６を溶剤により剥離した。次い
で、前記電気ニツケルめつき層８をマスクとし
て露出する無電解銅めつき層５、銅箔２を、ニ
ツケルめつき層８をほとんど溶解しない銅エツ
チング液（米国SCC（社）製；商品名Ａ−
PROCESS）を用いて除去し、無電解銅めつき
層パターン５′、銅箔パターン２′を夫々形成し
て回路パターン９……及びランドレススルーホ
ール１０……を形成した（第６図図示）。[] Next, the laminate 3 was electroplated in a copper sulfate plating bath for 60 minutes, and an electrolytic copper plating layer 7 with a thickness of 25 to 30 μm was formed on the exposed electroless copper plating layer 5. After the formation, electroplating was further performed for 3 minutes in a nickel sulfamic acid plating bath to form an electroplated layer 8 having a thickness of 1 to 2 μm (as shown in Figure 5). Subsequently, the dry film 6 was peeled off using a solvent. Next, using the electric nickel plating layer 8 as a mask, the exposed electroless copper plating layer 5 and the copper foil 2 are etched with a copper etching solution (manufactured by SCC (USA); trade name A) that hardly dissolves the nickel plating layer 8. −
PROCESS) to form an electroless copper plating layer pattern 5' and a copper foil pattern 2', respectively, to form circuit patterns 9 and landless through holes 10 (as shown in FIG. 6).
〔〕 次に、スクリーン印刷法により部品を実
装するスルーホールーのランドに対応する部分
を除く全面にエポキシ樹脂インク（太陽インク
（社）製；商品名Ｓ−222）を塗布、乾燥してソ
ルダーレジスト膜１１を形成した（第７図図
示）。つづいて、金型プレス加工等により外形
加工を行つた。次いで、前記ソルダーレジスト
膜１１をマスクとして硫酸153.5ｇ／、過酸
化水素107.2ｇ／、トリアミルアミン10ｇ／
、塩化アンモニウム200ppm及びベンゾトリ
アゾール500ppmの組成からなるニツケルエツ
チング液を用い、露出する電気ニツケルめつき
層８のみを除去して電気銅めつき層７を露出さ
せた。この結果、ランド１２を有するスルーホ
ール１３……が形成された。ひきつづき、露出
する電気銅めつき層７が酸化される前に例えば
ロジンフラツクス（タムラ製作所（社）製；商
品名Ｂ−111Bフラツクス）を用いてフラツク
ス処理を施して所望の印刷配線板を製造した
（第８図図示）。[] Next, epoxy resin ink (manufactured by Taiyo Ink Co., Ltd.; product name S-222) is applied to the entire surface of the through-hole except for the land corresponding to the land where the component is mounted using the screen printing method, and dried to form a solder resist film. 11 (as shown in FIG. 7). Next, the outer shape was processed by mold press working, etc. Next, using the solder resist film 11 as a mask, 153.5 g of sulfuric acid, 107.2 g of hydrogen peroxide, and 10 g of triamylamine were added.
Using a nickel etching solution having a composition of 200 ppm ammonium chloride and 500 ppm benzotriazole, only the exposed electrolytic nickel plating layer 8 was removed to expose the electrolytic copper plating layer 7. As a result, through holes 13 . . . having lands 12 were formed. Subsequently, before the exposed electrolytic copper plating layer 7 is oxidized, a flux treatment is performed using, for example, rosin flux (manufactured by Tamura Seisakusho Co., Ltd.; trade name: B-111B flux) to produce a desired printed wiring board. (as shown in Figure 8).
しかして、前述した製造方法によれば、スルー
ホール１３となるべき部分の電気銅めつき層７上
には、ソルダーレジスト膜１１の形成時において
もニツケルめつき層８が被覆されているため、そ
の形成中スルーホール１３が酸化されたり、レジ
ストインキが飛散して汚染されるのを回避でき
る。また、ニツケルめつき層８を除去した後ただ
ちにフラツクス処理がなされるため、スルーホー
ル１３の表面が酸化されるのを回避できる。した
がつて、部品実装時の安定性が良好で、従来の如
き表面研摩処理や脱錆処理を省き、工程数を減少
することができる。 According to the above-described manufacturing method, the electrolytic copper plating layer 7 in the portion to become the through hole 13 is covered with the nickel plating layer 8 even when the solder resist film 11 is formed. During its formation, the through holes 13 can be prevented from being oxidized and the resist ink being scattered and contaminated. Further, since the flux treatment is performed immediately after removing the nickel plating layer 8, oxidation of the surface of the through hole 13 can be avoided. Therefore, the stability during component mounting is good, the conventional surface polishing treatment and rust removal treatment can be omitted, and the number of steps can be reduced.
また、ニツケルめつき層８の除去は既述した銅
表面の脱錆処理と類似の処理で最終仕上げの工程
で行うことができるとともに、部分的な除去のた
め従来の如き半田金属層の除去のように多量のエ
ツチング液を必要とせず、経済的である。 Further, the removal of the nickel plating layer 8 can be carried out in the final finishing process using a process similar to the derusting process of the copper surface described above, and since it can be partially removed, it is not necessary to remove the solder metal layer as in the conventional method. It is economical as it does not require a large amount of etching solution.
更に、ランド１２を有したスルーホール１３の
他にランドレススルーホール１０も簡単に形成で
きるもので、回路パターン９の密度を向上するこ
とができる。 Furthermore, in addition to the through holes 13 having the lands 12, landless through holes 10 can also be easily formed, and the density of the circuit pattern 9 can be improved.
以上詳述した如く本発明によれば、スルーホー
ルの酸化、汚染を阻止することにより脱錆処理工
程、表面研摩処理工程を省略でき、ひいては部品
実装時の半田付性が良好な高品質のスルーホール
を有する印刷配線板を効率よく製造し得る方法を
提供できるものである。
As described in detail above, according to the present invention, by preventing oxidation and contamination of the through holes, it is possible to omit the rust removal treatment process and the surface polishing treatment process. It is possible to provide a method for efficiently manufacturing a printed wiring board having holes.
第１図〜第８図は本発明の印刷配線板の製造方
法を工程順に示す断面図である。
１……絶縁板、２……銅箔、２′……銅箔パタ
ーン、３……両面銅張積層板、４……貫通穴、５
……無電解銅めつき層、５′……無電解銅めつき
層パターン、６……ドライフイルム、７……電気
銅めつき層、８……電気ニツケルめつき層、９…
…回路パターン、１０……ランドレススルーホー
ル、１１……ソルダーレジスト膜、１２……ラン
ド、１３……ランドを有するスルーホール。
FIGS. 1 to 8 are cross-sectional views showing the method for manufacturing a printed wiring board of the present invention in order of steps. 1...Insulating board, 2...Copper foil, 2'...Copper foil pattern, 3...Double-sided copper-clad laminate, 4...Through hole, 5
...Electroless copper plating layer, 5'... Electroless copper plating layer pattern, 6... Dry film, 7... Electrolytic copper plating layer, 8... Electrolytic nickel plating layer, 9...
... Circuit pattern, 10 ... Landless through hole, 11 ... Solder resist film, 12 ... Land, 13 ... Through hole having land.
Claims (1)
絶縁板のスルーホール形成部と回路パターン形成
部を除く全面に耐めつき被膜を形成する工程と、
この耐めつき被膜をマスクとして前記金属上に電
気めつき層及び前記金属層と異種の金属薄層を順
次形成する工程と、前記耐めつき被膜の除去後、
前記金属薄層をマスクとして前記金属層を除去
し、スルーホールと回路パターンを形成する工程
と、少なくともスルーホールを除く全面にソルダ
ーレジスト膜を形成する工程と、このソルダーレ
ジスト膜をマスクとして前記金属薄層を除去する
工程とを具備することを特徴とする印刷配線板の
製造方法。 ２ 金属薄層が、ニツケルめつき層であることを
特徴とする特許請求の範囲第１項記載の印刷配線
板の製造方法。 ３ 金属薄層を除去する手段として、硫酸と過酸
化水素とトリアミルアミンと塩化アンモニウムと
ベンゾトリアゾールとを組成とするエツチング液
を用いることを特徴とする特許請求の範囲第１項
記載の印刷配線板の製造方法。[Scope of Claims] 1. A step of forming a plating-proof coating on the entire surface of an insulating plate having a metal layer formed on the surface and side walls of the through hole except for the through hole forming area and the circuit pattern forming area;
A step of sequentially forming an electroplating layer and a metal thin layer different from the metal layer on the metal using this plating-resistant film as a mask, and after removing the plating-resistant film,
a step of removing the metal layer using the metal thin layer as a mask to form through holes and a circuit pattern; a step of forming a solder resist film on the entire surface excluding at least the through holes; and a step of removing the metal layer using the solder resist film as a mask. A method for manufacturing a printed wiring board, comprising the step of removing a thin layer. 2. The method for manufacturing a printed wiring board according to claim 1, wherein the thin metal layer is a nickel plating layer. 3. The printed wiring according to claim 1, wherein an etching solution containing sulfuric acid, hydrogen peroxide, triamylamine, ammonium chloride, and benzotriazole is used as a means for removing the thin metal layer. Method of manufacturing the board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23347482A JPS59123296A (en) | 1982-12-28 | 1982-12-28 | Method of producing printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23347482A JPS59123296A (en) | 1982-12-28 | 1982-12-28 | Method of producing printed circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59123296A JPS59123296A (en) | 1984-07-17 |
| JPS62599B2 true JPS62599B2 (en) | 1987-01-08 |
Family
ID=16955583
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23347482A Granted JPS59123296A (en) | 1982-12-28 | 1982-12-28 | Method of producing printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59123296A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020085194A1 (en) * | 2018-10-26 | 2020-04-30 | 川崎重工業株式会社 | Inclined structure and manufacturing method therefor |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61226997A (en) * | 1985-03-30 | 1986-10-08 | 株式会社東芝 | Manufacture of printed wiring board |
-
1982
- 1982-12-28 JP JP23347482A patent/JPS59123296A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020085194A1 (en) * | 2018-10-26 | 2020-04-30 | 川崎重工業株式会社 | Inclined structure and manufacturing method therefor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59123296A (en) | 1984-07-17 |
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