JPS6258565B2 - - Google Patents

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Publication number
JPS6258565B2
JPS6258565B2 JP55125030A JP12503080A JPS6258565B2 JP S6258565 B2 JPS6258565 B2 JP S6258565B2 JP 55125030 A JP55125030 A JP 55125030A JP 12503080 A JP12503080 A JP 12503080A JP S6258565 B2 JPS6258565 B2 JP S6258565B2
Authority
JP
Japan
Prior art keywords
amplifier
output
output current
voltage
distortion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55125030A
Other languages
Japanese (ja)
Other versions
JPS5750110A (en
Inventor
Yasuhiro Ishizaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP55125030A priority Critical patent/JPS5750110A/en
Publication of JPS5750110A publication Critical patent/JPS5750110A/en
Publication of JPS6258565B2 publication Critical patent/JPS6258565B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】 この発明はフイードフオワード方式により歪改
善を行う電力増幅器に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power amplifier that improves distortion using a feed forward method.

従来のこの種の電力増幅器を第1図に示す。こ
の第1図において、esは信号源、Aは無歪動作
の電圧増幅器、BOは電圧利得1の出力電流増幅
器、C1は電圧利得1で無歪の補助側出力電流増
幅器で、出力電流増幅器BO、C1の入力端はそれ
ぞれ電圧増幅器Aの出力端に接続されている。R
Lは負荷抵抗、RSは信号源esと電圧増幅器Aの
入力端+間の信号源低抗、R1は電圧増幅器Aの
反転入力端−と接地間に接続された接地側帰還抵
抗、R2は出力電流増幅器BOの出力端と電圧増幅
器Aの反転入力端−間に接続された帰還抵抗、Z1
は出力電流増幅器BOの出力端と負荷抵抗RL間に
接続された出力合成インピーダンス、Z2は補助側
出力電流増幅器C1の出力端と負荷抵抗RL間に接
続された補助側出力合成インピーダンスである。
A conventional power amplifier of this type is shown in FIG. In this figure, e s is a signal source, A is a voltage amplifier with distortion-free operation, B O is an output current amplifier with a voltage gain of 1, and C 1 is an auxiliary output current amplifier with a voltage gain of 1 and no distortion. The input terminals of current amplifiers B O and C 1 are connected to the output terminal of voltage amplifier A, respectively. R
L is a load resistance, R S is a signal source low resistance between the signal source e s and the input terminal + of voltage amplifier A, R 1 is a ground side feedback resistor connected between the inverting input terminal - of voltage amplifier A and ground, R 2 is a feedback resistor connected between the output terminal of the output current amplifier B O and the inverting input terminal of the voltage amplifier A, and Z 1
is the output composite impedance connected between the output terminal of the output current amplifier B O and the load resistor R L , and Z 2 is the auxiliary output composite impedance connected between the output terminal of the auxiliary output current amplifier C 1 and the load resistor R L It is impedance.

次にこのような従来の電力増幅器の動作を説明
する。すなわち、信号源esからの信号は、信号
源抵抗RSを通り、電圧増幅器Aで増幅され、出
力電流増幅器BOの出力端より、帰還低抗R2,R1
および出力合成インピーダンスZ1を通して負荷抵
抗RL両端に加えられる。また、電圧増幅器Aの
出力電流の一部が補助側出力電流増幅器C1に供
給され、無歪増幅された後、補助側出力合成イン
ピーダンスZ2を通して負荷抵抗RLに流れるもの
である。
Next, the operation of such a conventional power amplifier will be explained. That is, the signal from the signal source e s passes through the signal source resistor R s , is amplified by the voltage amplifier A, and is passed through the feedback resistor R 2 , R 1 from the output terminal of the output current amplifier B 0 .
and is applied across the load resistor R L through the output composite impedance Z 1 . Further, a part of the output current of the voltage amplifier A is supplied to the auxiliary output current amplifier C1 , is amplified without distortion, and then flows to the load resistor R L through the auxiliary output composite impedance Z2 .

ところで上述電力増幅回路は、帰還抵抗R1
R2により負帰還増幅器を構成しているため、定
常状態での電圧増幅器Aの出力電圧ea、出力電
流増幅器BOの出力電圧e0、負荷抵抗RLの出力電
圧eLは次のようになる。
By the way, the above-mentioned power amplifier circuit has feedback resistors R 1 ,
Since a negative feedback amplifier is configured by R2 , the output voltage e a of voltage amplifier A, output voltage e 0 of output current amplifier B O , and output voltage e L of load resistor R L in steady state are as follows. become.

a=A/1+Aβaes−Aβa/1+AβaeD
…(1) e0=A/1+Aβaes+1/1+AβaeD ……(2) eL=R/Z+R(Z+Z){A/1+Aβa(Z1+Z2)es+1/1+Aβa(Z2−AβaZ1
D}……(3) ただし、Aは電圧増幅器Aのオープン電圧利
得、esは入力信号電圧、eDは出力電流増幅器B
Oで発生する非直線形歪(電圧)、R1は帰還抵抗
R1の値、R2は帰還抵抗R2の値、RLは負荷抵抗R
Lの値、Z1は出力合成イピーダンスZ1の値、Z2
補助側出力合成インピーダンスZ2の値であり、β
a=R1/(R1+R2)である。また、補助側出力電
流増幅器C1は無歪な理想増幅器とする(実際に
はA級増幅器)。
e a =A/1+Aβae s −Aβa/1+Aβae D
…(1) e 0 =A/1+Aβae s +1/1+Aβae D …(2) e L =R L /Z 1 Z 2 +R L (Z 1 +Z 2 ) {A/1+Aβa (Z 1 +Z 2 ) e s +1/1+Aβa(Z 2 −AβaZ 1 )
e D }...(3) where A is the open voltage gain of voltage amplifier A, e s is the input signal voltage, and e D is the output current amplifier B
Nonlinear distortion (voltage) generated at O , R 1 is the feedback resistance
The value of R 1 , R 2 is the value of feedback resistor R 2 , R L is the load resistance R
The value of L , Z 1 is the value of output composite impedance Z 1 , Z 2 is the value of auxiliary output composite impedance Z 2 , and β
a=R 1 /(R 1 +R 2 ). Furthermore, the auxiliary output current amplifier C1 is assumed to be an ideal amplifier with no distortion (actually, it is a class A amplifier).

上式より、Z2=Z1aが成立するとき、出力電
流増幅器BOで発生する非線形歪(電圧)eDは出
力電圧eLに存在しないことになる。このとき、
Lは一般に、Aβa≫1、Z2≫Z1であるから、e
L={RL(RL+Z1)〕(1/βa)esとなる。
From the above equation, when Z 2 =Z 1a holds true, the nonlinear distortion (voltage) e D generated in the output current amplifier B O does not exist in the output voltage e L. At this time,
Since e L generally holds Aβ a ≫ 1, Z 2Z 1 , e
L = {R L (R L +Z 1 )] (1/β a ) es .

以上のように従来の電力増幅器では、出力電流
増幅器BOで発生する歪(電圧)eDを打ち消すた
めの補助側出力電流増幅器C1は理想的に無歪な
増幅器でなければならず、そのため完全なA級動
作をさせることが必要で、かつ補助側出力電流増
幅器C1単体での負帰還を動作させること等も必
要であり、しかもこれらを満足させても完全に無
歪な増幅器を実現することが非常に困難であると
いう欠点があつた。
As described above, in conventional power amplifiers, the auxiliary output current amplifier C 1 for canceling the distortion (voltage) e D generated in the output current amplifier B O must ideally be a distortion-free amplifier; It is necessary to perform complete class A operation, and it is also necessary to operate negative feedback on the auxiliary output current amplifier C1 alone, and even if these requirements are met, a completely distortion-free amplifier can be achieved. The disadvantage was that it was very difficult to do so.

この発明は上記のような欠点を除去するために
なされたもので、無歪な増幅をする電圧増幅器と
負荷との間に複数の出力電流増幅器を並列接続し
て設け、それらの各出力端から電圧増幅器に負帰
還を施すことにより無歪動作の出力電流増幅器を
無用とし、1つの出力電流増幅器に対して他の出
力電流増幅器を歪打消しのための理想的に無歪な
増幅器とすることにより生ずる上述諸欠点をなく
し、歪を発生する出力電流増幅器同志で相互に歪
成分を打消して無歪とした電力増幅器を提供する
ことを目的とする。
This invention was made in order to eliminate the above-mentioned drawbacks, and a plurality of output current amplifiers are connected in parallel between a voltage amplifier that performs distortion-free amplification and a load, and a plurality of output current amplifiers are connected in parallel from each output terminal. To make a distortion-free output current amplifier unnecessary by applying negative feedback to a voltage amplifier, and to make one output current amplifier and other output current amplifiers ideally distortion-free amplifiers for canceling distortion. It is an object of the present invention to provide a power amplifier that eliminates the above-mentioned drawbacks caused by the above-mentioned method and eliminates distortion components by mutually canceling out distortion components between output current amplifiers that generate distortion.

以下第2図および第3図を参照してこの発明の
実施例を説明する。第2図はこの発明による電力
増幅器の一実施例を示す回路図で、図中esは信
号源、Aは無歪動作の電圧増幅器、BOは電圧利
得1の歪発生する出力電流増幅器、C1はこの出
力電流増幅器BOと同等の出力電流増幅器で、出
力電流増幅器BO,C1の入力端はそれぞれ電圧増
幅器Aの出力端に接続されている。RLは負荷抵
抗、RSは信号源esと電圧増幅器Aの入力端+間
の信号源抵抗、R1は電圧増幅器Aの反転入力端
−と接地間に接続された接地側帰還抵抗、R2
出力電流増幅器BOの出力端と電圧増幅器Aの反
転入力端−間に接続された帰還抵抗、R3は出力
電流増幅器C1の出力端と電圧増幅器Aの反転入
力端−間に接続された帰還抵抗である。また、Z1
は出力電流増幅器BOの出力端と負荷抵抗RL間に
接続された出力合成インピーダンス、Z2は出力電
流増幅器C1の出力端と負荷低抗RL間に接続され
た出力合成インピーダンスである。
Embodiments of the present invention will be described below with reference to FIGS. 2 and 3. FIG. 2 is a circuit diagram showing an embodiment of the power amplifier according to the present invention, in which e s is a signal source, A is a voltage amplifier that operates without distortion, B O is an output current amplifier that generates distortion with a voltage gain of 1, C 1 is an output current amplifier equivalent to this output current amplifier B O , and the input terminals of the output current amplifiers B O and C 1 are connected to the output terminal of the voltage amplifier A, respectively. R L is a load resistance, R S is a signal source resistance between the signal source e s and the input terminal + of voltage amplifier A, R 1 is a ground side feedback resistor connected between the inverting input terminal - of voltage amplifier A and ground, R 2 is a feedback resistor connected between the output terminal of output current amplifier B O and the inverting input terminal of voltage amplifier A, and R 3 is a feedback resistor connected between the output terminal of output current amplifier C 1 and the inverting input terminal of voltage amplifier A. is the connected feedback resistor. Also, Z 1
is the output composite impedance connected between the output terminal of the output current amplifier B O and the load resistor R L , and Z 2 is the output composite impedance connected between the output terminal of the output current amplifier C 1 and the load resistor R L .

次に上述この発明の電力増幅器の動作を説明す
る。すなわち、信号源esからの信号は、信号源
抵抗RSを通り、電圧増幅器Aで増幅され、出力
電流増幅器BO,C1に供給される。このとき、出
力電流増幅回路BOの出力端からは帰還抵抗R2
通して、また出力電流増幅器C1の出力端からは
帰還抵抗R3を通して、それぞれ電圧増幅器Aの
反転入力端−に負帰還が施される。すなわち帰還
抵抗R1〜R3により負帰還回路が形成され、出力
電流増幅器BOには定常出力電圧e0、出力電流増
幅器C1には定常出力電圧e1が現れ、それぞれ出力
合成インピーダンスZ1,Z2により合成されて負荷
抵抗RLに加えられ、出力電圧eLとなる。
Next, the operation of the above-mentioned power amplifier of the present invention will be explained. That is, the signal from the signal source es passes through the signal source resistor R s , is amplified by the voltage amplifier A, and is supplied to the output current amplifiers B 0 and C 1 . At this time, negative feedback is applied from the output terminal of the output current amplifier circuit B O through the feedback resistor R 2 and from the output terminal of the output current amplifier C 1 through the feedback resistor R 3 to the inverting input terminal of the voltage amplifier A. administered. In other words, a negative feedback circuit is formed by the feedback resistors R 1 to R 3 , a steady output voltage e 0 appears in the output current amplifier B O , a steady output voltage e 1 appears in the output current amplifier C 1 , and the output composite impedance Z 1 respectively , Z 2 and is added to the load resistance R L to become the output voltage e L .

上述動作時において、上記e0,e1およびeL
次のように表わされる。
During the above operation, the above e 0 , e 1 and e L are expressed as follows.

抵抗R2を流れる電流をi1、抵抗R3を流れる電流
をi2とすると、 i1=e−e/R、i2=e−e/R、ef=R
1(i1+i2) ea=A(es−ef)、e0=ea+eD0 e1=ea+eD1L=R/Z+(Z+Z)R(Z2e0+Z1e
1)……(3′) 故に、 従つて、 ea=A(es−ef) =A{es−βea−αβeD0−βγeD1} から ea=A/1+Aβes−Aαβ/1+AβeD0−Aβ
γ/1+AβeD1 このため、e0=ea+eD0、e1=ea+eD1から e0=A/1+Aβes+1+Aβ(1−α)/1+AβeD0−Aβγ/1+AβeD1 ……(4) e1=A/1+Aβes−Aβα/1+AβeD0+1+Aβ(1−γ)/1+AβeD1 ……(5) (3′)式から eL=R/Z+(Z+Z)R・A/
1+Aβ(Z1+Z2) es +{(1/A+β(1−α))Z2−αβZ1}eD0
+{(1/A+β(1−γ))Z1−γβZ2}eD1〕 ただし、eDOは出力電流増幅器BOの歪成分
(電圧)、eD1は出力電流増幅器C1の歪成分(電
圧)、R3は帰還抵抗R3の値であり、α=R3/(R2
+R3)、β=R1/〔R1+R2R3〕、γ=R2/(R2
+R3)である。その他は上記(1)〜(3)式の場合と同
様である。上式より、eD0、eD1の項の係数が0
になる条件即ちZ/Z=1/A+β(1−α)/α
β= γβ/1/A+β(1−γ)が無歪条件である。従つて
、α+ γ=1であり、またAは電圧増幅器Aのオープン
電圧利得でA>>1であるから、上記無歪条件
は、Z/Z=1−α/α=γ/1−γ=R/R
となりこの式が成立 するとき、出力電圧eLには歪成分が存在しない
ことになる。又、上記無歪条件は、結局、各出力
電流増幅器B0,C1の出力端に接続された出力合
成インピーダンスZ1,Z2と帰還インピーダンス
R2,R3の比が等しい、即ちZ/R=Z/Rとい
うことに なる。
If the current flowing through the resistor R 2 is i 1 and the current flowing through the resistor R 3 is i 2 , i 1 = e 0 - e f /R 2 , i 2 = e 1 - e f /R 3 , e f = R
1 (i 1 + i 2 ) ea=A( es −e f ), e 0 = e a +e D0 e 1 = e a +e D1 e L = R L /Z 1 Z 2 + (Z 1 +Z 2 )R L (Z 2 e 0 +Z 1 e
1 )……(3′) Therefore, Therefore, e a =A( es − e f ) =A{ es −βe a −αβe D0 −βγe D1 }, so e a =A/1+Aβe s −Aαβ/1+Aβe D0 −Aβ
γ/1+Aβe D1 Therefore, e 0 =e a +e D0 , e 1 =e a +e D1 , e 0 = A/1+Aβe s +1+Aβ(1-α)/1+Aβe D0 −Aβγ/1+Aβe D1 ...(4) e 1 = A/1+ Aβes −Aβα/1+Aβe D0 +1+Aβ(1-γ)/1+Aβe D1 ...(5) From equation (3'), e L = R L /Z 1 Z 2 + (Z 1 +Z 2 ) R L・A/
1+Aβ(Z 1 +Z 2 ) e s + {(1/A+β(1-α)) Z 2 −αβZ 1 }e D0
+{(1/A+β(1-γ))Z 1 −γβZ 2 }e D1 ] However, e DO is the distortion component (voltage) of the output current amplifier B O , and e D1 is the distortion component (voltage) of the output current amplifier C 1 voltage), R 3 is the value of the feedback resistor R 3 , α = R 3 / (R 2
+R 3 ), β = R 1 / [R 1 +R 2 R 3 ], γ = R 2 / (R 2
+R 3 ). The rest is the same as in the case of formulas (1) to (3) above. From the above formula, the coefficients of the terms e D0 and e D1 are 0.
The condition that Z 1 /Z 2 = 1/A+β(1-α)/α
β=γβ/1/A+β(1−γ) is the no-distortion condition. Therefore, since α + γ = 1 and A is the open voltage gain of voltage amplifier A and A >> 1, the above distortion-free condition is Z 1 /Z 2 = 1 - α / α = γ / 1 −γ=R 2 /R 3
When this equation holds true, there is no distortion component in the output voltage e L . Moreover, the above-mentioned no-distortion condition ultimately depends on the output composite impedances Z 1 and Z 2 and the feedback impedance connected to the output terminals of each output current amplifier B 0 and C 1 .
The ratio of R 2 and R 3 is equal, that is, Z 1 /R 2 =Z 2 /R 3 .

以上は出力電流増幅器が2つの場合について説
明したが、2つ以上の場合においても上述と同様
の回路構成をすることにより同様の効果が得られ
る。
Although the case where there are two output current amplifiers has been described above, the same effect can be obtained by using the same circuit configuration as described above even in the case where there are two or more output current amplifiers.

また、上述実施例では、この発明を非反転増幅
器に適用した場合について述べたが、第3図に示
すような反転増幅器に適用してもよく、この場合
についても上述実施例と同様に動作させることが
でき、同様の効果が得られる。なお、第3図にお
いて第2図と同一符号は同一または相当部分を示
す。
Further, in the above embodiment, the case where the present invention is applied to a non-inverting amplifier has been described, but it may also be applied to an inverting amplifier as shown in FIG. You can obtain the same effect. In FIG. 3, the same reference numerals as in FIG. 2 indicate the same or corresponding parts.

以上述べたようにこの発明によれば、歪を発生
する出力電流増幅器同志の相互作用を利用してそ
れぞれの歪成分を打消すように構成したので、無
歪な補助出力電流増幅器を必要としないで無歪か
つ高精度の電力増幅器を安価に提供することがで
きるという効果がある。
As described above, according to the present invention, since the distortion components are canceled by utilizing the interaction between the output current amplifiers that generate distortion, there is no need for a non-distortion auxiliary output current amplifier. This has the advantage that a distortion-free and highly accurate power amplifier can be provided at low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の電力増幅器の回路図、第2図は
この発明による電力増幅器の一実施例を示す回路
図、第3図は同じく他の実施例を示す回路図であ
る。 A……電圧増幅器、BO,C1……出力電流増幅
器、RL……負荷抵抗、R1〜R3……帰還抵抗、
Z1,Z2……出力合成インピーダンス。なお、図中
同一符号は同一または相当部分を示す。
FIG. 1 is a circuit diagram of a conventional power amplifier, FIG. 2 is a circuit diagram showing one embodiment of the power amplifier according to the present invention, and FIG. 3 is a circuit diagram showing another embodiment. A... Voltage amplifier, B O , C 1 ... Output current amplifier, R L ... Load resistance, R 1 to R 3 ... Feedback resistance,
Z 1 , Z 2 ... Output composite impedance. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] 1 無歪動作する電圧増幅器と負荷との間に歪を
発生する複数の出力電流増幅器を並列接続して設
け、それら出力電流増幅器の各出力端から上記電
圧増幅器の帰還入力端にそれぞれ帰還インピーダ
ンスを介して負帰還を施して電圧増幅器の出力端
に上記各出力電流増幅器で発生する歪と反対極性
の歪を作成させ、かつ各出力電流増幅器の出力端
と負荷との間にそれぞれ出力合成インピーダンス
を設け、各出力電流増幅器の出力端にそれぞれ接
続された出力合成インピーダンスと帰還インピー
ダンスの比を等しくしたことを特徴とする電力増
幅器。
1 A plurality of output current amplifiers that generate distortion are connected in parallel between a voltage amplifier that operates without distortion and a load, and a feedback impedance is connected from each output terminal of the output current amplifiers to the feedback input terminal of the voltage amplifier. Negative feedback is applied to the output terminal of the voltage amplifier to create distortion of the opposite polarity to the distortion generated in each of the output current amplifiers, and an output composite impedance is provided between the output terminal of each output current amplifier and the load. A power amplifier characterized in that the ratio of the output composite impedance and the feedback impedance connected to the output end of each output current amplifier is equal.
JP55125030A 1980-09-09 1980-09-09 Power amplifier Granted JPS5750110A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55125030A JPS5750110A (en) 1980-09-09 1980-09-09 Power amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55125030A JPS5750110A (en) 1980-09-09 1980-09-09 Power amplifier

Publications (2)

Publication Number Publication Date
JPS5750110A JPS5750110A (en) 1982-03-24
JPS6258565B2 true JPS6258565B2 (en) 1987-12-07

Family

ID=14900103

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55125030A Granted JPS5750110A (en) 1980-09-09 1980-09-09 Power amplifier

Country Status (1)

Country Link
JP (1) JPS5750110A (en)

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JPS5750110A (en) 1982-03-24

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