JPS5834606A - Amplifier circuit - Google Patents

Abstract

PURPOSE:To reduce distortion by simple circuit constitution without using a negative feedback loop by amplifying a differential signal between an input signal and a signal of common electrode and adding this to the other side of resistance connected to the common electrode and output electrode side. CONSTITUTION:An input signal e1 is applied to the input electrode of an amplifier element 2 and a resistance 3 is connected to a common electrode. A differential signal e2 between the input signal e1 and a signal generated in the common electrode is amplified by, for instance, a differential amplifier circuit 4. The amplified signal i2 is added to both or one of other end of resistance 3 connected to above-mentioned common electrode and output electrode side to cancel distortion components generated from the amplifier element 2. For instance, a circuit shown in a figure in which FET is used as an amplifier element 2 is used, and resistance value R3 of the resistance 3 is so selected that an expression i2/e2=1/R3 holds to cancel influence due to level between gate source of FET2.

Description

DETAILED DESCRIPTION OF THE INVENTION Since the amplification element generates distortion, it is necessary to amplify it sufficiently in advance in the place where you want to obtain the desired degree of amplification. Distortion is reduced by applying negative feedback from the output terminal to the input side of the circuit, but the present invention aims to reduce distortion in an amplifier circuit with a simple circuit configuration without using a negative feedback loop. C The present invention detects the voltage drop of the signal that occurs between the input electrode of the amplifier element O and the common electrode, or the variation of the wrinkle voltage drop, converts it into a current component, amplifies it, and amplifies the wrinkle. By flowing the current component into the load resistor in the opposite phase to the main current of the amplification element, the decrease or fluctuation of the main current due to the voltage drop of the signal or its fluctuation is offset, and the electrodes with respect to the output current of the circuit are In other words, the present invention provides a good amplification circuit equivalent to using an amplification element with a linear transfer characteristic. , is a jlIO embodiment of the invention. The input terminal l is connected to the gate (input electrode) of FET2, which is an amplification element, and the drain (output electrode) of FET2, which is connected to the inverting input terminal of the differential amplifier circuit 40, is connected to the voltage 11VecK! through a resistor 9.
I is connected to the output terminal 10 and the differential amplifier circuit 4.
The source (common electrode) is connected to the non-inverting input terminal of the differential amplifier circuit 4, and also connected to the output terminal 8 and the output terminal 6 of the differential amplifier circuit 4 via the resistor 3. . The operation in a configuration in which the output terminal 8 is grounded via the resistor 7 and the output terminal 8 is 0 or more will be described. The differential amplifier circuit 4 generates two current outputs in response to the differential input signal, a current value flowing into the output terminal 5 of the cough differential amplification H path 4 and a current value flowing out from the output terminal 6. are equal, and their output currents 1. and the differential input signal, and the O ratio is set to l〆4=h, the resistance values of resistors 3.7 and 90 are set to R3, Rd, and R9, respectively, and the input signal level applied to input terminal 1 is set to 01. , the signal level between the gate and source of FET2 is ., the signal level between the input terminal 1 and the output terminal 8 is ○, and the output signal level of the output terminals 8 and 100 is , and □, respectively. Binding, Fli: T20
Assuming that the drain current is 11, the current value of 1 m is the current value obtained by subtracting 2 from the level between input terminal 1 and output terminal 8 by Hs, 11 = 3-- (13R3H
The current value decreases by an amount corresponding to the magnitude of a and .

Therefore, the output current amount 2Fi of the differential amplifier circuit 4 is k as described above.
1 g-j'm..., d), output current amount. is the sum of the quantity and 1□, so if the stop I2 is set to 1, that is, j'm-14 so that it is equal to the 512th term on the right side of the equation, s/Rs K, then the output current is 1° The decrease in the current according to the magnitude of Mori, .

Therefore, the output current at this time is 1゜ 1・=2B−(, □, , @=−person 1 “2 layers, ・, 1゜−
21---1----------1-(2) R1
+ R7 ζ011 According to the present invention, the output voltage of the differential amplifier circuit 4 is
11. The ratio between and the differential input signal is '2/@* =
When j' = '6, the influence of the level between IPEP2O3 and tonose is canceled out, and the output current 1 of the circuit is determined by the input signal 1 and the resistors 3 and 7.
Alternatively, if the output terminal 8 is grounded, the current value is determined by the resistor 8. Therefore, during distortion due to non-linearity of FF and T20 mutual conductance, it is not affected by noise generated from FET2.
However, as is well known, the smaller the signal level that an amplifier circuit handles, the smaller the distortion it generates, and the signal level that the differential amplifier circuit 4 handles is the level between the gate and source of FET 2, which is the level between the gate and source of FET 2, which is the level between the gate and source of FET 2. Since the level is very small compared to the signal □, the distortion generated from the differential amplifier circuit 4 is also very small. Therefore, an output current with less distortion can be obtained. Here, as is clear from equation (2), the amplifier circuit according to the present invention has an equivalent circuit as shown in FIG. An equivalent circuit is obtained by replacing the amplifying element 20 with an amplifying element as an output electrode, the mutual conductance pm of which is linear and 1m=tAs.

Therefore, in FIG. 1, the output signals 1 and 10 generated at the output terminals 8 and 10 are respectively Rf'R1+R7' 1 ``Rs+Ry'' tonal from equation (2).

Although the amplification element aFET2 was used in the explanation in FIG. 1, it goes without saying that the amplification element used in the present invention is not limited to FETs, but that similar effects can be obtained by using transistors or vacuum tubes. be.

FIG. 3 shows a second embodiment of the present invention. This figure shows an embodiment in which distortion +O has been further improved compared to the embodiment shown in FIG. Since the voltage is only applied after being divided, a detailed explanation of the connections will be omitted, but the signal level applied between the inverting and non-inverting input terminals of the differential amplifier circuit 40 is higher than that in the case shown in FIG. Since the difference is reduced by 4, the distortion generated from the differential amplifier circuit 4 becomes even smaller than that in the case of FIG. Therefore, the output signal in FIG. 3 is even better than that in FIG. 1) with even less distortion. In the figure, assuming that the voltage division ratio by resistors 11 and 12 is the peak, the level 4 between the input terminal 1 and the inverting input terminal of the differential amplifier circuit 4 is:
・4=(1-”/K)・.

Therefore, 1□' and 1,'a respectively.Therefore, if we set 9m = ``/R'' as in the case of Fig. 1, the output current 1゜' is therefore 7' (Rm 10R7) Ks 9 ・1@'=c----,,--,,,,--life l@3-
)R7)K), the distortion generated from the FET 2 can be offset by the voltage division ratio 1, 4 by the resistors 11 and 12. And F.E.
The gate-to-north level s2' of T2 includes the loss voltage due to the linear transconductance 9 (R2) of the FET 2 and the distortion due to the non-linear transconductance 2'. If the voltage division ratio is set to Ig so that the voltage drop due to the resistor 11 is equal to the loss voltage due to 9r12K, the level handled by the differential amplifier circuit 4 is equal to the distortion due to 9rn2'. Since the level is extremely small, the distortion generated by the differential amplifier circuit 4 is also extremely small, and it is possible to obtain an output signal 66' or e,.' with even less distortion. As shown in Figure 3, if the level handled by the differential amplifier circuit 4 is only the distortion of FF:T2, the distortion in the entire circuit can be made extremely small. Regardless of the method, an amplifier may be provided between the input terminal 1 and the gate of FET 2 in FIG.
A similar effect can be obtained by amplifying the voltage in advance to a level that compensates for the loss voltage due to yz2 and then applying it to the gate of FET2, and in this case as well, the distortion including the distortion of the amplifier 13 is canceled out. Kotohiro, of course.

Regarding the various embodiments, the same effect can be obtained by short-circuiting the resistor 7 to the loop 9 so that the output is obtained only from either the output terminal 10 or the output terminal 8. This is an embodiment of the spear 3 of the present invention. In the same figure, for the embodiment 1 of the present invention, a differential amplifier circuit A corresponding to the differential amplifier circuit 4 in FIG. This is an embodiment in which the output current of the circuit 4' and the differential input signal are increased N times as compared to the case of FIG. 1, and the distortion generated from the differential amplifier circuit 4' is reduced by connecting differential amplifiers in parallel. , which aims to reduce distortion in the overall circuit.

In the figure, the different point from the first [F] is the point where the differential amplifier circuit 4' is multiplied by ImtN, and the output of the differential amplifier circuit 4' is connected to the resistor 7 and the w at each voltage dividing point of 10 resistance value for N! ! The detailed explanation of the connection will be omitted since it will only be assumed that the resistors 7-1 and 7-
The sum of the resistance values of the resistors 2 and 2 is equal to the resistance value of the resistor 7, and similarly, the resistance value of the resistor 9-1 is the resistance value of 1/1 of the resistor 9 ON), and the resistance value of the resistors 9-1 and 9-2 is equal to the resistance value of the resistor 7. The sum of is equal to the resistance value of the resistor 9. Therefore, according to the same figure, the differential amplifier circuit 4
'The output of the current 18' is N times that of the case in Figure 1, but the resistance values of the resistors 7-1 and 9-1 are 1/N of the resistance values of the resistors 7 and 9 in Figure tIIc1, respectively. Since it is a resistance value, the voltage drop across the resistance due to the bow is the same, and as in the case of Fig. 1, the output terminals 8 and 10 receive output signals with little distortion.
, and 1. can be obtained, and the differential amplifier circuit J
□Since the distortion has been reduced, the distortion is even less.

85, It and Y diagrams show a 4V differential amplifier circuit used in the present invention.
C'), let the value of the current flowing into the output terminal 5 of the differential amplifier 11 circuit 4 and the value of the current flowing out from the output terminal 6 be respectively l, and in order to make l, x = JllBe@, This is a concrete example.

Also, the ff+ threshold is FET4-1 and 4-3 and resistor 4-2.
It is constructed by a complementary differential amplifier circuit consisting of
N and explain the output current 13 of the differential amplifier circuit 4 and the differential input signal... and the O ratio 1! /, the wealth is FET 4 and 4-3
Mutual punductance JiFm4 1 and h4-3 and resistance 4-20 resistance value R4- 0, that is, F
When the differential input signal 2 is input between the gates of ET4-1 and FET4-30, the output current l is, therefore, as mentioned above, if R1-V9m is set, the distortion of FET2 can be canceled out. Just do it.

[Figure 1 shows another embodiment using a nine-complementary differential amplifier circuit configuration in which the FETs 4-1 and 4-3 in Figure H are replaced with piebot transistors 4-4 and 4-5.
-4 and 4-5, and let the emitter resistances of transistors 4-4 and 4-5 be r.4 and re, respectively, then R1z re + reB + R4-1 in the same way as in the above case. Just do it.

FIG. 9 shows an embodiment in which the differential amplifier circuit 4 of FIG. 1 is constructed using two sets of differential amplifier circuits 41 and 42 whose polarities are OJ% of each other.

and ζ to FET4-7. 4-8. 4-11 and 4-1
The transconductance of 2 is 11m4-Y, 9
m4Isgm4-11 and l/m4-1 snow, resistance 4
-9. 4-10° 4-18 and 4-140 resistance 11t
Soh-'T' and R4-e, R4-5a.

If R4-13 and R4-14 are set, then IL is obtained in the same way as in the above case.

In the above, three specific examples of the differential amplifier circuit 4 are shown, and 9 is not limited to the above three examples. is possible.

As described above, according to the present invention, an amplification circuit with low distortion can be obtained with a simple configuration.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is a diagram showing its equivalent circuit, Fig. 7113, Fig. 4, Fig. S, J
Figure Ia and Figure 9 are circuit diagrams showing an embodiment of the present invention, respectively. In the figure, snow is an FET, 4 is an amplifier circuit, and 3.7 and 9 are resistors.0 Patent Applicant Nippon Columbia Co., Ltd.
',4,T. Figure 3

Claims (1)

[Claims] An input signal is applied to an input electrode of an amplifying element having an input electrode, a common electrode, and an output electrode, a resistor is connected to the common electrode, and a difference signal between the input signal and a signal generated at the common electrode is amplified, and the amplified An amplifier circuit characterized in that a signal is added to either or both of the other end of the resistor connected to the common electrode and the output electrode II to cancel out a distortion component generated from the S increaser.