JPS6257843U - - Google Patents
Info
- Publication number
- JPS6257843U JPS6257843U JP14707085U JP14707085U JPS6257843U JP S6257843 U JPS6257843 U JP S6257843U JP 14707085 U JP14707085 U JP 14707085U JP 14707085 U JP14707085 U JP 14707085U JP S6257843 U JPS6257843 U JP S6257843U
- Authority
- JP
- Japan
- Prior art keywords
- data
- unit
- circuit
- transmission device
- signal level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
Landscapes
- Information Transfer Systems (AREA)
Description
第1図は本考案の一実施例を示すブロツク図、
第2図は送受信データ波形を示す図、第3図は第
1図における第2の回路の具体例を示す図である
。
1,2……データ伝送装置、3……主制御回路
、5……並列/直列変換回路、6……直列/並列
変換回路、7……第1の回路、9……第2の回路
。
FIG. 1 is a block diagram showing an embodiment of the present invention.
FIG. 2 is a diagram showing transmitted and received data waveforms, and FIG. 3 is a diagram showing a specific example of the second circuit in FIG. 1. DESCRIPTION OF SYMBOLS 1, 2... Data transmission device, 3... Main control circuit, 5... Parallel/serial conversion circuit, 6... Series/parallel conversion circuit, 7... First circuit, 9... Second circuit.
Claims (1)
ビツトとストツプビツトを付加してシリアルに送
受信するデータ伝送装置において、送信ラインに
対し1単位のデータ長より長く、かつ前記スター
トビツトの信号レベルと同一の信号を送出する第
1の回路と、受信ラインから受信した1単位のデ
ータの信号レベルを判定し、前記スタートビツト
の信号レベルと同一であり、かつ1単位のデータ
長より長ければデータ伝送装置全体をリセツトす
る第2の回路とを備えることを特徴とするデータ
伝送装置のリセツト回路。 In a data transmission device that serially transmits and receives data by adding a start bit and a stop bit to one unit of data consisting of multiple bits, a signal that is longer than one unit of data length and has the same signal level as the start bit is sent to the transmission line. Determine the signal level of one unit of data received from the first circuit to send and the reception line, and if it is the same as the signal level of the start bit and longer than the data length of one unit, reset the entire data transmission device. 1. A reset circuit for a data transmission device, comprising: a second circuit that performs the reset operation.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14707085U JPS6257843U (en) | 1985-09-26 | 1985-09-26 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14707085U JPS6257843U (en) | 1985-09-26 | 1985-09-26 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6257843U true JPS6257843U (en) | 1987-04-10 |
Family
ID=31060099
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14707085U Pending JPS6257843U (en) | 1985-09-26 | 1985-09-26 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6257843U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5148235A (en) * | 1974-10-23 | 1976-04-24 | Omron Tateisi Electronics Co | |
JPS5160102A (en) * | 1974-11-21 | 1976-05-25 | Hitachi Ltd | Deetadensosochino ijojotaikaifukuhoshiki |
-
1985
- 1985-09-26 JP JP14707085U patent/JPS6257843U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5148235A (en) * | 1974-10-23 | 1976-04-24 | Omron Tateisi Electronics Co | |
JPS5160102A (en) * | 1974-11-21 | 1976-05-25 | Hitachi Ltd | Deetadensosochino ijojotaikaifukuhoshiki |
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