JPS6257804U - - Google Patents
Info
- Publication number
- JPS6257804U JPS6257804U JP15065685U JP15065685U JPS6257804U JP S6257804 U JPS6257804 U JP S6257804U JP 15065685 U JP15065685 U JP 15065685U JP 15065685 U JP15065685 U JP 15065685U JP S6257804 U JPS6257804 U JP S6257804U
- Authority
- JP
- Japan
- Prior art keywords
- input
- output
- address
- output card
- card
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Programmable Controllers (AREA)
Description
第１図は、本考案の具体的な一実施例に係る入
出力カードを有するプログラマブルコントローラ
の全体の構成を示しブロツクダイヤグラム、第２
図は、本考案の具体的な一実施例に係る１６点出
力カードの構成を示した電気回路図、第３図は、
８点出力カードの構成を示した電気回路図、第４
図、第５図は、入出力カード選択回路の構成を示
した電気回路図である。
FIG. 1 is a block diagram showing the overall configuration of a programmable controller having an input/output card according to a specific embodiment of the present invention.
The figure is an electric circuit diagram showing the configuration of a 16-point output card according to a specific embodiment of the present invention, and FIG.
Electrical circuit diagram showing the configuration of an 8-point output card, No. 4
5 are electrical circuit diagrams showing the configuration of the input/output card selection circuit.
Claims (1)
出来、接続された入出力要素の２値状態を示す２
値データが、その１の入出力要素に割り当てられ
たアドレスを指定することにより入出力制御され
るプログラマブルコントローラの入出力カードに
おいて、 前記１の入出力カード内の１６の相対アドレス
を決定する下位４ビツトのアドレス信号の内、８
の上位アドレスと８の下位アドレスを決定するビ
ツトのアドレス信号を入力するアドレス信号線を
抵抗を介して電源に接続したことを特徴とするプ
ログラマブルコントローラの入出力カード。[Claims for Utility Model Registration] 1 input/output card can connect 16 input/output elements, and 2 indicates the binary state of the connected input/output elements.
In an input/output card of a programmable controller in which value data is input/output controlled by specifying an address assigned to one input/output element, the lower four determine the 16 relative addresses within the one input/output card. Of the bit address signals, 8
An input/output card for a programmable controller, characterized in that an address signal line for inputting a bit address signal that determines an upper address of 8 and a lower address of 8 is connected to a power supply via a resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985150656U JPH0313767Y2 (en) | 1985-09-30 | 1985-09-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985150656U JPH0313767Y2 (en) | 1985-09-30 | 1985-09-30 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6257804U true JPS6257804U (en) | 1987-04-10 |
| JPH0313767Y2 JPH0313767Y2 (en) | 1991-03-28 |
Family
ID=31066990
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985150656U Expired JPH0313767Y2 (en) | 1985-09-30 | 1985-09-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0313767Y2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60140105U (en) * | 1984-02-23 | 1985-09-17 | 日本電気精器株式会社 | Expansion base address setting circuit |
-
1985
- 1985-09-30 JP JP1985150656U patent/JPH0313767Y2/ja not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60140105U (en) * | 1984-02-23 | 1985-09-17 | 日本電気精器株式会社 | Expansion base address setting circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0313767Y2 (en) | 1991-03-28 |
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