JPS624885B2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a gain control circuit.

In AM radio receivers, etc., in order to obtain a constant detection output over a wide range of input signal level changes, the output from the intermediate frequency amplification stage (1F stage) and high frequency amplification stage (RF stage) is In many cases, gain control is performed using the AGC signal, but excessive gain control in the intermediate frequency amplification stage may cause waveform distortion.

Therefore, an object of the present invention is to provide a gain control circuit in which gain control is not performed excessively.

To achieve the above purpose, when the AGC signal becomes large and the amplifier gain decreases to a preset value, no matter how much the AGC signal is increased, the amplifier gain will never be below the preset value. This was done to ensure that it did not become substantive.

That is, according to the present invention, the transistor is composed of first and second transistors whose emitters are commonly connected, and a first and second resistor whose one end is individually connected to the collector of these transistors and whose other end is commonly connected to the power supply. a differential amplifier that receives an input signal at the base of one of the two transistors and generates an output voltage from the collector of either transistor; the collector is connected to the common emitter and the base is connected to a reference voltage; and a third resistor, one end of which is connected to the emitter of this third transistor and the other end of which is grounded, and controlled between the base and emitter of the third transistor. a first bias current supply circuit that, upon receiving a DC signal, supplies the differential amplifier with a controlled bias current that varies from a maximum value to a minimum value depending on the circuit configuration; and a collector connected to the common emitter. A fourth transistor whose base is supplied with a reference voltage and a fourth resistor whose one end is connected to the emitter of the fourth transistor and whose other end is grounded. a second bias current supply circuit that supplies a bias current to the differential amplifier; and detecting and smoothing the output voltage of the differential amplifier that operates using the sum of the controlled bias current and the constant bias current as a bias current. There is obtained an automatic gain control circuit characterized in that it is equipped with a detection and smoothing means for obtaining a DC voltage and a transistor amplifier for amplifying the DC voltage and outputting the amplified DC voltage as the controlled DC signal.

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram partially showing an embodiment of the gain control circuit of the present invention using blocks. In the figure, transistors Q ₁ and Q ₂ are combined with resistors R ₁ and R ₂ to form a differential amplifier 1.
Q ₃ and transistor Q ₄ are combined with resistors R ₃ , R ₄ , R ₅ and the like to form a bias current supply circuit for the differential amplifier 1, respectively. The input signal applied from the terminal 2 is differentially amplified by the differential amplifier 1. The amplified signal is transmitted from the load R _L to the detection circuit 3 via the coupling capacitor C and is detected. Terminal 4 is its detection output terminal. On the other hand, the DC voltage detected and smoothed by the detection circuit 3 is taken out as an AGC voltage, and the DC voltage that has been detected and smoothed by the detection circuit 3 is taken out as an AGC voltage.
Added to base terminal 6 of Q ₅ . The DC voltage generated at terminal 6 that performs the gain control operation increases as the input signal increases, eventually causing transistor _Q5 to conduct. Since the emitter of transistor Q ₅ is coupled to the emitter of transistor Q ₃ via resistor R ₃ , the emitter current of transistor Q ₅ flows through resistor R ₄ , reducing the collector current of transistor Q ₃ and thus reducing the difference. The gain of the dynamic amplifier 1 decreases due to the decrease in bias current, and a gain control operation is performed. Then, as the input signal increases further, the current flowing through transistor _Q3 eventually becomes zero, and no gain control operation is performed. The gain of the differential amplifier 1 at this time becomes a value determined by the current of the transistor _Q4 . Note that a circuit consisting of resistors R ₆ , R ₇ .R ₈ and diodes D ₁ , D ₂ , and D ₃ constitutes a circuit that applies a reference voltage to the bases of transistors Q ₃ and Q ₄ .

As explained above, by using the circuit of the present invention shown in FIG. 1, it is possible to construct an AGC circuit that can obtain a gain control amount set as required. To explain the above relationship using a mathematical formula, the following formula is a general formula representing the gain Av of a differential amplifier when taking out a single-ended output.

A _v =qI/4kTR _L (1) where I represents the current of the differential amplifier and R _L represents the load resistance. Note that q, k, and T are symbols representing elementary charge, Boltzmann's constant, and absolute temperature, respectively.

Now _, if the currents flowing through the _collectors of transistor Q ₃ and transistor Q ₄ are respectively I _Q3 and I _Q4 , the gain A _v1 of the differential amplifier 1 in FIG. _Q4 )/4kT×R _L (2). And the gain control is working well,
The gain A _v1 ' of the differential amplifier when the collector current I _Q3 of the transistor Q ₃ becomes 0 is expressed as A _v1 =q(I _Q4 )/4kTR _L (3). Therefore, the gain control amount is given by the following equation from equations (1) and (2).

A _v1 /A _v1 '=I _Q3 +I _Q4 /I _Q4 (4) For example, by changing the current ratio of transistor Q ₃ and transistor Q ₄ by changing the characteristics of the two transistors, we can change the resistance value of the two resistors R ₄ and R ₅ . By changing the ratio and selecting a ratio of 10:1, a gain control amount of about 20.8 dB can be obtained from equation (4).

FIG. 2 shows another embodiment of the gain control circuit according to the present invention, and parts having the same movements as those in FIG. 1 are given the same symbols. In FIG. 2, when the signal applied to the input terminal 2 of the differential amplifier 1 constituted by transistors Q ₁ and Q ₂ is small, the signal is applied to the connection 5 by the detection circuit 3 as explained in FIG. 1. The generated AGC voltage is also small, and the above differential amplifier has a gain given by equation (2), but
When the input signal increases and transistor Q ₅ operates, the current in transistor Q ₃ decreases and the gain decreases, eventually decreasing to the gain given by equation (3). Note that a reference voltage is formed by resistor _R8 , diodes _Q2 , _Q3 , _D4 , and transistor _Q6 , and
Base current is provided to transistors _Q3 and _Q4 through _R9 and _R10 .

As described above, by using the gain control circuit according to the present invention, it is possible to configure a gain control circuit in which the gain control amount is finally set to a predetermined value. Furthermore, as given by equation (4), since the gain control amount is given by the current ratio of the bias supply circuit, it is effective for use in integrated circuits and the like where the current ratio can be determined with high accuracy.

All of the above explanations are based on bias supply means.
Although a case has been described in which the circuit has one circuit that receives an AGC signal to supply a controlled bias current and one circuit that supplies an uncontrolled bias current, the present invention is not limited to this. For example, two bias current supply circuits controlled by the former AGC signal may be provided, and the transistors (corresponding to _Q5 in Figure 1) constituting the DC amplifier in both circuits may have different values.
If you make the AGC signal conductive, there will be a stage where these two transistors are non-conductive and the gain control is strongly performed, and a stage where one of the two transistors is conductive and the other remains non-conductive and the gain control is weakly performed. It is also possible to operate in three stages: a stage in which both are conductive and no gain control is performed and the gain is fixedly determined only by the bias current supply circuit that does not receive another AGC signal.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing one embodiment of the gain control circuit of the invention, and FIG. 2 is a diagram showing another embodiment of the invention. Explanation of symbols: 1 is a differential amplifier, 3 is a detection circuit,
Reference numeral 5 represents a DC coupling means, Q ₁ and Q ₂ represent transistors forming a differential amplifier, Q ₃ and Q ₄ represent transistors forming a bias current supply circuit, and Q ₅ represents a transistor forming a DC amplifier.

Claims (1)

[Claims] 1 Consisting of first and second transistors whose emitters are commonly connected, and first and second resistors whose one end is individually connected to the collector of these transistors and whose other end is commonly connected to a power supply, the input signal is connected to the a differential amplifier that receives an output voltage at the base of one of the two transistors and emits an output voltage from the collector of one of the transistors;
a third transistor whose collector is connected to the common emitter and whose base is supplied with a reference voltage; and a third resistor whose one end is connected to the emitter of the third transistor and whose other end is grounded;
When receiving a controlled DC signal between the base and emitter of the third transistor, the third transistor supplies the differential amplifier with a controlled bias current that does not vary from a maximum value to a minimum value depending on the circuit configuration. a fourth transistor whose collector is connected to the common emitter and whose base is supplied with a reference voltage; and a fourth transistor whose one end is connected to the emitter of the fourth transistor and whose other end is grounded. a second bias current supply circuit configured with a resistor that supplies a constant bias current depending on the circuit configuration to the differential amplifier; and a second bias current supply circuit that supplies a constant bias current depending on the circuit configuration to the differential amplifier; A detection and smoothing means for detecting and smoothing the output voltage of the differential amplifier that operates as a current to obtain a DC voltage, and a transistor amplifier for amplifying the DC voltage and outputting it as the controlled DC signal. Features an automatic gain control circuit.