JPS5484956A - Automatic gain control circuit - Google Patents

Automatic gain control circuit

Info

Publication number
JPS5484956A
JPS5484956A JP15245977A JP15245977A JPS5484956A JP S5484956 A JPS5484956 A JP S5484956A JP 15245977 A JP15245977 A JP 15245977A JP 15245977 A JP15245977 A JP 15245977A JP S5484956 A JPS5484956 A JP S5484956A
Authority
JP
Japan
Prior art keywords
gain
trq
gain control
differential amplifier
amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15245977A
Other languages
Japanese (ja)
Other versions
JPS624885B2 (en
Inventor
Eiichi Matsumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15245977A priority Critical patent/JPS5484956A/en
Publication of JPS5484956A publication Critical patent/JPS5484956A/en
Publication of JPS624885B2 publication Critical patent/JPS624885B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE: To establish the control circuit in which the gain control is not performed excessively, by constituting the circuit so that the gain can not be less than the set value even with the signal increased more, when AGC signal is greater and the gain of amplifier is lowered to the set value.
CONSTITUTION: The transistors TRQ1, Q2 constitute the differential amplifier together with resistors R1 and R2, and transistor TRQ3 and Q4 constitute the bias supply circuit for the differential amplifier 1 together with resistors R3 to R5. On the other hand, althrough the DC voltage detected and smoother with the detector 3 is picked up as AGC voltage, it is fed to the base terminal 6 of TRQ5 constituting DC amplifier with the DC coupling means 5. The DC voltage caused at the terminal 6 is increased with the increase of the input signal, the collector current of TRQ3 is decreased, the gain of the differential amplifier 1 is lowered with the reduction of bias current, performing the gain control operation.
COPYRIGHT: (C)1979,JPO&Japio
JP15245977A 1977-12-20 1977-12-20 Automatic gain control circuit Granted JPS5484956A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15245977A JPS5484956A (en) 1977-12-20 1977-12-20 Automatic gain control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15245977A JPS5484956A (en) 1977-12-20 1977-12-20 Automatic gain control circuit

Publications (2)

Publication Number Publication Date
JPS5484956A true JPS5484956A (en) 1979-07-06
JPS624885B2 JPS624885B2 (en) 1987-02-02

Family

ID=15540971

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15245977A Granted JPS5484956A (en) 1977-12-20 1977-12-20 Automatic gain control circuit

Country Status (1)

Country Link
JP (1) JPS5484956A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63198383U (en) * 1987-06-05 1988-12-21

Also Published As

Publication number Publication date
JPS624885B2 (en) 1987-02-02

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