JPH0113453Y2 - - Google Patents

Description

[Detailed explanation of the invention] (a) Industrial application field This invention is based on the IF (intermediate frequency)
This paper relates to improvements in amplifier circuits, and in particular to IF amplifier circuits suitable for direct connection to AM detection circuits. (B) Prior Art There is a circuit as shown in FIG. 1 that directly connects the IF amplifier circuit and AM detection circuit of an AM radio receiver. In FIG. 1, 1 includes an IF amplifier circuit including first and second transistors 4 and 5 whose emitters are commonly connected via resistors 2 and 3, 6 includes a detection transistor 7 and a detection capacitor 8,
obtained at the collector of the second transistor 5
AM detection circuit for AM detection of IF output signal, 9
is an output terminal from which a detection output signal is obtained; 10 is an integrating circuit consisting of a resistor 11 and a capacitor 12; and 13 is an output terminal to which the output signal of the integrating circuit 10 is applied.
This is an AGC (automatic gain control) circuit. Input terminal 14
The IF signal applied to the second transistor 5 is differentially amplified by the IF amplifier circuit 1, and the amplified IF signal is generated at the collector of the second transistor 5. The amplified IF signal is detected by the AM detection circuit 6 and transmitted from the output terminal 9 to a subsequent circuit (not shown).
The signal is applied to the AGC circuit 13 via the RF (radio frequency) amplification circuit and the IF amplification circuit to perform gain control. The circuit shown in FIG. 1 has the advantage that it can be easily integrated into an IC (integrated circuit) because the load of the IF amplifier circuit 1 is constituted by a resistor 15 and there are few external components. However, in the circuit shown in FIG. 1, when the current flowing through the constant current source 16 is increased in order to increase the gain of the IF amplifier circuit 1, the voltage drop across the resistor 15 serving as the load also becomes large, and the circuit operates at a low power supply voltage. The disadvantage is that it cannot be done. For example, ignoring the emitter resistances of the first and second transistors 4 and 5, the current flowing through the constant current source 16 is
I ₀ and the value of the resistor 15 serving as the load is R, then the above
The gain A of the IF amplifier circuit 1 is A=qRI ₀ /4KT. However, q is the electron charge, K is Boltzmann's constant, and T
is the absolute temperature and q/KT = 1/26mV. Therefore, in order to improve distortion, the gain is increased, for example, A
If A = 20 (26 dB), the voltage drop (RI ₀ /2) at the resistor 15 will be approximately 1V, and if A = 30, the voltage drop will be approximately 1.6V. Moreover, in the circuit of FIG. 1, the DC voltage obtained at the output terminal 9 is
V _CC −RI ₀ /2 − V _BE (where V _BE is the voltage between the base and emitter of the transistor, and V _CC is the power supply voltage), and when this is used as the AGC voltage, the term RI ₀ /2 is a differential connection. This has the disadvantage that the offsets of the first and second transistors 4 and 5 caused by the oscillations vary, and the AGC characteristics deteriorate. On the other hand, AM radio receivers with improved characteristics
As an IF amplifier circuit, the one shown in FIG. 2 has been proposed. The circuit shown in FIG. 2 includes first and second transistors 4 and 5 constituting the IF amplifier circuit 1.
It is characterized in that an LC parallel resonant circuit 17 is used as the load, and the LC parallel resonant circuit 17 is
Since the DC impedance is zero, there is no voltage drop in the load, and it can be operated with a low power supply voltage. Further, the DC voltage obtained at the output terminal 9 is V _CC -V _BE , and when this is used as the AGC voltage, there are few fluctuation factors, so there is an advantage that deterioration of the AGC characteristics is prevented. However, in the circuit of FIG. 2, the LC parallel resonant circuit 17 cannot be integrated into an IC, so the circuit is not suitable for integration into an IC, and if other parts are integrated into an IC,
This had the disadvantage that an expensive LC parallel resonant circuit had to be externally attached, which increased the cost of the entire circuit and halved the value of IC implementation. (c) Purpose of the invention The present invention was created in view of the above points, and aims to provide an IF amplifier circuit that has good characteristics, can be easily integrated into an IC, and can be directly connected to an AM detection circuit. It is something. (d) Structure of the invention The IF amplifier circuit according to the invention includes: a differential amplifier section consisting of a pair of transistors; a first current inversion circuit for inverting the collector current of one transistor of the pair of transistors; a second current inversion circuit that inverts the collector current of the other transistor; a third current inversion circuit that inverts the output current of the second current inversion circuit;
and a load resistor having one end connected to the common output terminal of the third current inversion circuit, a reference power supply connected to the other end of the load resistor, and between one end of the load resistor and the base of the other transistor. It is configured by a DC negative feedback path connected thereto and an output terminal connected to one end of the load resistor. (e) Embodiment Figure 3 is a circuit diagram showing an embodiment of the present invention.
18 and 19 are first and second transistors whose emitters are commonly connected via emitter resistors 20 and 21, respectively, and perform a differential amplification operation; 22 is a diode-connected third transistor 23 and a fourth transistor;
a first transistor 24, which inverts and extracts the collector current of the first transistor 18;
a current inversion circuit, 25 is a diode-connected fifth circuit;
A second current inverting circuit includes a transistor 26 and a sixth transistor 27, and inverts and extracts the collector current of the second transistor 19; 28 is a diode-connected seventh transistor 29 and an eighth transistor;
a third current inverting circuit which inverts and takes out the output current of the second current inverting circuit 25 ; one end of which is connected to the common output terminal of the first and third current inverting circuits 22 and 28 ; voltage at the end
A load resistor 33 connected to a reference power supply 32 of V _A
36 includes a resistor 34 and a capacitor 35 and connects one end of the load resistor 31 to the base of the second transistor 19; 36 includes a resistor 37 and a capacitor 38, and connects the DC voltage of the reference power source 32; A bias path for applying a bias voltage to the base of the first transistor 18, 39 is an output terminal of the IF amplifier circuit, 40 is a detection transistor 41
and a detection capacitor 42, for AM detection of the IF signal obtained at the output terminal 39.
A detection circuit, 43 is an AGC circuit to which a detection output signal is applied via an integrating circuit consisting of a resistor 44 and a capacitor 45, and 46 is an output terminal from which a detection output terminal signal is obtained. In a no-signal state, the current flowing through the emitter current sources 47 of the first and second transistors 18 and 19 is _I0 , and the first and second transistors 18
Assuming that the base bias voltages of transistors 18 and 19 are equal and the circuit is balanced, the collector currents of the first and second transistors 18 and 19 will be equal to I ₀ /2. The collector current I ₀ /2 of the first transistor 18 is inverted by the first current inverting circuit 22 and is transferred from the collector of the fourth transistor 24.
A current of I ₀ /2 is supplied to output point P. On the other hand, the collector current I ₀ /2 of the second transistor 19 is inverted twice by the first and second current inverting circuits 25 and 28 , and is then inverted twice by the collector of the eighth transistor 30.
A current of I ₀ /2 is drawn from output point P. Therefore, at the output point P, the supplied current and the attracted current are equal, and the voltage at the output point P is
The voltage V _A of the reference power supply 32 is maintained. Reference power supply 3
A voltage V _A of 2 is applied as a bias voltage to the base of the first transistor 18 through the bias path 36, and a voltage V _A of equal value is applied from the output point P to the second
Since it is applied as a bias voltage to the base of transistor 19, the bias relationship is kept constant. However, due to unbalance in the manufacturing process between the first and second transistors 18 and 19 that are differentially connected, and variations in the inversion ratios of the first to third current inversion circuits 22 to 28, the fourth transistor 24 The current supplied to output point P from
If the current drawn from the output point P by the transistor 28 does not match, the current flows through the load resistor 31, causing a voltage drop across the load resistor 31. Therefore, the voltage drop generated across the load resistor 31 is applied to the base of the second transistor 19 via the DC negative feedback loop 33 , so that the collector currents of the fourth and eighth transistors 24 and 30 match. Negative feedback control is performed. For example, if the collector current of the fourth transistor 24 is
When the collector current becomes larger than zero, a current flows from the output point P into the load resistor 31, and the base voltage of the second transistor 19 increases. Therefore, the collector current of the second transistor 19 becomes large, and the second
As the current flowing through the third current inverting circuits 25 and 28 becomes large, the collector current of the first transistor 18 becomes small, and the current flowing through the first current inverting circuit 22 becomes small. The collector currents of 24 and 30 become equal, and the voltage at the output point P is equal to the voltage V _A of the reference power supply 32.
is equal to Conversely, when the collector current of the fourth transistor 24 becomes smaller than the collector current of the eighth transistor 30, current flows from the reference power supply 32 to the load resistor 31, and the base voltage of the second transistor 19 decreases, causing negative feedback. As a result, the voltage at the output point P becomes equal to the voltage V _A of the reference power supply 32. Therefore, in the embodiment of FIG.
The DC voltage of is always equal to the reference voltage V _A ,
A stable bias state can be maintained. When the IF signal is applied to the input terminal 48, the first
A difference occurs between the base voltages of the second transistors 18 and 19, and a collector current flows according to the difference between the base voltages. The first transistor 1 at that time
If the collector current of the transistor 8 is I ₁ =I ₀ /2+ΔI, and the collector current of the second transistor 19 is I ₂ =I ₀ /2−ΔI, then the collector current of the fourth transistor 24 is
I ₁ and the collector current of the eighth transistor 30 is I ₂ . Therefore, the current flowing through the load resistor 31 is I ₃
= I ₁ - I ₂ = 2ΔI, and the output potential at the output point P is V _P if the resistance value of the load resistor 31 is R.
= RI ₃ = 2RΔI. Therefore, by increasing the value of the load resistor 31, an IF amplifier circuit with high gain can be obtained, and an IF amplifier circuit with improved distortion factor can be provided. The output signal obtained at the output point P is applied to the base of the detection transistor 41 of the AM detection circuit 40, and a detection output signal is generated at the output terminal 46. Further, the detection output signal is applied to the AGC circuit 43 via an integrating circuit consisting of a resistor 44 and a capacitor 45, and is used for AGC. AM detection circuit 4
0 and AGC circuit 43 are the same as those used conventionally, and the details are omitted. (f) Effects of the invention As described above, the invention has the advantage of providing an IF amplifier circuit with high gain and low distortion that can be directly connected to an AM detection circuit. Further, even if the value of the load resistor 31 is increased in order to obtain a high gain, there is no DC voltage drop across the load resistor 31, so there is an advantage that the device can be operated with a low power supply voltage. Further, the AGC reference voltage is a value obtained by subtracting the base-emitter voltage V _BE of the detection transistor 41 from the voltage V _P at the output point P, and
Since V _P is fixed to the reference voltage V _A , there is an advantage that variations in the AGC reference voltage can be reduced. Furthermore, the low-pass filter capacitors 35 and 38 inserted into the DC negative feedback path and bias path can be shared with the capacitors used in the FMIF amplifier circuit, so there is no substantial increase in the number of external pins or external components. It is possible to provide an IF amplification circuit that is suitable for IC implementation without increasing the number of ICs. Note that the resistor 37 and capacitor 38 inserted into the bias path 36 may be omitted depending on the circuit design.

[Brief explanation of drawings]

1 and 2 are circuit diagrams showing a conventional IF amplifier circuit, and FIG. 3 is a circuit diagram showing an embodiment of the present invention. Explanation of main figure numbers, 18...first transistor,
19...second transistor, 22 , 25 , 28 ...
...Current inversion circuit, 31...Load resistance, 33 ...DC negative feedback path.

Claims (1)

[Scope of utility model registration request] A differential amplifying section consisting of a pair of transistors for amplifying an intermediate frequency signal applied to the base of one transistor, and a first differential amplifying section for inverting and extracting the collector current of one transistor of the differential amplifying section.
a current inverting circuit, a second current inverting circuit for inverting and extracting the collector current of the other transistor of the differential amplifier section, and a third current inverting circuit for inverting the output current of the second current inverting circuit; a load resistor, one end of which is connected to a common connection terminal of the output terminal of the first current inversion circuit and the output terminal of the third current inversion circuit; a reference power supply connected to the other end of the load resistance; and the load. a direct current negative feedback path connected between one end of the resistor and the base of the other transistor;
an output terminal connected to one end of the load resistor, and a detection circuit can be directly connected to the output terminal.