JPS6244695B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a solid-state imaging device using a photoconductor layer containing at least Se and As.

Although solid-state imaging devices have the characteristics of being small, lightweight, and do not require high voltage, they have drawbacks such as resolution, light sensitivity, and blooming. These difficulties are due to the structure of solid-state imaging devices.

A solid-state imaging device having a photoconductive layer to which the present invention is applied will be described below.

A solid-state imaging device has a plurality of solid-state elements each having a photoelectric conversion function and a signal accumulation function, each solid-state element corresponds to one pixel to form an imaging surface, and external video information is acquired by sequentially scanning this imaging surface. It converts the signal into an electrical signal. FIG. 2 shows an example of the configuration, and in this example, each pixel 14
are arranged in a matrix and read out one point at a time using the XY addressing method. Selection of each pixel is performed by a horizontal scanning signal generator 10 and a vertical scanning signal generator 12. 13 is a switch section connected to each pixel, and 15 is an output end.

There are several methods of configuring the horizontal scanning signal generator and vertical scanning signal generator, that is, the scanning circuit section, as described below.

The first method uses a shift register, an example of which is shown in FIG.

This is a two-phase dynamic shift register composed of a pair of inverter circuits and a pair of delay circuits, and stable operation can be obtained regardless of the phase of the clock pulse that shifts the scanning pulse. When the start pulse V _IN is input, shift pulses V ₀₁ , V ₀₂ , . . . are sequentially output from each bit terminal in synchronization with the clock pulse CP2.

The second is CCD (Charge-Coupled)
For example, the arrangement is shown in FIG. 11, and is applied to a solid-state imaging device. Here, 50 is a horizontal clock terminal, 51
52 is a vertical clock terminal, 52 is an output horizontal transfer register, 53 is a vertical transfer gate, 54 is a vertical analog transfer register, and 55 is a picture element portion which is a combination of a diffusion region and a MOS type switch using this as a source. The operation of a solid-state imaging device using such a CCD scanning circuit is as follows. When light hits the light receiving section through the transparent electrode, carriers induced by this optical signal are generated by applying a voltage to the gate electrode between the diffusion region in the light receiving section 55 and the vertical analog transfer register 54. The data is transferred to the vertical transfer register 54. The vertical transfer register is a CCD driven through a two-phase vertical clock terminal 51.
The signals are sent one column at a time to the output horizontal transfer register 52 through the vertical transfer gate 53. This horizontal transfer register is also a CCD driven through a two-phase horizontal clock terminal 50, and charges corresponding to the signal are sent to the output and taken out as a signal output. The frequency of the two-phase drive may be selected so that the transfer of the horizontal transfer register is completed within the period of the voltage pulse applied to the vertical transfer gate.

Next, a conventional example of a solid-state imaging device in which a photoconductor layer forming an imaging surface is formed so as to cover a photoconductor base on which a switch, a scanning circuit, etc. are formed will be described.

Such solid-state imaging devices are known, for example, from Japanese Patent Application Laid-open No.
- As reported in Publication No. 10715, etc., as shown in Figure 1, a scanning circuit and a switch circuit are integrated on a Si substrate 1, and a photoconductive thin film 8 that plays the role of photoelectric conversion is deposited on the Si substrate. It is something. The operating principle will be explained with reference to FIG. 1. Incident light 10 reaches photoconductive film 8 through transparent electrode 9. Here, the light is absorbed to produce electron-hole pairs, and these carriers are accumulated in the electrode 7 by the bias voltage V _T . The accumulated carriers are composed of a source 2, a drain 3, and a gate 4 formed on a semiconductor substrate 1.
It is switched by the MOSFET and taken out to the outside through the signal line 5. 6 is an insulating film. In this structure, the scanning circuit and photoelectric conversion section are separated, so not only does it not cause a decrease in resolution or photosensitivity, but it also has the characteristic that blooming is less likely to occur because light does not reach the Si substrate.

The solid-state image sensor whose cross-sectional view is shown in Figure 1 is
First, a scanning circuit and a switch circuit are formed on a Si substrate, and then a Se--As--Te amorphous thin film is formed by vacuum evaporation. The photoconductive film 8 made of this amorphous thin film is first formed by forming an Se--As layer containing 10% by weight or less of As, then forming a Se--As--Te layer, and finally removing the Se--As layer under vacuum. It is formed by vapor deposition. Here, since the aforementioned MOSFET is formed on the Si substrate,
There are considerable unevenness. The size of the step on the SiIC substrate is 1 to 2 μm, and the thickness of the photoconductive thin film formed thereon is 2 to 4 μm. Therefore, a discontinuous portion of the photoconductive film occurs at the stepped portion of the SiIC substrate. This discontinuous portion acts as a pinhole when attaching the transparent electrode 9 and causes a short circuit. This appeared as a white scratch on the TV monitor as a defect in the image sensor, reducing the image quality. Therefore, it was absolutely necessary to overcome this difficulty in order to fully utilize the above-mentioned features of the present device.

The present invention is extremely useful for obtaining a solid-state imaging device that eliminates the above-mentioned drawbacks.

In order to achieve the above object, the present invention provides at least Se and
During or after forming a photoconductor layer containing As,
The photoconductor layer is flattened by heat-treating the photoconductor layer at a temperature higher than its softening point, and a light-transmitting conductive layer is formed on the photoconductor film including the photoconductor layer. Eliminating layer discontinuities, TV
This eliminates white scratch defects that appear on the monitor. The heat treatment temperature is preferably 50° C. or higher, and more preferably 120° C. or lower so that the material constituting the photoelectric layer does not change in quality. The atmosphere during heating may be nitrogen, rare gas, air, or the like. Also,
The photoconductor materials containing Se and As are as follows:
Generally, a material containing 50% by weight or more of Se is used.

The present invention will be explained in detail below with reference to Examples.

Embodiment 1 FIGS. 3 to 8 are cross-sectional views of a pixel portion showing a method of manufacturing a solid-state imaging device of the present invention. The switch circuit, scanning circuit section, etc. formed on the semiconductor substrate are manufactured using normal semiconductor device processes. A thin SiO ₂ film of about 800 Å is formed on the p-type silicon substrate 20, and a Si ₃ N ₄ film of about 1400 Å is formed on this SiO ₂ film. SiO ₂ film is produced by normal CVD method,
The Si ₃ N ₄ film was produced by CVD using Si ₃ N ₄ , NH ₄ , and N ₂ . Next, the above-mentioned region where the oxide film 22 is to be formed.
The Si ₃ N ₄ film is removed, and ion implantation is performed from above the silicon substrate using the remaining Si ₃ N ₄ film as a mask to form a p-diffusion region 21. This diffusion region 21 was provided to better isolate each element. Next, silicon is locally oxidized in an atmosphere of H ₂ :O ₂ =1:8 to form a SiO ₂ layer 22 .
This oxidation step is performed with the remaining Si ₃ N ₄ film still attached. Since oxidation does not progress in the remaining area of the Si ₃ N ₄ film, the above-mentioned
When the Si ₃ N ₄ film and the SiO ₂ film are removed, the state shown in FIG. 3 is obtained. This method is a local oxidation method of silicon for element isolation, generally called LOCOS. Thereafter, a gate insulating film of the MOS transistor is formed of an SIO ₂ film, and a gate portion 25 of polysilicon is formed on this gate insulating film. Next, diffusion regions 26 and 27 are formed, and a SiO ₂ film 28 is further formed on the diffusion regions 26 and 27. Then, holes for the electrodes of the source 26 and drain 27 are opened in this film by etching. FIG. 4 shows this state. As the drain electrode 29, Al is deposited to a thickness of 8000 Å. Furthermore, a SiO ₂ film 30 is formed to a thickness of 7500 Å, and then Al is deposited to a thickness of 1 μm as a source electrode 31. FIG. 5 is a sectional view showing this state. Note that the electrode 31 was formed widely so as to cover the regions 26 and 27 and the gate portion. This is because if light enters the signal processing region between the element isolation diffusion layers 21, it will cause blooming, which is undesirable.

As shown in FIG. 5, after a switch MOS transistor or the like is formed on a semiconductor substrate 20, the surface of the semiconductor substrate becomes uneven. Subsequently, a light receiving section is formed above this MOS transistor section. FIG. 10 shows a plan view of the Si base portion. 37
is a contact hole for an electrode. Note that the steps up to this point are all steps before forming the photoconductive layer.

On the semiconductor substrate thus prepared, an Se--As layer 32 containing 5% by weight of arsenic is formed to a thickness of 3 μm. In this embodiment, since the photoconductor layer is heat-treated after being formed, the temperature during formation may be below the softening point. In this state, as shown in FIG. 6, the surface of the Se--As layer is not flat, reflecting the unevenness of the IC substrate. Next, this substrate was subjected to heat treatment at 110° C. for 5 minutes in a nitrogen gas atmosphere. Applicable
Since the softening point of the Se--As layer is about 70°C, this heat treatment softens the layer and flattens it as shown in FIG. After this, a Se-As-Te layer 33 (0.05 μm) and a Se-As layer 34 (0.02 μm) are successively deposited by vacuum evaporation, and then a transparent electrode 35 is deposited by a well-known method.
was formed. The transparent electrode may be an extremely thin film of gold or the like, or a NESA film formed at a low temperature. Further, a mesh-like metal film or the like may be used as a light-transmitting electrode. Finally, a conductor film 36 in ohmic contact is placed on the other surface of the semiconductor substrate 20.
will be established. Generally, the conductive film 36 is grounded through a terminal.

This example is Se-As layer, Se-As-Te layer, Se-As
Although this is an example of a solid-state imaging device in which the photoconductive film is composed of three layers, it can be applied to solid-state imaging devices in which the photoconductive film is composed of not only a single layer but also multilayers of four or more layers. It goes without saying that there is. This means that
The same applies to the following examples.

Embodiment 2 As in Embodiment 1, a switch circuit, a scanning circuit section, etc. are formed on a semiconductor substrate. FIG. 5 is a sectional view of the base body showing this state. Next, arsenic was added to 8
A Se--As layer 32 having a thickness of 1 μm is formed. For the same reason as in Example 1, the temperature during formation may be at or below the softening point. The semiconductor substrate thus prepared is heat treated in air at 150° C. for 3 minutes. After this, in the same manner as in Example 1,
A Se--As--Te layer 33 and a Se--As layer 34 are deposited by vacuum evaporation, and then a transparent electrode 35 is formed. Finally, similarly to the first embodiment, an ohmic contact conductor film 36 is provided on the other surface of the semiconductor substrate 20.

Example 3 As in Example 1, a switch circuit, a scanning circuit, etc. are formed on a predetermined semiconductor substrate. FIG. 5 is a sectional view of the base body showing this state. Then,
Se-As layer (arsenic content 8% by weight or less) 32, Se
-As-Te layer 33 and Se-As layer 34 at a substrate temperature of 60℃
vacuum evaporation in sequence. Then in the vapor deposition equipment
Add heat treatment at 100℃ for 3 minutes. Although the surface of the photoconductive film was planarized to some extent during the previous formation at 60° C., the surface of the photoconductive film was completely planarized in this step. Next, a transparent conductive film was formed to produce a solid-state imaging device.

In the first to third embodiments described above, the shift register illustrated earlier in FIG. 9 was used as the scanning circuit. Of course, the specific circuit configuration of the shift register is not limited to the circuit shown in FIG.

Example 4 This example uses CCD (Charge) as a scanning circuit.
Coupled Device).

FIG. 12 is a sectional view of the CCD transfer area, and FIG. 13 is a sectional view of the pixel portion.

As shown in FIG. 12, electrodes 62 and 63 are formed on a Si substrate 61 with an insulating layer interposed therebetween, and two-phase clock voltages are applied through 64 and 65. This moves the potential well in the Si substrate and transfers charge. FIG. 13 is a cross-sectional view of the light receiving area, that is, the pixel part, where 41 is a diffusion layer;
42 is an insulating layer, 43 is a metal electrode, 44 is a gate,
45 is a photoconductive film, and 46 is a transparent electrode. The CCD transfer area shown in FIG. 12 is formed in succession to this light receiving area. Transparent electrode 46, photoconductive film 4
5. The metal electrode 43 forms a light receiving part, and the switch region for moving the carriers induced here to the transfer region is the part where the gate 44 is located, and the substantial
It forms a MOS switch.

The method for manufacturing the solid-state imaging device of this example is as follows.

Prepare a Si substrate on which a CCD transfer area and a MOS switch part are formed, attach it to a vacuum evaporator, and deposit a Se-As layer (arsenic content: 5% by weight, thickness: 3μ).
m) Form 45. As in Example 1, the temperature during formation may be below the softening point. In this state, the Se-
The surface of the As layer 45 is not flat, reflecting the irregularities of the base. Next, this substrate is placed in a nitrogen gas atmosphere.
Heat treatment was applied at 110°C for 5 minutes. Further, on this flattened Se-As layer 45, a Se-As-Te layer (thickness 0.05 μm) 46 and a Se-As layer (thickness 0.02 μm) are formed.
47 were deposited in succession. A transparent electrode 48 is formed on this photoconductor layer in the same manner as described above. Cr-Au was mask-deposited on a portion of the transparent electrode, and wire bonded thereto to create a bias electrode.

Regarding the operation of the CCD scanning circuit,
This is as explained earlier using FIG. 11.

Example 5 In this example, heat treatment is performed during the formation of the photoconductor layer.

As in the first embodiment, a switch circuit, a scanning circuit, etc. are formed on a predetermined semiconductor substrate. Next, a Se-As layer (arsenic content: 5% by weight) is formed in the same way as in the previous example, but the forming method is to first deposit a 0.3 μm Se-As layer without heating, and then evaporate the substrate.
It was heated to 75° C. and a 3 μm thick Se—As layer similar to that described above was deposited. In this step, the photoconductive film is planarized. After this, the substrate heating is stopped and the Se-As-Te layer and Se
-As layer was deposited. After the vapor deposition was completed, transparent electrodes were formed to obtain a solid-state imaging device. In addition, in the same way
Elements were also fabricated in which a 0.2 μm Se—As layer was deposited without heating, a 2 μm layer was deposited by heating (80° C.), and then a 0.5 μm layer was deposited without heating.

Various explanations have been given above using specific examples, but
A typical example of a solid-state imaging device using a photoconductive film made of an amorphous material containing Se as an essential constituent element is the one disclosed in Japanese Patent Application Laid-Open No. 120611/1983.

A preferred heating method is, for example, irradiation with a lamp (eg, a halogen lamp).

According to the solid-state imaging device of the present invention, which has been explained using the above embodiments, it does not cause white scratches on the TV monitor as seen in conventional devices, and provides extremely high-quality images.
You can get a TV monitor image.

[Brief explanation of the drawing]

Fig. 1 is a cross-sectional view of a conventional solid-state imaging device, Fig. 2 is a diagram showing the principle of a solid-state imaging device, and Fig. 8 is a diagram showing the principle of a solid-state imaging device.
9 is a diagram showing an example of a shift register, FIG. 10 is a plan view of a solid-state imaging device of an embodiment, and FIG. 9 is a diagram showing an example of a shift register.
FIG. 11 is an explanatory diagram of a solid-state imaging device using a CCD as a scanning circuit, FIG. 12 is a sectional view of a CCD transfer area, and FIG. 13 is a sectional view of a light receiving section. In the figure, 10...horizontal scanning signal generator, 1
2... Vertical scanning signal generator, 13... Switch section, 14... Pixel, 15... Output end, 1, 20...
...Semiconductor substrate, 2, 3, 26, 27... Diffusion region, 4, 25... Gate electrode, 22, 28, 30
... Insulating film, 7, 31 ... First conductive layer, 8 ...
Photoconductive thin film, 9,35...transparent electrode.

Claims (1)

[Claims] 1 Forming the photoconductor layer during or after forming at least one photoconductor layer containing at least Se and As formed on the top of a semiconductor substrate having an uneven region on its surface. A method for manufacturing a solid-state imaging device, comprising the steps of performing heat treatment at a temperature equal to or higher than the softening point of a photoconductor, and forming a light-transmitting conductive layer on a photoconductor film including the photoconductor layer.