JPS5926154B2 - solid-state imaging device - Google Patents
solid-state imaging deviceInfo
- Publication number
- JPS5926154B2 JPS5926154B2 JP49076372A JP7637274A JPS5926154B2 JP S5926154 B2 JPS5926154 B2 JP S5926154B2 JP 49076372 A JP49076372 A JP 49076372A JP 7637274 A JP7637274 A JP 7637274A JP S5926154 B2 JPS5926154 B2 JP S5926154B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- solid
- imaging device
- state imaging
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000003384 imaging method Methods 0.000 title claims description 17
- 239000000758 substrate Substances 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 238000006243 chemical reaction Methods 0.000 description 15
- 239000010409 thin film Substances 0.000 description 11
- 239000010408 film Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 206010034972 Photosensitivity reaction Diseases 0.000 description 5
- 230000007423 decrease Effects 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 230000036211 photosensitivity Effects 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- 230000006872 improvement Effects 0.000 description 3
- 239000011159 matrix material Substances 0.000 description 3
- 238000007740 vapor deposition Methods 0.000 description 3
- 239000000969 carrier Substances 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910052959 stibnite Inorganic materials 0.000 description 2
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(III) oxide Inorganic materials [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
Landscapes
- Light Receiving Elements (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Description
【発明の詳細な説明】
本発明は同一半導体単結晶基板上に製作した可視光、に
線、Ｘ線等に感光する感光素子と感光素子からの出力を
時間順次的に選択読み出しをするための走査回路とから
構成される固体撮像装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention provides a photosensitive element sensitive to visible light, solar radiation, X-rays, etc. manufactured on the same semiconductor single crystal substrate, and a method for selectively reading out the output from the photosensitive element in time sequential manner. The present invention relates to a solid-state imaging device including a scanning circuit.
第１図は固体撮像装置の原理的な構成を示すものである
。FIG. 1 shows the basic configuration of a solid-state imaging device.
１、２は水平、垂直用の走査回路であり、通常２〜４相
のクロックパルスＣＰｘ、ＣＰｙを印加することにより
入力パルスＶｓｘ、Ｖｓｙがクロックのもつ一定のタイ
ミング時間ずつシフトした出力パルス列、ＶＯＸ（１）
、ＶＯＸ（２）゜゜゜、Ｖ０ｙ（２）・・・を走査回路
各段の出力線ＯＸ！、７）、０複２）・・・、Ｏｙぃト
Ｏｙ（２）・・・に出力する。Reference numerals 1 and 2 are horizontal and vertical scanning circuits, and by applying clock pulses CPx and CPy of usually 2 to 4 phases, an output pulse train, VOX, in which the input pulses Vsx and Vsy are shifted by a fixed timing period of the clock, is generated. (1)
, VOX(2)゜゜゜, V0y(2)... are output lines OX! of each stage of the scanning circuit. , 7), 0 double 2)..., output to OyitoOy(2)...
このパルス列により光電変換素子３に内含したスイッチ
ング素子を順次開閉し、２次元状に配列された個々の光
電変換素子からの信号をビデオ出力線４の上に取り出す
。光電変換素子からの信号はその上に投影された光学像
に対応するので上記動作により映像信号を取り出すこと
ができる。この種固体撮像装置では高い解像度を得るた
め５００×５００個程度の光電変換素子、スイッチング
素子および走査用の単位回路が必要になる。The switching elements included in the photoelectric conversion element 3 are sequentially opened and closed by this pulse train, and signals from the individual photoelectric conversion elements arranged in a two-dimensional manner are taken out onto the video output line 4. Since the signal from the photoelectric conversion element corresponds to the optical image projected thereon, a video signal can be extracted by the above operation. This type of solid-state imaging device requires about 500×500 photoelectric conversion elements, switching elements, and scanning unit circuits to obtain high resolution.
そのため通常は高集積化が比較的容易でしかも光電変換
素子とスイッチング素子が一光化構造でできるＭＯＳ−
ＬＳＩ技術を用いて製作される。第２図に固体映像ＩＣ
の殆んどの面積を占める光電変換素子の構造を示す。５
、６は水平、垂直の位置を選択するためのＭＯＳスイッ
チングでドレンおよびソースを作る拡散層□、２１と絶
縁酸化膜８を介して設けたゲート電極９、２９で作られ
る。Therefore, high integration is usually relatively easy, and MOS-
Manufactured using LSI technology. Figure 2 shows the solid-state image IC.
This shows the structure of the photoelectric conversion element that occupies most of the area. 5
, 6 are made of gate electrodes 9, 29 provided through an insulating oxide film 8 and diffusion layers □, 21 which form drains and sources by MOS switching for selecting horizontal and vertical positions.
１０は垂直ＭＯＳスイッチのソースを利用した光ダイオ
ードである。10 is a photodiode using the source of a vertical MOS switch.
ＭＯＳシフトレジスタ等を利用した走査回路の出力パル
スＶｏｘ”、Ｖｏｙ（代）が出力線Ｏｘ（代）、Ｏｙ”
を通してＭＯＳスイッチのゲートに同時に印加された位
置のダイオード１０から入射光量に比例して放電してい
た電荷がビデオ電圧１１より充電される。その時の充電
電流が負荷抵抗１２を通してビデオ信号として読み出さ
れる。上記の例のように構成された撮像１Ｃは電子ビー
ム走査を行う従来の撮像管に比較して高い信頼性、小型
、軽量、低消費電力、低電圧駆動という固体化に伴う多
くの利点を有している。The output pulses Vox" and Voy of a scanning circuit using a MOS shift register etc. are the output lines Ox" and Oy".
The video voltage 11 charges the electric charge that had been discharged from the diode 10 simultaneously applied to the gate of the MOS switch in proportion to the amount of incident light. The charging current at that time is read out as a video signal through the load resistor 12. The imaging 1C configured as in the above example has many advantages associated with solid-state construction, such as high reliability, small size, light weight, low power consumption, and low voltage drive compared to conventional image pickup tubes that perform electron beam scanning. are doing.
しかし、現在の撮像管に四敵する解像度を持つ撮像１Ｃ
を製作する場合には前にものべたように５００×５００
個程度あるいはそれ以上の光電変換素子が必要になる。However, the imaging 1C has a resolution rivaling that of current image pickup tubes.
500 x 500 as mentioned before.
2 or more photoelectric conversion elements are required.
２個の光電変換素子を含めた光電変換素子のピツチはプ
ロセス加工の寸法精度を最大限に上げても３０μｍ以下
に押えることは実質上不可能であり、ピツチを３０μｍ
に見積つた場合でも全体では１．５？×１．５ＣＴＩＬ
のチツプサィズを持つた超大型ＬＳＩになる。It is virtually impossible to keep the pitch of photoelectric conversion elements including two photoelectric conversion elements to 30 μm or less even if the dimensional accuracy of process processing is maximized.
Even if you estimate it, the total is 1.5? ×1.5 CTIL
It will be a super large LSI with a chip size of .
さらに現状でのピツチは５０μｍ程度であるから５００
Ｘ５００個を実現する場合２．５（１−JモV！×２．５
ＣｆＬ以上の巨大なチツプサイズになつてしまう。巨大
チツプは当然加工歩留りを低下させる。一方撮像１Ｃの
中で走査回路の領域が占める割合は５００段の回路が縦
横２つの隅に配置されるのみで光電変換素子領域に軽べ
ると１／数１００程度で無視できる程小さい。したがつ
て現在の撮像１Ｃが抱えている大きな問題点は素子間の
ピツチを縮少できるようなデバイス構造を実現すること
と感光素子の簡素化でありこれらは歩留りの向上にも寄
与する。さらにもう１つの問題は二次元状に配列された
ＭＯＳスイツチを相当な面積を占めるため、同一ピツチ
ではその分だけダイオード面積を減らすことが必要にな
る。また縦横に走る配線は当然ダイオード面上も走るた
め光の入射面積が減少する。これらは光感度の低下を招
き、信号の出力が小さくなるため信号対雑音比（Ｓ／Ｎ
比）を落とす原因となつている。したがつて、許された
大きさの中で感光面積を最大にするということは重要な
課題となる。本発明の目的は上述したごとき撮像Ｃの構
造を改良し１個当りの光電変換素子の占める面積が小さ
く、この面積全体が感光部として利用できる簡潔で光感
度の高い固体撮像Ｃを実現することである。本発明は感
光素子として多数の分離したダイオードを用いていた構
造を改め、感光面を撮像１Ｃの最上面に設け、感光材料
として光導電性の薄膜を用いたものである。Furthermore, the current pitch is about 50μm, so 500μm.
When realizing X500 pieces, 2.5 (1-JMoV!×2.5
This results in a huge chip size larger than CfL. Large chips naturally lower processing yields. On the other hand, the area occupied by the scanning circuit in the image pickup 1C is negligibly small, with only 500 stages of circuits arranged in two vertical and horizontal corners, which is about 1/100 times the area of the photoelectric conversion element. Therefore, the major problems faced by the current imaging device 1C are the realization of a device structure that can reduce the pitch between elements and the simplification of photosensitive elements, which also contribute to improving yield. Yet another problem is that the two-dimensionally arranged MOS switches occupy a considerable area, so it is necessary to reduce the area of the diodes by that amount at the same pitch. Furthermore, since the wiring lines running vertically and horizontally also run on the diode surface, the incident area of light decreases. These lead to a decrease in photosensitivity and a decrease in signal output, resulting in a signal-to-noise ratio (S/N).
This is the cause of the decline in the ratio). Therefore, it is an important issue to maximize the photosensitive area within the allowed size. The purpose of the present invention is to improve the structure of the image sensor C as described above, and to realize a simple solid-state image sensor C with high photosensitivity, in which the area occupied by each photoelectric conversion element is small and the entire area can be used as a photosensitive section. It is. The present invention changes the structure of using a large number of separate diodes as photosensitive elements, provides a photosensitive surface on the uppermost surface of the imaging device 1C, and uses a photoconductive thin film as the photosensitive material.
以下本発明の構造および製造法を実施例を用いて説明す
る。The structure and manufacturing method of the present invention will be explained below using Examples.
第３図ａは本発明による固体撮像装置の断面構造である
。FIG. 3a shows a cross-sectional structure of a solid-state imaging device according to the present invention.
１３は例えば第２図における垂直ＭＯＳスイツチのソー
スに接続された電極、１４は光導電性薄膜で電極１３と
は導通するが、ゲート電極９，２９等とは酸化膜８を介
して絶縁されている。For example, 13 is an electrode connected to the source of the vertical MOS switch in FIG. There is.
１５は透明導電性薄膜、１６は電極１３を取り出すため
の拡散層で例えば上記したように垂直ＭＯＳスイツチ６
のソースにあたる。15 is a transparent conductive thin film, 16 is a diffusion layer for taking out the electrode 13, and for example, as mentioned above, the vertical MOS switch 6
It corresponds to the source of
第３図ａにおいて、第２図と同符号の部分は、同一又は
機能的に同一の部分を示す。In FIG. 3a, parts with the same reference numerals as those in FIG. 2 indicate the same or functionally identical parts.
すなわち、垂直ＭＯＳスイツチ６は、ゲート電極２９と
ソース１６、ドレイン２７とから成る。That is, the vertical MOS switch 6 consists of a gate electrode 29, a source 16, and a drain 27.
水平ＭＯＳスイツチ５は、ゲート電極９とソース２７、
ドレイン７とから成る。以上の構成において、透明導電
性膜１５と接地電位の間にターゲツト電圧１７が印加さ
れる。The horizontal MOS switch 5 has a gate electrode 9, a source 27,
It consists of a drain 7. In the above configuration, a target voltage 17 is applied between the transparent conductive film 15 and the ground potential.
又、第３図ａの装置においては、走ｗ回路部は第２図の
装置と同様であるため、ビデオ電圧１１を抵抗１２を通
して端子７に印加して良い。入射光量に応じた信号は、
電極１３、及びソース１６を介して、垂直ＭＯＳスイツ
チ６及び、水平ＭＯＳスイツチ５の両者が導通している
場合のみ読み出される。信号は、第２図と同様にドレイ
ン７から引出線４を介し、抵抗によつて読み出しうる。Furthermore, in the device of FIG. 3a, the video voltage 11 may be applied to the terminal 7 through the resistor 12, since the running circuit section is the same as that of the device of FIG. The signal according to the amount of incident light is
Data is read only when both the vertical MOS switch 6 and the horizontal MOS switch 5 are conductive via the electrode 13 and source 16. The signal can be read out from the drain 7 via the lead line 4 by a resistor, as in FIG.
基板電位も第２図と同様に接地しておく。The substrate potential is also grounded as in FIG.
また、第３図ｂは同図ａの固体撮像装置を上からみた場
合の基板面の平面図である。Moreover, FIG. 3b is a plan view of the substrate surface when the solid-state imaging device of FIG. 3a is viewed from above.
電極１３が二次元的に配列されている。電極１３は、た
とえばＳｂ２Ｓ３，ＣｄＳ，ＡＳ２Ｓｅ３、多結晶Ｓｉ
ｌ非晶質Ｓｉ等光導電性を示す結晶性或いは非晶質の物
質からなる光導電性薄膜１４を介して透明導電性電極１
５との間に容量を形成する。電極パターンは第３図ｂに
示すようにマトリツクス状に分離して置かれているため
、容量がマトリツクス状に配置されたことになる。この
容量は間に導電性薄膜を介しているため感光素子として
働くことになり画素を形成する。感光素子を等価回路で
表わせば、光の強度によつて電気抵抗の変わる可変抵抗
Ｒと容量Ｃで表わすことができ第４図に示したようにな
る。容量Ｃの大きさは電極面積Ｓと光電導性薄膜１４の
膜厚ｔと誘電率εで決まりｃ一且十笠で表わされる。ま
た抵抗の大きさはその位置の電極面に入射する光の強度
に反比例し、光が全く当たらない場合は光伝導性薄膜の
種類にもよるが一般にＲ＝らとなる。透明電極１５には
ターゲツト電圧１７（ＶＴ）が印加されているので１フ
イールドの間に光の当たらない部分の容量はそのままの
ビデオ電圧Ｖを保持する。Electrodes 13 are arranged two-dimensionally. The electrode 13 is made of, for example, Sb2S3, CdS, AS2Se3, polycrystalline Si.
A transparent conductive electrode 1 is formed through a photoconductive thin film 14 made of a crystalline or amorphous substance exhibiting photoconductivity such as amorphous Si.
A capacitance is formed between 5 and 5. Since the electrode patterns are separated and arranged in a matrix as shown in FIG. 3b, the capacitors are arranged in a matrix. Since this capacitor has a conductive thin film in between, it functions as a photosensitive element and forms a pixel. If the photosensitive element is represented by an equivalent circuit, it can be represented by a variable resistance R whose electrical resistance changes depending on the intensity of light and a capacitance C, as shown in FIG. The size of the capacitance C is determined by the electrode area S, the thickness t of the photoconductive thin film 14, and the dielectric constant ε, and is expressed by c1 and 10. Further, the magnitude of the resistance is inversely proportional to the intensity of light incident on the electrode surface at that position, and when no light hits the electrode surface, generally R = 0, although it depends on the type of photoconductive thin film. Since a target voltage 17 (VT) is applied to the transparent electrode 15, the capacitance of the portion not exposed to light during one field maintains the same video voltage V.
光の当たる部分はその強度に応じて抵抗Ｒが小さくなる
ので、容量Ｃに貯えられる電圧は光量に応じて大きくな
る。１フイールド期間に充電された電圧をＶＴとすれば
、選択の際第２図における説明と同様の動作により、Ｉ
Ｖ−Ｖ′ＴＩに相当した放電（或いは充電）電流が流れ
放電（或いは次電）が完了すると電極１５は再びＶにり
セツトされる。Since the resistance R of the portion exposed to light decreases according to its intensity, the voltage stored in the capacitor C increases according to the amount of light. If the voltage charged during one field period is VT, I
A discharge (or charge) current corresponding to V-V'TI flows, and when the discharge (or next charge) is completed, the electrode 15 is reset to V again.
なお、ターゲツト印加電圧の正負の違いにより、信号読
み出し側に蓄積されるキヤリアの種類（電子又は、正孔
）によつて充電、放電の差異を生じる。この時の放電（
或いは充電）電流がこのフイールドに対応したビデオ信
号となる。第３図ｂに示した電極マトリツクス１８は走
査回路を含めて従来と全く同様のＭＯＳプロセスで製作
すればよく、例えば同図では説明の便宜上、従来例（第
２図）の垂直ＭＯＳスイツチのソースに電極１３を接続
する構造を紹介したが、この他にもＭＯＳスイツチの配
置、走査の方法により種種の構造を取り得る。Note that due to the difference in positive and negative voltages applied to the target, charging and discharging differ depending on the type of carrier (electrons or holes) accumulated on the signal readout side. The discharge at this time (
(or charging) current becomes a video signal corresponding to this field. The electrode matrix 18 shown in FIG. 3b, including the scanning circuit, can be manufactured using the same MOS process as the conventional one. Although the structure in which the electrodes 13 are connected to each other has been introduced, various other structures can be obtained depending on the arrangement of the MOS switches and the scanning method.
光導電性薄膜１４は電極の上に蒸着法或はスパツタ法等
で一面に付着すればよく、膜厚は固体撮像装置に要求さ
れる感度および必要な容量値に応じて蒸着時間等を制御
すればよい。前述した光導電性材料のなかでシリコンは
、次の理由で極めて好ましい材料である。The photoconductive thin film 14 may be deposited all over the electrode by a vapor deposition method, a sputtering method, etc., and the film thickness should be controlled by controlling the vapor deposition time, etc. according to the sensitivity and capacitance required for the solid-state imaging device. Bye. Among the photoconductive materials mentioned above, silicon is a highly preferred material for the following reasons.
（１）耐熱性に優れている。(1) Excellent heat resistance.
温度上昇に伴なう結晶化反応が生じにくい。（２）走査
回路を構成する半導体基板は一般にシリコン基板が使用
されるが、光導電材料にシリコンを用いるとこの基板と
同種、同系統の材料であり装置の信頼性を高め得る。Crystallization reactions are less likely to occur as the temperature rises. (2) A silicon substrate is generally used as the semiconductor substrate constituting the scanning circuit, but if silicon is used as the photoconductive material, it is a material of the same type and family as the substrate, and the reliability of the device can be improved.
（３）前述に併記したたとえばＳｂ２Ｓ３，ＣｄＳｌＡ
ｓ２ｓｅ３等の如く公害物質を含有せず、公害問題を生
じない。(3) For example, Sb2S3, CdSlA mentioned above
It does not contain polluting substances such as s2se3 and does not cause pollution problems.
透明導電性薄膜１５はＳｎＯ２，Ｉｎ２Ｏ３等を蒸着法
スパツタ法等によりやはり光導電性薄膜の上に一面に付
着すればよく、非常に簡単に製作できる。The transparent conductive thin film 15 can be manufactured very easily by simply depositing SnO2, In2O3, etc. on the entire surface of the photoconductive thin film by vapor deposition, sputtering, or the like.
本発明の固体撮像装置では感光面が不透明電極１３の上
側にある。In the solid-state imaging device of the present invention, the photosensitive surface is above the opaque electrode 13.
つまり感光素子がスイツチや配線等と同一平面上にない
ため感光素子の分だけ面積が減少する、すなわち光変換
素子のピツチが縮少される。しかも感光面が不透明電極
の上側にあるため入射光は電極にさえぎられることなく
有効に感光面に入射する。ピツチの縮少は解像度の向上
とともにチツプサイズの縮少つまりは歩留りの向上につ
ながり、入射光が有効に利用できることは光感度の向上
につながる。また、本発明の如く、透光性電極側にター
ゲツト電圧が印加される如く装置を構成することにより
、次の如き利点が生ずる。In other words, since the photosensitive element is not on the same plane as the switch, wiring, etc., the area is reduced by the amount of the photosensitive element, that is, the pitch of the light conversion element is reduced. Moreover, since the photosensitive surface is above the opaque electrode, the incident light is effectively incident on the photosensitive surface without being blocked by the electrode. A reduction in pitch leads to an improvement in resolution and a reduction in chip size, which in turn leads to an improvement in yield, and the effective use of incident light leads to an improvement in photosensitivity. Furthermore, by configuring the device so that a target voltage is applied to the transparent electrode side as in the present invention, the following advantages arise.
透光性電極側にターゲツト電圧を印加することにより、
光導電体膜内に加わる実効的な電界が高くなる。By applying a target voltage to the transparent electrode side,
The effective electric field applied within the photoconductor film becomes higher.
この結果、（１）光導電体膜内で発生するキヤリアの走
行時間が短かくなり、再結合で消滅するキヤリアが減少
する。As a result, (1) the travel time of carriers generated within the photoconductor film is shortened, and the number of carriers that disappear due to recombination is reduced.
従つて、光感度が高くなる。（２）容量Ｃに貯えること
のできる電荷量が大きくなるため、ダイナミツクレンジ
が高くなる。Therefore, the photosensitivity becomes high. (2) Since the amount of charge that can be stored in the capacitor C increases, the dynamic range increases.
蓄積可能な最大電荷量（ＱＭＡＸ）はＱＭＡＸ＝Ｃ・（
ＶＴ−ＶＶ）
で表わされるが、ＶＴを大ならしめることができる。The maximum amount of charge that can be stored (QMAX) is QMAX=C・(
VT-VV), but it is possible to increase VT.
（３）焼付けが減少する。(3) Burning is reduced.
以上実施例を用いて詳細に説明したように本発明の撮像
１Ｃはサイズが小型で歩留りが高く、光感度が高い、解
像度が高い等その実用上の価値は極めて大きい。As described above in detail using the embodiments, the imaging device 1C of the present invention is small in size, has a high yield, has high photosensitivity, high resolution, and has extremely great practical value.
又、ビデオ電圧は必ずしも必要ではないが、これを使用
することにより次の如き利点を生ずる。（１）出力線に
寄生する浮遊容量を１／３〜１／５に減少させることが
出来、解像度の劣化防止およびランダム雑音の低減を図
り得る。Further, although a video voltage is not necessarily required, its use brings about the following advantages. (1) Stray capacitance parasitic to the output line can be reduced to 1/3 to 1/5, thereby preventing deterioration of resolution and reducing random noise.
（２）固体撮像素子で映した画面をみると、白や黒の薄
い縦縞が見られる。(2) When looking at a screen captured by a solid-state image sensor, thin vertical stripes of white and black can be seen.
この雑音は画面上に固定して見えるので人間の目につき
易く固定パターン雑音（ＦｉｘｅｄＰａｔｔｅｒｎＮＯ
ｉｓｅ）と呼ばれている。ビデオ電圧の印加によつて、
この固定パターン雑音を減少せしめ得る。なお実施例で
は走査回路および電極マトリツタスの製作にＭＯＳ電界
効果トランジスタを用いて説明したが、本発明の趣旨を
逸脱しない範囲で接合型電介効果トランジスタ、バィボ
ーラ型トランジスタＣＣＤ（ＣｈａｒｇｅＣＯｕｐｌｅ
ｄＤｅｒｉｃｅ）ＳＢＢＤ（ＢｕｃｋｅｔＢｒｉｇａｄ
ｅＤｅｒｉｃｅ）、或いはＣＩＤ（ＣｈａｒｇｅＩｎｊ
ｅｃｔｉＯｎＤｅｒｉｃｅ）等を構成要素として走査回
路を構成できることはもちろんである。This noise appears fixed on the screen, so it is easily noticeable to humans and is called fixed pattern noise (FixedPatternNO).
ise). By applying video voltage,
This fixed pattern noise can be reduced. In the embodiment, a MOS field effect transistor was used to fabricate the scanning circuit and the electrode matrices, but a junction type field effect transistor, a bibolar type transistor CCD (Charge COuple
dDerice)SBBD(BucketBrigad)
eDerice) or CID (ChargeInj)
Of course, a scanning circuit can be constructed using components such as ectiOnDerice).
さらに本発明では感光素子の材料として光伝導性物質を
用いたがその他種々の感光物質を利用できることはもち
ろんである。Further, in the present invention, a photoconductive substance is used as the material of the photosensitive element, but it goes without saying that various other photosensitive substances can be used.
第１図は従来の固体撮像装置の構成、第２図は従来の光
電変換素子の断面構造、第３図ａは本発明による固体撮
像装置の構造、同図ｂは同図ａを上から見た電極パター
ンの平面図、第４図は本発明の光電変換素子を説明する
等価回路図である。
１・・・・・・水平走査回路、２・・・・・・垂直走査
回路、３・・・・・・光電変換素子、４・・・・・・ビ
デオ出力線、ＣＰｘ，ＣＰｙ・・・・・・クロツクパル
ス、Ｖｓｘ，ｓｙ・・・・・・入力パルス、０ｘ（Ｎ）
，０ｙ（Ｎ）・・・・・・走査回路の出力線、５・・・
・・・水平ＭＯＳスイツチ、６・・・・・・垂直ＭＯＳ
スイツチ、７，２７・・・・・・ドレインおよびソース
拡散層、８・・・・・・絶縁酸化膜、９，２９・・・・
・・ゲート電極、１０・・・・・・光ダイオード、１１
・・・・・・ビデオ電圧、１２・・・・・・負荷抵抗、
１３・・・・・・電極、１４・・・・・・光伝導性薄膜
、１５・・・・・・透明導伝性薄膜、１６・・・・・・
電極取り出し用拡散層、１７・・・・・・ターゲツト電
圧、１８・・・・・・電極の二次元状パターン、Ｓ・・
・・・・電極の面積、Ｃ・・・・・・容量、Ｒ・・・・
・・可変抵抗。Fig. 1 shows the configuration of a conventional solid-state imaging device, Fig. 2 shows the cross-sectional structure of a conventional photoelectric conversion element, Fig. 3a shows the structure of the solid-state imaging device according to the present invention, and Fig. 3b shows Fig. FIG. 4 is an equivalent circuit diagram illustrating the photoelectric conversion element of the present invention. 1... Horizontal scanning circuit, 2... Vertical scanning circuit, 3... Photoelectric conversion element, 4... Video output line, CPx, CPy... ...Clock pulse, Vsx, sy...Input pulse, 0x(N)
,0y(N)... Output line of the scanning circuit, 5...
...Horizontal MOS switch, 6...Vertical MOS
Switch, 7, 27...Drain and source diffusion layer, 8...Insulating oxide film, 9, 29...
...Gate electrode, 10...Photodiode, 11
...Video voltage, 12...Load resistance,
13... Electrode, 14... Photoconductive thin film, 15... Transparent conductive thin film, 16...
Diffusion layer for electrode extraction, 17...Target voltage, 18...Two-dimensional pattern of electrodes, S...
... Electrode area, C ... Capacity, R ...
...Variable resistance.
Claims (1)
も１つの半導体スイッチと、該スイッチの１端子側に電
気的に接続され画素毎に設けられた電極と、該電極上に
設けられた光導電膜と、該光導電膜上に設けられた透光
性電極とを有し、該透光性電極にターゲット電圧を印加
し、かつ、上記スイッチの他端子を介して信号を取り出
すことを特徴とする固体撮像装置。 ２ 前記光導電膜がシリコン光導電膜なることを特徹と
する特許請求の範囲第１項記載の固体撮像装置。[Scope of Claims] 1. At least one semiconductor switch provided on a semiconductor substrate corresponding to one pixel, an electrode electrically connected to one terminal side of the switch and provided for each pixel, and on the electrode The switch has a photoconductive film provided on the switch, and a transparent electrode provided on the photoconductive film, and a target voltage is applied to the transparent electrode, and a signal is applied via the other terminal of the switch. A solid-state imaging device characterized by taking out. 2. The solid-state imaging device according to claim 1, wherein the photoconductive film is a silicon photoconductive film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP49076372A JPS5926154B2 (en) | 1974-07-05 | 1974-07-05 | solid-state imaging device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP49076372A JPS5926154B2 (en) | 1974-07-05 | 1974-07-05 | solid-state imaging device |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57047202A Division JPS57181278A (en) | 1982-03-26 | 1982-03-26 | Solid-state image pickup device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5110715A JPS5110715A (en) | 1976-01-28 |
| JPS5926154B2 true JPS5926154B2 (en) | 1984-06-25 |
Family
ID=13603502
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP49076372A Expired JPS5926154B2 (en) | 1974-07-05 | 1974-07-05 | solid-state imaging device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5926154B2 (en) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS551152A (en) * | 1978-06-19 | 1980-01-07 | Matsushita Electric Ind Co Ltd | Method of fabricating photoconducting element |
| JPS54147730A (en) * | 1978-05-12 | 1979-11-19 | Victor Co Of Japan Ltd | Color television camera using solidstate pick up element |
| FR2433871A1 (en) | 1978-08-18 | 1980-03-14 | Hitachi Ltd | SEMICONDUCTOR IMAGE FORMING DEVICE |
| JPS5556671A (en) * | 1978-10-20 | 1980-04-25 | Matsushita Electric Ind Co Ltd | Photoelectric converter |
| FR2469805A1 (en) * | 1979-11-09 | 1981-05-22 | Thomson Csf | MATRIX FOR DETECTION OF ELECTROMAGNETIC RADIATION AND RADIOLOGICAL IMAGE ENHANCER COMPRISING SUCH A MATRIX |
| JPS56103477A (en) * | 1980-01-21 | 1981-08-18 | Hitachi Ltd | Photoelectric conversion element |
| JPS56129379A (en) * | 1980-03-12 | 1981-10-09 | Matsushita Electric Ind Co Ltd | Solid image-pickup element and manufacture |
| JPS58177086A (en) * | 1982-04-10 | 1983-10-17 | Sony Corp | Solid-state image pickup element |
| JPH07115184A (en) * | 1993-08-24 | 1995-05-02 | Canon Inc | Layer-built solid-state image pickup device and its manufacture |
| JPH07335935A (en) * | 1994-06-07 | 1995-12-22 | Canon Inc | Manufacture of optoelectric transducer |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3445589A (en) * | 1964-07-03 | 1969-05-20 | Emi Ltd | Electrical scanning apparatus |
-
1974
- 1974-07-05 JP JP49076372A patent/JPS5926154B2/en not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3445589A (en) * | 1964-07-03 | 1969-05-20 | Emi Ltd | Electrical scanning apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5110715A (en) | 1976-01-28 |
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