JPH04281681A - X-y address type solid-state image pickup device - Google Patents

Abstract

PURPOSE:To attain the electronic shutter operation without a time lag for all picture elements and to eliminate the need for light shield of a capacitor section in the X-Y address solid-state image pickup device. CONSTITUTION:Each of a photosensor section 10 in the unit of picture elements is made up of a photoelectric conversion element 11 storing a signal charge in response to an incident light, a 1st switch element 13 resetting the storage state of the photoelectric conversion element 11, a charge storage element 14, a 2nd switch element 15 transferring the signal charge stored in the photoelectric conversion element 11 to the change storage element 14 and a 3rd switch element 12 reading a charged charge of the charge storage element 14, and a stack structure capacitor is used for the charge storage element 14 and the storage output of the capacitor is read as X and Y axes outputs.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an XY-addressed solid-state imaging device, and more particularly to an X-Y-addressed solid-state imaging device suitable for use as a solid-state imaging device capable of electronic shutter operation.

0002

[Prior Art] An XY address type solid-state imaging device (X
, Y), a scanning pulse is applied to one pixel addressed by the coordinate, and a signal is extracted. As this XY address type solid-state imaging device, a MOS type solid-state imaging device and the like are known. In this MOS type solid-state imaging device, Fig. 4
As shown in FIG. 2, the photosensor section 40 of the unit pixel was formed by a combination of a photodiode 41, which is a photoelectric conversion element, and a MOS transistor 42 for signal readout.

0003

[Problem to be solved by the invention] In this way, the conventional M
Since OS-type solid-state imaging devices and the like have only one location for accumulating signal charges generated by photoelectric conversion in the photodiode 41, it is not possible to accumulate and read out signal charges independently. without, therefore
When a so-called electronic shutter operation is performed, the shutter operation is performed for each pixel, so there is a problem in that the timing of the shutter operation differs for each pixel.

On the other hand, as shown in FIG. 5, a stacked MOS type solid-state imaging device having a stacked film 44 with a metal film 43 interposed therebetween is provided with a storage capacitor 45 made of a PN junction diode. However, since there is no switching element between the photocarrier and the laminated film 44 where photocarriers are generated, electronic shutter operation is still impossible, and if light is incident, it will result in a false signal, so light shielding is required, especially on the back side of the substrate. The so-called back-illuminated type, which takes in light from the outside, has the disadvantage that it is difficult to block this light. Further, when the bias voltage to the laminated film 44 is turned on and off, the electronic shutter operation is still impossible due to the trap-like afterimage of the laminated film 44.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide an XY address type solid-state imaging device that is capable of electronic shutter operation without time lag in all pixels and that does not require light shielding of the capacitor section.

[0006]

[Means for Solving the Problems] In the XY address type solid-state imaging device according to the present invention, each of a plurality of photosensor sections arranged two-dimensionally in pixel units in the horizontal and vertical directions is A photoelectric conversion element that stores signal charges in response to light, a first switch element that resets the storage state of the photoelectric conversion element, a storage element, and a signal charge accumulated in the photoelectric conversion element that transfers to the storage element. It is configured by a second switch element and a third switch element that reads out the stored charge of the power storage element, and uses a capacitor with a stacked structure as the power storage element.

[0007]

[Function] In the X-Y address type solid-state imaging device according to the present invention, the signal charge accumulation period in the photoelectric conversion element is controlled by the first switch element, and the signal charge accumulated in the photoelectric conversion element is transferred during the vertical blanking period. A part of the pixel data is transferred to the power storage element for all pixels at the same time by the second switch element to be stocked. The storage element stocked with signal charges and the photoelectric conversion element are electrically isolated by the second switch element. The signal charge stored in the storage element of each pixel is
By performing Y readout, electronic shutter operation without time lag is possible for all pixels. In addition, by using a stacked structure capacitor as a power storage element, in the case of a front-illuminated type, the area is smaller than that of a PN junction capacitor, and the capacitor can be provided on wiring or a MOS transistor. In the case of a back-illuminated type, it can be provided on the photosensor section.

[0008]

Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a configuration diagram showing an embodiment of the present invention applied to, for example, a MOS type solid-state imaging device. In the figure, a photosensor section 10 of a unit pixel has a photodiode 1 between a photodiode 11 which is a photoelectric conversion element and a vertical MOS transistor 12 which is a vertical switch element.
1, a storage capacitor 14 that is a storage element, and a transfer MOS transistor 15 that transfers the signal charge accumulated in the photodiode 11 to the storage capacitor 14. ing. Note that the gate of the reset MOS transistor 13 and the gate of the transfer MOS transistor 15 are configured in common to all pixels.

FIG. 2 is a cross-sectional structural diagram of the photosensor section 10 of a unit pixel. In the figure, a P-type semiconductor substrate 21
A light receiving section is configured by forming an N+ type region 22 on the surface side. N+ type regions 23 and 24 are formed on the left and right sides of the N+ type region 22, respectively.
The reset MOS transistor 13 is configured by the type regions 22 and 23 and the gate electrode 25, and the N+ type region 2
2 and 24 and the gate electrode 26 constitute a transfer MOS transistor 15. An N+ type region 27 is further formed on the right side of the N+ type region 24, and these N+ type regions 27
Vertical MO by mold regions 24, 27 and gate electrode 28
An S transistor 12 is configured. This vertical MOS
A storage capacitor 14 is placed above the transistor 12.
A capacitor with a stacked structure is constructed by stacking the capacitors on top of each other.

In this way, by forming the storage capacitor 14 into a stacked structure, the area is smaller than that of a PN junction capacitor, and moreover, the storage capacitor 14 has a stacked structure.
Since a capacitor can be provided on the (or wiring), there is no need to deteriorate the aperture ratio. As an example, if the signal amount is 105 electrons, in order to store this at 5V, a capacitance C of approximately 3.2 fF is required, and the oxide film thickness of the storage capacitor 14 is set to 105 electrons.
Assuming Å, an area of 1 μm2 is sufficient. On the other hand, in the case of the PN junction structure shown in FIG.
An area of about 2 μm2 is required. In addition, although the cross-sectional structure diagram in FIG. 2 shows a so-called front-illuminated type embodiment in which light is taken in from the front side of the semiconductor substrate 21, in the case of a back-illuminated type, the storage capacitor 14 has a stacked structure. This has a great advantage because the storage capacitor 14 can be stacked on the light receiving section, and since there is no accumulation of false signals due to light, there is no need for light shielding.

Referring again to FIG. 1, in a MOS solid-state imaging device having such a configuration of photosensor sections 10 for each pixel, a large number of photosensor sections 10 of unit pixels are two-dimensionally arranged in the horizontal and vertical directions. Cage, vertical MOS
The gate of the transistor 12 is connected to the X line 19, the source thereof is connected to the Y line 20, and the vertical scanning circuit 1
6 is applied to the gate of the vertical MOS transistor 12 in units of rows (line), thereby performing vertical scanning. Further, at the end of the Y line 20, a horizontal MOS transistor 17, which is a horizontal switch element, is connected.
is connected to the horizontal MOS transistor 17 in each column.
is sequentially switched from left to right in the horizontal direction by the horizontal scanning circuit 18, thereby performing horizontal scanning.

Next, the electronic shutter operation in the photosensor section 10 of the unit pixel will be explained based on the timing chart of FIG. In addition, in the same figure, the waveform (
a) is the gate potential G of the reset MOS transistor 13
1, waveform (b) shows the output potential V1 of the photodiode 11, waveform (c) shows the gate potential G2 of the transfer MOS transistor 15, and waveform (d) shows the output potential V2 of the storage capacitor 14. Within one field period, reset MOS transistor 1
The photodiode 11 accumulates photocarriers (signal charges) during the period in which the gate potential G1 (a) of No. 3 is at the "L" level, that is, during the shutter open period. Subsequently, when the gate potential G2 (c) of the transfer MOS transistor 15 is set to the "H" level for a certain period in the vertical blanking period, the transfer MOS transistor 15 is turned on and the signal charge accumulated in the photodiode 11 is transferred. The data is transferred to the storage capacitor 14. After the gate potential G2 (c) of the transfer MOS transistor 15 transitions to “L” level, the gate potential G1 (c) of the reset MOS transistor 13 changes to “L” level.
By setting a) to “H” level, photodiode 1
1 to the reset state. Then, the output potential V2 of the storage capacitor 14 is read out in XY during the read period within one field period. Note that since the MOS type is a so-called destructive readout, when the readout is finished, the storage capacitor 14 is in a reset state.

[0013]

[Effects of the Invention] As explained above, according to the present invention,
In the X-Y address type solid-state imaging device, a first switch for resetting the power storage state of the photoelectric conversion element is provided between the photoelectric conversion element and the readout switch element for each of the plurality of photosensor parts provided in the unit pixel. an element, a storage element,
Since it is configured with a second switch element that transfers the signal charge accumulated in the photoelectric conversion element to the storage element, XY readout can be performed using one field period, and electronic shutter operation without time lag can be performed on all pixels. This has the effect of In addition, by using a stacked structure capacitor as a power storage element, in the case of a front-illuminated type, the area is smaller than that of a PN junction capacitor.
Since a capacitor can be provided on the OS transistor, the aperture ratio does not deteriorate, and in the case of a back-illuminated type, there is no accumulation of false signals due to light, so there is an effect that no light shielding is required.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram showing an embodiment of the present invention applied to a MOS type solid-state imaging device.

FIG. 2 is a cross-sectional structural diagram of a photosensor section of a unit pixel.

FIG. 3 is a timing chart for explaining electronic shutter operation.

FIG. 4 is a configuration diagram showing a conventional example of a MOS type solid-state imaging device.

FIG. 5 is a cross-sectional structural diagram of a stacked MOS solid-state imaging device.

[Explanation of symbols]

10, 40 Photo sensor section 11, 41 Photodiode 12 Vertical MOS transistor 13 Reset MOS transistor 14 Storage capacitor 15 Transfer MOS transistor 17 Horizontal MOS transistor

Claims (1)

[Claims] 1. Each of a plurality of photosensor sections two-dimensionally arranged in pixel units in the horizontal and vertical directions includes a photoelectric conversion element that accumulates a signal charge according to incident light, and the photoelectric conversion element a first switching element for resetting the storage state of the storage element; a storage element; a second switching element for transferring the signal charge accumulated in the photoelectric conversion element to the storage element; and a second switching element for reading out the storage charge of the storage element. 1. An XY address type solid-state imaging device, characterized in that the XY address type solid-state imaging device is configured with a switch element of No. 3, and a capacitor having a stacked structure is used as the power storage element.