JPS5892262A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5892262A
JPS5892262A JP56191239A JP19123981A JPS5892262A JP S5892262 A JPS5892262 A JP S5892262A JP 56191239 A JP56191239 A JP 56191239A JP 19123981 A JP19123981 A JP 19123981A JP S5892262 A JPS5892262 A JP S5892262A
Authority
JP
Japan
Prior art keywords
substrate
detection element
transistor
semiconductor device
sensing element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56191239A
Other languages
Japanese (ja)
Other versions
JPS6322624B2 (en
Inventor
Kunihiro Tanigawa
谷川 邦広
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56191239A priority Critical patent/JPS5892262A/en
Publication of JPS5892262A publication Critical patent/JPS5892262A/en
Publication of JPS6322624B2 publication Critical patent/JPS6322624B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14643Photodiode arrays; MOS imagers
    • H01L27/14649Infrared imagers

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Photometry And Measurement Of Optical Pulse Characteristics (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To obtain a semiconductor device of a structure wherein In metallic poles are unnecessitated by a method wherein an infrared ray detection element and a charge coupling device (CCD) transferring the detection signal are formed monolithically into the same substrate in a continuous process. CONSTITUTION:On a detection element substrate constituted by forming the infrared ray detection element 102 on a compound semiconductor substrate 2 in a matrix form, a thin film transistor 103 is formed via an insulatin film in a matrix form in opposition to the detection element, the transistor 103 and the detection element 102 are electrically connected each other, and, on the substrate, the wiring to read the infrared ray detection signal is connected to the transistor resulting in a monolithic formation. On the detection element substrate, a scanning circuit of the infrared ray detection element wherein a thin film transistor is used is monolithically provided. Thereby, the reliability of a device improves, and the device which detects the detection element signal is formed by using amorphous Si, thereby obtaining the titled device at low cost.

Description

【発明の詳細な説明】 (1)発明の技術分野 本発明は半導体装置、特に赤外線検知装置の改良に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to improvements in semiconductor devices, particularly infrared detection devices.

(2)技術の背景 インジウムアンチモン(In8b)のような赤外線に高
感度な化合物半導体材料を用いて赤外線検知素子をアレ
イ状に配設し、該検知素子で得られた信号をシリコン(
si)基板を用いて形成した電荷結合装置(COD)に
よシ外部に転送する半導体装置はすでに周知である。
(2) Background of the technology Infrared sensing elements are arranged in an array using a compound semiconductor material that is highly sensitive to infrared rays, such as indium antimony (In8b), and the signals obtained by the sensing elements are transmitted using silicon (
si) Semiconductor devices in which data is transferred to the outside by a charge-coupled device (COD) formed using a substrate are already well known.

(8)従来技術と間層点 このような半導体装置の従来の構造を第1図に示す0図
示するようK例えば赤外線に高感度なI n 8 b 
o7i板1上に所定のパターンでr型の不純物が導入さ
れPN接合が形成されて赤外線検知素子が多数形成され
ている。一方N型の81基板2にはCODが形成され、
該CODの入力ダイオードのP型領埴8とIn8b基板
lに形成され九F−N接合部のP型領埴4とfXt*の
金属柱6を周込て結合されている。ここで6はCODの
電荷を転送する転送電極である。
(8) Interlayer point between conventional technology and the conventional structure of such a semiconductor device is shown in FIG. 1. As shown in FIG.
R-type impurities are introduced into the o7i plate 1 in a predetermined pattern to form PN junctions, thereby forming a large number of infrared sensing elements. On the other hand, COD is formed on the N-type 81 substrate 2,
The P-type region 8 of the input diode of the COD is formed on the In8b substrate 1, and is coupled to the P-type region 4 of the nine F-N junction by surrounding the metal pillar 6 of fXt*. Here, 6 is a transfer electrode that transfers the charge of the COD.

つteこのようにして赤外線を検知する検出部は1.赤
外線に高感度を有する化合物半導体基板で形成し、一方
該検出部で得られた検知信号を外部回路に送出するCC
DはI C+L8I等の半導体装置を製造する安定した
工程を用いて8i1&板上に形成し、このようにして得
られた赤外線検知素子とCODとをInの金属柱を用い
て接続することで半導体装置を得ていた。
The detection section that detects infrared rays in this way is 1. A CC formed of a compound semiconductor substrate with high sensitivity to infrared rays, and transmits a detection signal obtained by the detection section to an external circuit.
D is formed on the 8i1& board using a stable process for manufacturing semiconductor devices such as I I had gotten the equipment.

しかしこのような構造の半導体装置はIn金属柱で81
基板とIrxBbl&板とを接続しているので接続箇所
が剥れやすくまたIn金属柱を所定のパターンに形成す
る工程が必要である等欠点が多かった。
However, a semiconductor device with such a structure is made of In metal pillars with 81
Since the substrate and the IrxBbl&plate are connected, there are many drawbacks such as the connection points are likely to peel off and a step of forming the In metal pillars in a predetermined pattern is required.

(4)  発明の目的 本発明は上述した欠点を除去し、前記赤外線を検知する
赤外線検知素子と該検知信号を転送するCODとが同一
基板に一貫した工程で形成され、的述した検知素子とC
CD間とを接続するためのIn金属柱を必要としない構
造の半導体装置の提供を目的とするものである。
(4) Object of the Invention The present invention eliminates the above-mentioned drawbacks, and the infrared sensing element that detects the infrared rays and the COD that transfers the detection signal are formed on the same substrate in a consistent process, and the above-mentioned sensing element and COD are formed in a consistent process. C
The object of the present invention is to provide a semiconductor device having a structure that does not require an In metal pillar for connecting between CDs.

(5)  発明の構成 かかる目的を達成するための本発明の半導体装置は、化
合物半導体基板上に赤外線検知素子をマトリックス状に
形成してなる検知素子基板上に絶縁膜を介して薄膜トラ
ンジスタが前記検知素子に対応してマトリックス状に形
成され。
(5) Structure of the Invention In order to achieve the above object, the semiconductor device of the present invention has a sensing element substrate in which infrared sensing elements are formed in a matrix on a compound semiconductor substrate, and a thin film transistor is disposed on the sensing element substrate via an insulating film. It is formed in a matrix shape corresponding to the elements.

該トランジスタとill紀検知素子とが電気的に接続さ
れ、かつ基板上に赤外線検知信号を読み出すための配線
が前記トランジスタと接続して一体的に形成されて込る
ことを特徴とする屯のである。更には前記検知素子基板
の上方には、薄膜トランジスタを用いた赤外線検知素子
の走査回路が一体的に設けられてbることをも特徴とす
るものである。
The transistor is electrically connected to the illumination detection element, and a wiring for reading an infrared detection signal is integrally formed on the substrate in connection with the transistor. . Furthermore, a scanning circuit for an infrared sensing element using a thin film transistor is integrally provided above the sensing element substrate.

(6)発明O!iIi!施例 以下本発明の一実施例につき図面を用いて詳細に説明す
る。
(6) Invention O! iIi! EXAMPLE Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

第2図は本発明の半導体装置を模式的に示した図で、第
8図は第2図に示した半導体装置のl−に/L/101
の断面図で、第4図は本発明の半導体装置の他の実施例
を示す模式図である。
FIG. 2 is a diagram schematically showing the semiconductor device of the present invention, and FIG. 8 is a diagram showing the semiconductor device shown in FIG.
FIG. 4 is a schematic diagram showing another embodiment of the semiconductor device of the present invention.

まず第2図および第8図に示すようにN型のI n 8
 b Ol板11 上にハ8 i0* ! り ”lk
 b絶縁W412を介して前記1n8b基板11にマト
リックス状に形成された赤外線検知素子lO2で得られ
た検知信号を読み出すためのMOS型の薄膜トランジス
タ10Bが前記検知素子102に対応してマトリックス
状に形成されている。前記検知素子102はトランジス
タ108のソース領櫨18と接続され、一方トランジス
タ10Bのゲート電極14は槓方崗に所定の間隔で基板
上に形成されたアルミニウム[極Yj−1、Yj 、Y
j+、と接続され、またトランジスタのドレイン電[1
5は鍛方i定の間隔で基板上に形成されているアルミニ
ウム電極”l−1+ xi  m x農+1とそれぞれ
接続され、これらアルミニウム電極Yj−1+ Yj 
+ ”J+1 * xl−1e xl + X141に
よってマトリックス状のパターンを形成している。
First, as shown in FIGS. 2 and 8, N-type I n 8
b Ol board 11 Ha8 i0*! ri”lk
MOS type thin film transistors 10B are formed in a matrix shape corresponding to the sensing elements 102 for reading out detection signals obtained from the infrared sensing elements 102 formed in a matrix shape on the 1n8b substrate 11 via the b insulation W412. ing. The sensing element 102 is connected to the source region 18 of the transistor 108, while the gate electrode 14 of the transistor 10B is connected to aluminum electrodes formed on the substrate at predetermined intervals.
j+, and the drain voltage of the transistor [1
5 are respectively connected to aluminum electrodes Yj-1+ Yj formed on the substrate at regular intervals, and these aluminum electrodes Yj-1+ Yj
+"J+1*xl-1e xl+X141 forms a matrix pattern.

次に該半導体装置の製造方法について第2図、第8図を
用いて述べる。
Next, a method for manufacturing the semiconductor device will be described with reference to FIGS. 2 and 8.

まずN型In8bの化合物半導体基板11には、所定の
パターンでr型の不純物Oベリリウム(Be)’11が
イオン注入されてP型領域16が形成され、このように
してPN接合ダイオード形式の多数の赤外線検知素子l
O2のマトリックス配列を具えた検知素子基板が得られ
る。
First, an r-type impurity O beryllium (Be)' 11 is ion-implanted into an N-type In8b compound semiconductor substrate 11 in a predetermined pattern to form a P-type region 16. infrared sensing element l
A sensing element substrate with a matrix array of O2 is obtained.

更に該検知素子基板上Ka絶絶縁として二酸化yリコン
膜12が化学蒸着(cvn )法によって形成されてい
る。
Furthermore, a y-licon dioxide film 12 is formed as a Ka insulation on the sensing element substrate by a chemical vapor deposition (CVN) method.

一方該8i0!膜12上に薄膜トランジスタ108形成
用として7オスフイン(PHs)を添加シタモノシフン
(8iH,) ガスのプラズマCvD法等によってN型
のアモルファス81の結晶層が5〜20μmの厚さで形
成される。ここで該アモルファス81の結晶の粒子を増
大せしめ良好な結晶とするために例えばイットリウムー
アμミニウムーガーネット(YAG)をレーザ媒体とし
た固体レーザを用いてアモルファスsi層をレーザアニ
−μしても良い。
On the other hand, 8i0! A crystalline layer of N-type amorphous 81 is formed to a thickness of 5 to 20 μm on the film 12 by a plasma CVD method using a PHs gas to form a thin film transistor 108 . Here, in order to increase the grain size of the amorphous 81 crystal and make it a good crystal, for example, the amorphous Si layer may be laser annealed using a solid laser using yttrium-aluminium-garnet (YAG) as a laser medium. good.

次に該基板上にゲート酸化膜となる8i0.膜が化学蒸
着法等によって形成され九後、前記N型のア壁μファス
81膜へあとでM2B5の薄ン注入される。その後該グ
ーF酸化膜となる810mm1および不純物を添加した
アモルファス81膜がデフズマエッチング法で所定のパ
ターンに形成される。第2図、第8図で18はこのよう
にして形成された薄膜トランジスタのソース領域で、1
6はドレイン領域で17はゲート酸化膜である。その後
S iOl膜12に下部のIn8b基板のP型領槍16
と接続をとるための接続孔がホトリソグフフイ法、ブフ
ズマエッチング法等を用いて形成され、該基板上に接続
孔を介して上の薄膜トランジスタと接続をと番ための金
−クロム層(Au−Cjr)18とまたソーヌ領埴と繭
記赤外線検知素子のP型領域16とを接続するためのム
lのソース電極用配線膜19とゲート電極用配線膜20
、ドレイン電極用配線WI21を形成するためにAI金
属膜が蒸着によって形成されたのち、所定のパターンに
ホFリソグフフイ法、プフズマエッチング法で形成され
る。
Next, a gate oxide film of 8i0. After the film is formed by chemical vapor deposition or the like, a thin M2B5 implant is later applied to the N-type awall .mu.fas 81 film. Thereafter, 810 mm1 of the Goo F oxide film and an amorphous 81 film doped with impurities are formed into a predetermined pattern by defusma etching. In FIGS. 2 and 8, 18 is the source region of the thin film transistor formed in this way;
6 is a drain region and 17 is a gate oxide film. After that, the P-type region 16 of the lower In8b substrate is applied to the SiOl film 12.
A contact hole for making a connection with the substrate is formed using a photolithography method, a Buchsma etching method, etc., and a gold-chromium layer (Au-Cjr) is formed on the substrate to make a connection with the upper thin film transistor through the contact hole. ) 18 and also a wiring film 19 for a source electrode and a wiring film 20 for a gate electrode for connecting the P-type region 16 of the Saone region and the Mayuki infrared sensing element.
After an AI metal film is formed by vapor deposition to form the drain electrode wiring WI21, it is formed into a predetermined pattern by a photolithography method or a Puchsma etching method.

このようにして半導体装置を形成すれば、赤外線検知素
子を形成したIn8bの検知素子基板上に一貫して検知
素子からの信号を読み出すMOS型の薄膜トフンジスタ
が形成され、このようにすれば従来の半導体装置の構造
におけるようにIn8b基板に形成した赤外線検知素子
と81基板上に形成したCODとをI−金属柱を用いて
接続するような複雑な構造をとらなくて済み、またIn
8bの検知素子基板上に形成する薄膜トフンジスタはア
モルファスsilを利用して構成しているため従来のよ
うに単結晶の81基板上に検知素子からの信号を読み出
すCCDを形成する場合に比較してコストの低い半導体
装置が得られる。
If a semiconductor device is formed in this way, a MOS type thin film transistor that consistently reads out signals from the sensing element will be formed on the In8b sensing element substrate on which the infrared sensing element is formed. Unlike the structure of a semiconductor device, there is no need for a complicated structure in which an infrared sensing element formed on an In8b substrate and a COD formed on an In81 substrate are connected using an I-metal pillar.
The thin film transistor formed on the sensing element substrate 8b is constructed using amorphous sil, so compared to the conventional case where a CCD for reading signals from the sensing element is formed on a single crystal 81 substrate. A low-cost semiconductor device can be obtained.

とこでこのような半導体装置の動作について述べる。ゲ
ート電極20に連なる配線Tjとドレイン領域15に連
なる配線Xiにそれぞれある一定電圧をあらかじめ印加
し、赤外線検知素子102をある一定電圧に充電する。
Now, the operation of such a semiconductor device will be described. A certain constant voltage is applied in advance to each of the wiring Tj connected to the gate electrode 20 and the wiring Xi connected to the drain region 15, and the infrared sensing element 102 is charged to a certain constant voltage.

この状態の半導体装置に赤外光が入射されると、光励起
されたキャリアによって赤外線検知素子102に貯えら
れている電荷が放電される。信号を統み出すには、Xi
、Yj  を再びアドレスして、赤外線検知素子102
を充電することによって、とのときに流れる充電電流が
光励起されたキャリアの量に比例することを利用して実
行され、この操作を逐次繰り返すことで像を撮像するこ
とができる。
When infrared light is incident on the semiconductor device in this state, the charges stored in the infrared sensing element 102 are discharged by the photoexcited carriers. To control the signal, Xi
, Yj again, and the infrared sensing element 102
This is done by taking advantage of the fact that the charging current that flows when is proportional to the amount of photoexcited carriers, and images can be captured by sequentially repeating this operation.

以上述べた実施例の他に変形例として第8図に示すよう
にIn8bの検知集子基板11の上部に検知素子を垂直
に走査させる垂直走査回路81せ および水平に走査さする水平回路8食を前記したように
アモルファス81をレーザプニールした材料を用いてM
OS型の薄膜トフンジスタで形成してもよいし、また特
に高速な動作を必要とすゐ水平走査回路のみを81基板
上に形成して、前記したIn8b基板上に形成した赤外
線検知素子群とワイヤポンディングによって接続しても
良い。
In addition to the above-mentioned embodiment, as a modified example, as shown in FIG. As mentioned above, M
It may be formed using an OS-type thin film transistor, or only the horizontal scanning circuit that requires particularly high-speed operation may be formed on the 81 substrate, and the infrared sensing elements and wires formed on the In8b substrate described above may be formed. They may be connected by bonding.

また前記したMOS型のゲート酸化膜を形成する方法と
して70℃程度の低温で810!膜が形成されるイオン
ビームスパッタ法等を用いれば更に良質な8i01膜が
得られ良質なMOB!Iの薄膜Fヲンジスタが得られる
。また前記薄膜トランジスタ形成に用いたアモルファス
81をCvp法によって形成したポリVリコン膜を用い
てもよい。
Further, as a method of forming the above-mentioned MOS type gate oxide film, a low temperature of about 70° C. is used to form the 810° C. If a film is formed using an ion beam sputtering method or the like, a higher quality 8i01 film can be obtained and a higher quality MOB! A thin film F resistor of I is obtained. Alternatively, a polyV silicon film formed by the Cvp method may be used instead of the amorphous film 81 used to form the thin film transistor.

(7)発明の効果 以上述べたように本発明の半導体装置の構造によれば検
知素子を形成するIn5bI&板上に一貫して該検知素
子の信号を検知、走査する回路が形成されるので形成さ
れる装置の信頼度も向上し、また前記検知素子の信号を
検知する装置がアモルファス81を用いて形成されるの
で得られる装置も低コストのものとなる。
(7) Effects of the Invention As described above, according to the structure of the semiconductor device of the present invention, a circuit that consistently detects and scans the signal of the sensing element is formed on the In5bI plate forming the sensing element. The reliability of the device is also improved, and since the device for detecting the signal from the detection element is formed using amorphous 81, the resulting device can also be made at low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図社従来の半導体装置の構造を示す図、第2図およ
び第8図は本発明の半導体装置O−実施例の模式図およ
びその断面図、第4図は本発明の半導体装置0*0*施
例を示す模式図である。 図にオイて、1.11tiN型In8b1&板、2はN
型8i基板、8.4.16はP製鎖域、6はIn金属柱
、6は転送電極、12は旧0s11.18はソース領域
、14はゲート[4i[,15はドレイン電極、17は
ゲート酸化膜、18は金−Or層、19はソース電Wi
配線展、20はゲート電gii!i3線展、21はドレ
イン電極配線膜、101はセp1102は赤外線検知素
子、108は薄膜トフンジヌタ、81は重置走査回路、
82は水平走査回路を示す。 第1図 第2図 第4f21
Figure 1 is a diagram showing the structure of a conventional semiconductor device, Figures 2 and 8 are schematic diagrams and cross-sectional views of a semiconductor device O-embodiment of the present invention, and Figure 4 is a diagram showing the structure of a semiconductor device 0* of the present invention. It is a schematic diagram showing a 0* example. In the figure, 1.11tiN type In8b1 & plate, 2 is N
Type 8i substrate, 8.4.16 is P chain region, 6 is In metal column, 6 is transfer electrode, 12 is old 0s11.18 is source region, 14 is gate [4i[, 15 is drain electrode, 17 is Gate oxide film, 18 gold-Or layer, 19 source voltage Wi
Wiring exhibition, 20th is Gate Electric GII! i3 line drawing, 21 is a drain electrode wiring film, 101 is a sep1102 is an infrared detecting element, 108 is a thin film connector, 81 is a superposition scanning circuit,
82 indicates a horizontal scanning circuit. Figure 1 Figure 2 Figure 4f21

Claims (1)

【特許請求の範囲】 (1)  化合物半導体基板上に赤外線検知素子をマト
リックス状に形成してなる検知素子基板上に絶縁膜を介
して検知素子からの信号を読み出す薄膜トランジスタが
前記検知素子に対応してマトリックス状に形成され、該
トランジスタと前記検知素子とが電電的に接続され、か
つ基板上に赤外線検知信号を読み出すための配線が前記
トランジスタと接続して一体的に形成されていることを
特徴とする半導体装置。 (2)  前記検知素子基板の上方には、薄膜トランジ
スタを用いた赤外線検知素子の走査回路が一体的に設け
られていることを特徴とする特許請求の範囲II (1
)項に記載の半導体装置。 (8)  前IElll膜トフンジスタがア七pツァス
シリコンまたはポリシリコンで形成されイいることを特
徴とする特許請求の範囲第(1)項および第(2)項に
記載の半導体装置。
[Scope of Claims] (1) A thin film transistor for reading signals from the sensing elements via an insulating film is provided on a sensing element substrate formed by forming infrared sensing elements in a matrix on a compound semiconductor substrate, corresponding to the sensing elements. The transistor is formed in a matrix shape, the transistor and the detection element are electrically connected, and a wiring for reading an infrared detection signal is formed integrally with the transistor on the substrate. semiconductor device. (2) A scanning circuit for an infrared sensing element using a thin film transistor is integrally provided above the sensing element substrate.
) The semiconductor device described in item 1. (8) The semiconductor device according to claims (1) and (2), characterized in that the first IEll film transistor is formed of amorphous silicon or polysilicon.
JP56191239A 1981-11-27 1981-11-27 Semiconductor device Granted JPS5892262A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56191239A JPS5892262A (en) 1981-11-27 1981-11-27 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56191239A JPS5892262A (en) 1981-11-27 1981-11-27 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5892262A true JPS5892262A (en) 1983-06-01
JPS6322624B2 JPS6322624B2 (en) 1988-05-12

Family

ID=16271209

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56191239A Granted JPS5892262A (en) 1981-11-27 1981-11-27 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5892262A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60198858A (en) * 1984-03-23 1985-10-08 Mitsubishi Electric Corp Solid-state image-pickup element
JPS63299267A (en) * 1987-05-29 1988-12-06 Fuji Photo Film Co Ltd Solid-state image sensing element
JPH02158176A (en) * 1988-12-12 1990-06-18 Matsushita Electric Ind Co Ltd Radiation detector

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60198858A (en) * 1984-03-23 1985-10-08 Mitsubishi Electric Corp Solid-state image-pickup element
JPS63299267A (en) * 1987-05-29 1988-12-06 Fuji Photo Film Co Ltd Solid-state image sensing element
JPH02158176A (en) * 1988-12-12 1990-06-18 Matsushita Electric Ind Co Ltd Radiation detector

Also Published As

Publication number Publication date
JPS6322624B2 (en) 1988-05-12

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