Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JIDO KEISOKU GIJUTSU KENKYUKUMIAI
Original Assignee
JIDO KEISOKU GIJUTSU KENKYUKUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JIDO KEISOKU GIJUTSU KENKYUKUMIAIfiledCriticalJIDO KEISOKU GIJUTSU KENKYUKUMIAI
Priority to JP16272982ApriorityCriticalpatent/JPS5951543A/ja
Publication of JPS5951543ApublicationCriticalpatent/JPS5951543A/ja
Publication of JPS6244416B2publicationCriticalpatent/JPS6244416B2/ja
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
H01L21/76—Making of isolation regions between components
H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit