JPS624392A - Thick film hybrid integrated circuit - Google Patents

Thick film hybrid integrated circuit

Info

Publication number
JPS624392A
JPS624392A JP14366185A JP14366185A JPS624392A JP S624392 A JPS624392 A JP S624392A JP 14366185 A JP14366185 A JP 14366185A JP 14366185 A JP14366185 A JP 14366185A JP S624392 A JPS624392 A JP S624392A
Authority
JP
Japan
Prior art keywords
coating layer
hybrid integrated
protective coating
thick film
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14366185A
Other languages
Japanese (ja)
Inventor
金子 恒雄
康人 斉藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba AVE Co Ltd
Original Assignee
Toshiba Corp
Toshiba Audio Video Engineering Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Audio Video Engineering Co Ltd filed Critical Toshiba Corp
Priority to JP14366185A priority Critical patent/JPS624392A/en
Publication of JPS624392A publication Critical patent/JPS624392A/en
Pending legal-status Critical Current

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  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 [発明の技術分野] 本発明は圧膜混成集積回路に関する。[Detailed description of the invention] [Technical field of invention] The present invention relates to membrane hybrid integrated circuits.

[発明の技術的背景] 近時電子機器の小型、軽」化促進のために、混成集積回
路が多用されつつある。またその中でも特に高周波回路
としては、一般的に以下に示す構造の圧膜混成集積回路
が使用されている。
[Technical Background of the Invention] In recent years, hybrid integrated circuits have been increasingly used to promote the miniaturization and weight reduction of electronic devices. Among them, especially as a high frequency circuit, a pressure membrane hybrid integrated circuit having the structure shown below is generally used.

すなわら、アルミ等のセラミックスからなる絶縁基板上
に、銅などからなる導体ペーストを印刷し、不活性ガス
中で焼成して銅パターンを形成し、実に必要によっては
、ガラス系絶縁ペースト、抵抗ペース1〜等を印刷、焼
成し、厚膜回路を形勢した後、その上へエキポジ樹脂系
あるいはアクリル樹脂系の紫外線(UV)硬化型保護コ
ートを印刷、硬化し、IC、コンデンサ等の電子部品を
実装して半田付けし最後に防湿処理としてフェノール系
あるいはウキポジ系樹脂等を用い、ディップ法、流動浸
漬法等により厚膜回路基板全体を樹脂コートを施した構
造の厚膜混成集積回路が用いられている。
In other words, a conductor paste made of copper or the like is printed on an insulating substrate made of ceramics such as aluminum, and then fired in an inert gas to form a copper pattern. After printing and baking Pace 1 to form a thick film circuit, an ultraviolet (UV) curable protective coat made of expository resin or acrylic resin is printed and cured to form electronic components such as ICs and capacitors. A thick film hybrid integrated circuit is used in which the entire thick film circuit board is coated with a resin using a dip method, fluidized dipping method, etc. using a phenolic or Ukiposi resin for moisture-proofing. It is being

しかして従来の圧膜混成集積回路においては、圧膜回路
を構成する銅等のパターンの表面酸化を防ぐために、保
護コートは高温焼成あるいは高温硬化を型材料を用いる
ことができないので、従来一般的にプリント基板のソル
ダーレジスト等として実績のあるエポキシ樹脂系または
アクリル樹脂系の紫外線(UV)硬化型インクを用いて
保護コートを形成することが行なわれている。
However, in conventional pressure film hybrid integrated circuits, in order to prevent surface oxidation of the patterns such as copper that make up the pressure film circuit, the protective coat cannot be baked or cured at high temperatures using the mold material, which is conventionally common. In recent years, a protective coat has been formed using an epoxy resin-based or acrylic resin-based ultraviolet (UV) curing ink that has been used as a solder resist for printed circuit boards.

[背景技術の問題点] しかしながらこのような圧膜混成集積回路においては、
保護被覆層の耐湿性が充分ではないという欠点があった
。すなわらたとえば電子部品の耐湿性能を短時間で評価
するために一般的に行われる加圧加温試験を行った場合
、短時間で保護被覆層に吸湿によるふくれが生じ電気的
に不良になるという問題があった。らなみに、この原因
は保護被覆層の耐湿性が不充分な点によるばかりでなく
保護被覆材料がUv硬化後の塗膜の伸びが充分でない点
にもよるものと考えられ、膨張係数の違いにより保護被
覆層が絶縁基板から剥離しやすく、ざらにこの剥離が吸
湿により加速されることによるものと考えられる。また
上記従来のものは温度サイクル試験を行った場合に、ア
ルミナ基板と樹脂コート材料の膨張係数の差によって樹
脂コート層にクラックが発生しやすいという問題もあっ
た。
[Problems with the background art] However, in such a pressure membrane hybrid integrated circuit,
There was a drawback that the moisture resistance of the protective coating layer was not sufficient. For example, when a pressurized and heated test, which is commonly performed to evaluate the moisture resistance of electronic components in a short period of time, occurs, the protective coating layer swells due to moisture absorption and becomes electrically defective in a short period of time. There was a problem. Incidentally, this is thought to be due not only to the insufficient moisture resistance of the protective coating layer, but also to the fact that the coating film of the protective coating material does not stretch sufficiently after UV curing, and the difference in expansion coefficient This is thought to be due to the fact that the protective coating layer easily peels off from the insulating substrate, and this peeling is roughly accelerated by moisture absorption. Furthermore, the above-mentioned conventional device also had the problem that cracks were likely to occur in the resin coating layer due to the difference in expansion coefficients between the alumina substrate and the resin coating material when a temperature cycle test was performed.

[発明の目的] 本発明はこれらの問題を解決するためになされたもので
、保護被覆層に吸湿によるふくれによる電気的不良を防
止して信頼性の高い圧膜混成集積回路を提供することを
目的とする。
[Object of the Invention] The present invention has been made to solve these problems, and an object of the present invention is to provide a highly reliable pressure-film hybrid integrated circuit by preventing electrical failures caused by blistering of the protective coating layer due to moisture absorption. purpose.

[発明の概要] 本発明の圧膜混成集積回路は、絶縁基板上に圧膜回路を
形成してなる圧膜回路基板上に、保護被覆層を形成する
とともに所定の位置に電子回路部品を実装し、これら電
子部品を含む絶縁基板を合成樹脂で防湿処理してなる圧
膜混成集積回路において、前記保護被覆層をシリコーン
系樹脂で構成することにより、耐湿性および機械的特性
を改良したものである。
[Summary of the Invention] The piezoelectric membrane hybrid integrated circuit of the present invention includes a piezoelectric membrane circuit board formed by forming a piezoelectric membrane circuit on an insulating substrate, a protective coating layer formed thereon, and electronic circuit components mounted at predetermined positions. However, in a pressure membrane hybrid integrated circuit formed by moisture-proofing an insulating substrate containing electronic components with a synthetic resin, moisture resistance and mechanical properties are improved by forming the protective coating layer with a silicone resin. be.

[発明の実施例] 以下、本発明の圧膜混成集積回路を図面に示す実施例に
ついて説明する。図面は本発明の一実施例を示す断面図
である。
[Embodiments of the Invention] Hereinafter, embodiments of the membrane hybrid integrated circuit of the present invention shown in the drawings will be described. The drawing is a sectional view showing an embodiment of the present invention.

図において、符@1はアルミナ等のセラミックからなる
絶縁基板を示し、この絶縁基板1上に、銅導体、ガラス
系絶縁体、酸化ルテニウム系抵抗体が常法により積層さ
れて圧膜回路2が形成されている。またこの圧膜回路2
上の後述の電子回路部品6をダイボンドする部分を除い
たほぼ全面には、シリコーン系樹脂からなる保護被覆層
3が設けられている。しかしてこの保護被覆層3は、熱
硬化型あるいは紫外線(UV)硬化型のシリコーン系樹
脂インクを用いてこれを前記圧膜回路2上に印刷した後
、この塗布層を下層の導体層が酸化しない条件で、たと
えば130℃で20分間以下の時間で加熱するか、ある
いは紫外線を照射して硬化させることにより形成される
In the figure, the symbol @1 indicates an insulating substrate made of ceramic such as alumina. On this insulating substrate 1, a copper conductor, a glass insulator, and a ruthenium oxide resistor are laminated by a conventional method to form a piezoelectric film circuit 2. It is formed. In addition, this pressure membrane circuit 2
A protective coating layer 3 made of silicone resin is provided on almost the entire surface except for a portion where an electronic circuit component 6 described below is die-bonded. However, the protective coating layer 3 of the lever is printed on the pressure film circuit 2 using a thermosetting or ultraviolet (UV) curable silicone resin ink, and then the coating layer is oxidized so that the underlying conductive layer is oxidized. For example, it is formed by heating at 130° C. for 20 minutes or less, or by irradiating ultraviolet rays to cure it.

また圧膜回路2上の保護被覆層3が形成されていない所
定の位置には、コンデンサ、ICのような電子回路部品
4が半田付けされており、さらに絶縁基板1の裏面も含
めてこれらの外側には、全体的にフェノール系あるいは
エポキシ系の合成樹脂からなる封止層5が一体に設けら
れている。
In addition, electronic circuit components 4 such as capacitors and ICs are soldered to predetermined positions on the piezoelectric film circuit 2 where the protective coating layer 3 is not formed, and these components also include the back surface of the insulating substrate 1. A sealing layer 5 made entirely of phenolic or epoxy synthetic resin is integrally provided on the outside.

この封止層5は、ディップ法あるいは流動浸漬法等によ
り設けられる。
This sealing layer 5 is provided by a dipping method, a fluidized dipping method, or the like.

このように構成される実施例の圧膜混成集積回路におい
ては、圧膜回路2上に設けられた保護被覆層3が良好な
耐湿性を示す。すなわら保護被覆層3を構成するシリコ
ーン系樹脂が発水性が良好であるため、仮に保護被覆層
3にピンホール等の欠陥部があり、ここから水分が浸入
した場合でも、圧膜回路2表面に連続した水の膜が形成
されることがない。
In the membrane hybrid integrated circuit according to the embodiment constructed as described above, the protective coating layer 3 provided on the membrane circuit 2 exhibits good moisture resistance. In other words, since the silicone resin constituting the protective coating layer 3 has good water repellency, even if there is a defect such as a pinhole in the protective coating layer 3 and moisture infiltrates from there, the pressure membrane circuit 2 No continuous water film is formed on the surface.

また実施例においては、シリコーン系樹脂からなる保護
被覆層3がゴム状弾性を有するため、絶縁基板1との間
に膨張係数の違いがあってもこの差違に起因する応力を
保護被覆層3が吸収し剥離が生じることがない。ざらに
樹脂コーI〜材とアルミナ基板(絶縁基板)の樹脂系数
の差によって生ずる応力も吸収してくれる為温度サイク
ル試験で生じやすかった樹脂コートにクラックが生じる
ことがなくなる効果がある。
In addition, in the embodiment, since the protective coating layer 3 made of silicone resin has rubber-like elasticity, even if there is a difference in expansion coefficient between the protective coating layer 3 and the insulating substrate 1, the protective coating layer 3 absorbs the stress caused by this difference. Absorbs and does not cause peeling. Since it also absorbs the stress caused by the difference in resin composition between the resin coat I~ material and the alumina substrate (insulating substrate), it has the effect of eliminating cracks that tend to occur in the resin coat during temperature cycle tests.

[発明の効果] 以上の説明から明らかなように、本発明の圧膜混成集積
回路は耐湿性に優れ電気的に良好な信頼性の高いもので
ある。
[Effects of the Invention] As is clear from the above description, the membrane hybrid integrated circuit of the present invention has excellent moisture resistance, good electrical properties, and high reliability.

【図面の簡単な説明】[Brief explanation of drawings]

図面は本発明の圧膜混成集積回路の一実施例を示す断面
図である。 1・・・・・・・・・絶縁基板 2・・・・・・・・・圧膜回路 3・・・・・・・・・シリコーン系樹脂からなる保護被
覆層4・・・・・・・・・電子回路部品 5・・・・・・・・・封止層 代理人弁理士  須 山 佐 − 手 続 補 正 書(自発) 昭和60年8月78 1、事件の表示  特願昭60−143661号2、発
明の名称 厚膜混成集積回路 3、補正をする者 事件との関係・特許出願人 神奈川県用崎市幸区堀用町721地 (307)株式会社 東芝 4、代  理  人     〒 101東京都千代田
区神田多町2丁目1番地 願書の発明の名称および明細書の全文 訂正明細書 1、発明の名称 厚膜混成集積回路 2、特許請求の範囲 (1)絶縁基板上に開回路を形成してなる卵回路基板上
に、保護被覆層を形成するとともに所定の位置に電子回
路部品を実装し、これら電子部品を含む絶縁基板を合成
樹脂で防湿処理してなる闘混成集積回路において、前記
保護被覆層をシリコーン系樹脂で構成してなることを特
徴とする闘混成集積回路。 3、発明の詳細な説明 [発明の技術分野] 本発明は厚膜混成集積回路に関する。 [発明の技術的背景] 近時電子機器の小型、軽量化促進のために、混成集積回
路が多用されつつある。またその中でも特に高周波回路
としては、一般的に以下に示す構造の厚膜混成集積回路
が使用されている。 すなわち、アルミ等のセラミックスからなる絶縁基板上
に、銅などからなる導体ペーストを印刷し、不活性ガス
中で焼成して銅パターンを形成し、実に必要によっては
、ガラス系絶縁ペースト、抵抗ペースト等を印刷、焼成
し、厚膜回路を形勢した後、その上へエキポジ樹脂系あ
るいはアクリル樹脂系の紫外線(tJV)硬化型保護コ
ートを印刷、硬化し1.IC,コンデンサ等の電子部品
を実装して半田付けし最後に防湿処理としてフェノール
系あるいはウキポジ系樹脂等を用い、ディップ法、流動
浸漬法等により厚膜回路基板全体を樹脂コートを施した
構造の厚膜混成集積回路が用いられている。 しかして従来の厚膜混成集積回路においては、厚膜回路
を構成する銅等のパターンの表面酸化を防ぐために、保
護コートは高温焼成あるいは高温硬化を型材料を用いる
ことができないので、従来一般的にプリント基板のソル
ダーレジスト等として実績のあるエポキシ樹脂系または
アクリル樹脂系の紫外線(UV)硬化型インクを用いて
保護コートを形成することが行なわれている。 [背景技術の問題点] しかしながらこのような厚膜混成集積回路においては、
保護被覆層の耐湿性が充分ではないという欠点があった
。すなわちたとえば電子部品の耐湿性能を短時間で評価
するため1こ一般的に行われる加圧加温試験を行った場
合、短時間で保護被覆層に吸湿によるふくれが生じ電気
的に不良になるという問題があった。ちなみに、この原
因は保護被覆層の耐湿性が不充分な点によるばかりでな
く保護被覆材料がUv硬化後の塗膜の伸びが充分でない
点にもよるものと考えられ、膨張係数の違いにより保護
被覆層が絶縁基板から剥離しやすく、さらにこの剥離が
吸湿により加速されることによるものと考えられる。ま
た上記従来のものは温度サイクル試験を行った場合に、
アルミナ基板と樹脂コート材料の膨張係数の差によって
樹脂コート層にクランクが発生しやすいという問題もあ
った。 [発明の目的] 本発明はこれらの問題を解決するためになされたもので
、保護被覆層に吸湿によるふくれによる電気的不良を防
止して信頼性の高い厚膜混成集積回路を提供することを
目的とする。 [発明の概要] 本発明の厚膜混成集積回路は、絶縁基板上に厚膜回路を
形成してなる厚膜回路基板上に、保護被覆層を形成する
とともに所定の位置に電子回路部品を実装し、これら電
子部品を含む絶縁基板を合成樹脂で防湿処理してなる厚
膜混成集積回路において、前記保護被覆層をシリコーン
系樹脂で構成することにより、耐湿性および機械的特性
を改良したものである。 [発明の実施例] 以下、本発明の厚膜混成集積回路を図面に示す実施例に
ついて説明する。図面は本発明の一実施例を示す断面図
である。 図において、符号1はアルミナ等のセラミックからなる
絶縁基板を示し、この絶縁基板1上に、銅導体、ガラス
系絶縁体、酸化ルテニウム系抵抗体が常法により積層さ
れて厚膜回路2が形成されている。またこの厚膜回路2
上の後述の電子回路部品6をダイボンドする部分を除い
たほぼ全面には、シリコーン系樹脂からなる保護被覆層
3が設けられている。しかしてこの保護被覆層3は、熱
硬化型あるいは紫外線(LJV)硬化型のシリコーン系
樹脂インクを用いてこれを前記厚膜回路2上に印刷した
後、この塗布層を下層の導体層が酸化しない条件で、た
とえば130℃で20分間以下の時間で加熱するか、あ
るいは紫外線を照射して硬化させることにより形成され
る。 また厚膜回路2上の保護被覆層3が形成されていない所
定の位置には、コンデンナ、ICのような電子回路部品
4が半田付けされており、さらに絶縁基板1の裏面も含
めてこれらの外側には、全体的にフェノール系あるいは
エポキシ系の合成樹脂からなる封止層5が一体に設けら
れている。 この封止層5は、ディップ法あるいは流動浸漬法等によ
り設けられる。 このように構成される実施例の厚膜混成集積回路におい
ては、厚膜回路2上に設けられた保護被覆層3が良好な
耐湿性を示す。すなわち保護被覆層3を構成するシリコ
ーン系樹脂が発水性が良好であるため、仮に保護被覆層
3にピンホール等の欠陥部があり、ここから水分が浸入
した場合でも、厚膜回路2表面に連続した水の膜が形成
されることがない。 また実施例においては、シリコーン系樹脂からなる保護
被覆層3がゴム状弾性を有するため、絶縁基板1との間
に膨張係数の違いがあってもこの差違に起因する応力を
保護被覆層3が吸収し剥離が生じることがない。ざらに
樹脂コート材とアルミナ基板(絶縁基板)の樹脂系数の
差によって生ずる応力も吸収してくれる為温度サイクル
試験で生じやすかった樹脂コートにクラックが生じるこ
とがなくなる効果がある。 [発明の効果] 以上の説明から明らかなように、本発明の厚膜混成集積
回路は耐湿性に優れ電気的に良好な信頼性の高いもので
ある。 4、図面の簡単な説明 図面は本発明の厚膜混成集積回路の一実施例を示す断面
図である。 1・・・・・・・・・絶縁基板 2・・・・・・・・・厚膜回路 3・・・・・・・・・シリコーン系樹脂からなる保護被
覆層4・・・・・・・・・電子回路部品 5・・・・・・・・・封止層
The drawing is a sectional view showing an embodiment of the membrane hybrid integrated circuit of the present invention. 1... Insulating substrate 2... Thread film circuit 3... Protective coating layer made of silicone resin 4... ...Electronic circuit components 5...Sealing layer attorney Sa Suyama - Procedural amendment (spontaneous) August 78, 1985 1. Indication of case Patent application 1987 -143661 No. 2, Name of the invention Thick film hybrid integrated circuit 3, Relationship with the amended person case Patent applicant 721 Horiyo-cho, Saiwai-ku, Yozaki City, Kanagawa Prefecture (307) Toshiba Corporation 4, Agent Address: 2-1, Kanda Tamachi, Chiyoda-ku, Tokyo 101 Title of the invention and the full text of the specification Correction statement 1 Title of the invention Thick film hybrid integrated circuit 2 Claims (1) A hybrid integrated circuit is formed by forming a protective coating layer on a circuit board on which a circuit is formed, mounting electronic circuit components at predetermined positions, and treating the insulating substrate containing these electronic components with moisture-proofing with synthetic resin. A hybrid integrated circuit characterized in that the protective coating layer is made of a silicone resin. 3. Detailed Description of the Invention [Technical Field of the Invention] The present invention relates to thick film hybrid integrated circuits. [Technical Background of the Invention] In recent years, hybrid integrated circuits have been increasingly used to promote downsizing and weight reduction of electronic devices. Among these, especially as a high frequency circuit, a thick film hybrid integrated circuit having the structure shown below is generally used. That is, a conductive paste made of copper or the like is printed on an insulating substrate made of ceramics such as aluminum, and then fired in an inert gas to form a copper pattern.If necessary, glass-based insulating paste, resistance paste, etc. After printing and baking to form a thick film circuit, an ultraviolet (tJV) curable protective coat made of an expository resin or an acrylic resin is printed and cured.1. This is a structure in which electronic components such as ICs and capacitors are mounted and soldered, and the entire thick film circuit board is coated with a resin using a phenol or Ukiposi resin for moisture-proofing treatment using a dip method, fluidized dipping method, etc. Thick film hybrid integrated circuits are used. However, in conventional thick film hybrid integrated circuits, in order to prevent surface oxidation of patterns such as copper that make up the thick film circuit, the protective coat cannot be baked or cured at high temperatures using the mold material, which is conventionally common. In recent years, a protective coat has been formed using an epoxy resin-based or acrylic resin-based ultraviolet (UV) curing ink that has been used as a solder resist for printed circuit boards. [Problems with the background art] However, in such thick film hybrid integrated circuits,
There was a drawback that the moisture resistance of the protective coating layer was not sufficient. In other words, for example, when a pressurization and heating test, which is commonly performed to evaluate the moisture resistance performance of electronic components in a short period of time, is performed, the protective coating layer swells due to moisture absorption and becomes electrically defective in a short period of time. There was a problem. Incidentally, this is thought to be due not only to the insufficient moisture resistance of the protective coating layer, but also to the fact that the coating film of the protective coating material does not stretch sufficiently after UV curing. This is considered to be because the coating layer easily peels off from the insulating substrate, and this peeling is further accelerated by moisture absorption. In addition, when the above conventional type was subjected to a temperature cycle test,
There was also the problem that cranks were likely to occur in the resin coating layer due to the difference in expansion coefficients between the alumina substrate and the resin coating material. [Object of the Invention] The present invention has been made to solve these problems, and an object of the present invention is to provide a highly reliable thick film hybrid integrated circuit by preventing electrical failures caused by blistering of the protective coating layer due to moisture absorption. purpose. [Summary of the Invention] The thick film hybrid integrated circuit of the present invention includes forming a protective coating layer on a thick film circuit board formed by forming a thick film circuit on an insulating substrate, and mounting electronic circuit components at predetermined positions. However, in thick film hybrid integrated circuits formed by moisture-proofing an insulating substrate containing electronic components with a synthetic resin, moisture resistance and mechanical properties are improved by forming the protective coating layer with a silicone resin. be. [Embodiments of the Invention] Hereinafter, embodiments of the thick film hybrid integrated circuit of the present invention shown in the drawings will be described. The drawing is a sectional view showing an embodiment of the present invention. In the figure, reference numeral 1 indicates an insulating substrate made of ceramic such as alumina, and a thick film circuit 2 is formed by laminating a copper conductor, a glass insulator, and a ruthenium oxide resistor on this insulating substrate 1 by a conventional method. has been done. Also, this thick film circuit 2
A protective coating layer 3 made of silicone resin is provided on almost the entire surface except for a portion where an electronic circuit component 6 described below is die-bonded. However, the protective coating layer 3 of the lever is printed on the thick film circuit 2 using a thermosetting or ultraviolet (LJV) curable silicone resin ink, and then the underlying conductive layer is oxidized. For example, it is formed by heating at 130° C. for 20 minutes or less, or by irradiating ultraviolet rays to cure it. Furthermore, electronic circuit components 4 such as capacitors and ICs are soldered to predetermined positions on the thick film circuit 2 where the protective coating layer 3 is not formed, and these components also include the back surface of the insulating substrate 1. A sealing layer 5 made entirely of phenolic or epoxy synthetic resin is integrally provided on the outside. This sealing layer 5 is provided by a dipping method, a fluidized dipping method, or the like. In the thick film hybrid integrated circuit of the embodiment constructed as described above, the protective coating layer 3 provided on the thick film circuit 2 exhibits good moisture resistance. In other words, since the silicone resin constituting the protective coating layer 3 has good water repellent properties, even if there is a defect such as a pinhole in the protective coating layer 3 and moisture infiltrates from there, it will not reach the surface of the thick film circuit 2. No continuous water film is formed. In addition, in the embodiment, since the protective coating layer 3 made of silicone resin has rubber-like elasticity, even if there is a difference in expansion coefficient between the protective coating layer 3 and the insulating substrate 1, the protective coating layer 3 absorbs the stress caused by this difference. Absorbs and does not cause peeling. It also absorbs the stress caused by the difference in resin composition between the resin coating material and the alumina substrate (insulating substrate), which has the effect of eliminating cracks in the resin coating that tend to occur during temperature cycle tests. [Effects of the Invention] As is clear from the above description, the thick film hybrid integrated circuit of the present invention has excellent moisture resistance, good electrical properties, and high reliability. 4. Brief Description of the Drawings The drawings are cross-sectional views showing one embodiment of the thick film hybrid integrated circuit of the present invention. 1...Insulating substrate 2...Thick film circuit 3...Protective coating layer 4 made of silicone resin ...Electronic circuit component 5...Sealing layer

Claims (1)

【特許請求の範囲】[Claims] (1)絶縁基板上に圧膜回路を形成してなる圧膜回路基
板上に、保護被覆層を形成するとともに所定の位置に電
子回路部品を実装し、これら電子部品を含む絶縁基板を
合成樹脂で防湿処理してなる圧膜混成集積回路において
、前記保護被覆層をシリコーン系樹脂で構成してなるこ
とを特徴とする圧膜混成集積回路。
(1) A protective coating layer is formed on a piezoelectric film circuit board formed by forming a piezoelectric film circuit on an insulating substrate, electronic circuit components are mounted in predetermined positions, and the insulating substrate containing these electronic components is made of synthetic resin. 1. A pressure membrane hybrid integrated circuit subjected to moisture-proofing treatment, wherein the protective coating layer is made of a silicone resin.
JP14366185A 1985-06-30 1985-06-30 Thick film hybrid integrated circuit Pending JPS624392A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14366185A JPS624392A (en) 1985-06-30 1985-06-30 Thick film hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14366185A JPS624392A (en) 1985-06-30 1985-06-30 Thick film hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPS624392A true JPS624392A (en) 1987-01-10

Family

ID=15343985

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14366185A Pending JPS624392A (en) 1985-06-30 1985-06-30 Thick film hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS624392A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH054535U (en) * 1991-06-28 1993-01-22 オムロン株式会社 Printed board

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS503503A (en) * 1973-04-11 1975-01-14
JPS5114045A (en) * 1974-07-25 1976-02-04 Mitsui Shipbuilding Eng Kaitentaino kaitentanichichokusetsushijisochi

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS503503A (en) * 1973-04-11 1975-01-14
JPS5114045A (en) * 1974-07-25 1976-02-04 Mitsui Shipbuilding Eng Kaitentaino kaitentanichichokusetsushijisochi

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH054535U (en) * 1991-06-28 1993-01-22 オムロン株式会社 Printed board

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