JPH05102645A - Hybrid integrated circuit - Google Patents

Abstract

PURPOSE:To prevent a solder joint crack caused by temperature cycle at the solder junction of a circuit element mounted on a hybrid integrated circuit board. CONSTITUTION:A circuit element mounted on a hybrid integrated circuit board 1 is coated for protection with coating resin 6 which has a thermal expansion coefficient a close to that of the board 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit, and more particularly to a hybrid integrated circuit capable of improving joint failure due to stress at a solder joint portion of a circuit element soldered to a conductive path on a hybrid integrated circuit board.

[0002]

2. Description of the Related Art A conventional hybrid integrated circuit is shown in FIG. The hybrid integrated circuit board (21) is an aluminum substrate whose surface is anodized, and a conductive path (22) having a desired shape is formed on the board (21) via an insulating resin layer. Large electronic components (not shown) such as a semiconductor chip, a chip capacitor, a circuit element (23) such as a printed resistor, a resin-sealed semiconductor element and an electrolytic capacitor on or between the conductive path (22). ) Are connected by soldering and are connected to each other via the conductive path (22), and have a predetermined circuit function.

[0003]

Generally, large-sized electronic parts such as chip resistors, chip capacitors and other chip parts, semiconductor chips, resin-sealed semiconductor elements and electrolytic capacitors mounted on a hybrid integrated circuit having such a structure are generally used. Since they are connected with solder, the following problems occur. Taking a chip component as an example, the substrate having an aluminum substrate as a base has a coefficient of thermal expansion α of 23 × 10 ⁻⁶ / ° C., and the above-mentioned chip component, for example, a chip resistor has a coefficient of thermal expansion of 7 × 10 6. ^-6 / ° C, the coefficient of thermal expansion α of the chip capacitor is 10 × 10 ^-6 / ° C, so the expansion coefficient α of both is significantly different. There is a problem that stress is applied to the solder and cracks occur in the solder-fixed portion, resulting in poor connection.

Next, regarding the mechanism of cracks,
Explain. As described above, the expansion coefficient of the aluminum substrate
The number α is 23 × 10^-6/ ° C, expansion coefficient α of chip parts is 7
~ 10 x 10^-6/ ° C, solder for joining chip components
Expansion coefficient α is about 23 × 10 ^-6/ ° C, so room temperature
In the state, as shown in FIG. 7A, stress is applied to the board, solder, and chip.
I don't know.

However, in the high temperature state, as shown in FIG. 7B, since α of the substrate and the solder is larger than the chip component, the solder is pulled in the direction of the arrow, and as a result, the joint solder is deformed so that the skirt spreads only in the direction of the arrow. Further, in the low temperature state, as shown in FIG. 7C, a compressive force is applied in the opposite arrow direction, and as a result, the joint solder spreads only in the arrow direction. For example, -50 to
By repeating several tens to several hundreds of cycles under a severe temperature cycle condition of + 150 ° C., cracks are generated on the joint surface between the chip component and the solder having significantly different α as described above. This is because the tin and lead components of the microcrystalline solder component are separated and agglomerated by the temperature cycle to form a continuous lead layer in the solder, which lowers the mechanical strength.

This problem occurs not only in the above-mentioned chip resistor, but also in the solder connection area of a large electronic component such as a resin-sealed semiconductor element to which its electrode terminal is soldered and an electrolytic capacitor. Further, the same problem occurs not only in the solder connection portion of the above-mentioned chip component etc. but also in the printed resistor. Since the printed resistor does not have a solder joint such as a chip part, there is no problem of connection failure, but a problem peculiar to the printed resistor occurs that the resistance value of the printed resistor is changed. That is, a hybrid integrated circuit having a printed resistor formed thereon is generally subjected to various reliability tests. For example, if such a hybrid integrated circuit is stored at high temperature for a long time and then left at room temperature, the printed resistor itself will cure and shrink due to temperature change, and the initial resistance value will change to a negative value, resulting in a defect in a part requiring accuracy. There is a problem of becoming.

Further, since the printed resistor has a negative TCR, it is desired to reduce the rate of change of TCR when mounted on a hybrid integrated circuit. For example, the TCR of a resistor of 20 KΩ is about −900 ppm / ° C., but when this resistor is mounted on an aluminum substrate, the expansion coefficient α of the substrate is 23 × 10 ⁻⁶ / ° C. and the expansion coefficient α of the resistor is 12 × 1
Since it is 0 ⁻⁶ / ° C., when the substrate is pulled by the temperature change, the resistor itself is also pulled. As a result, the resistor is pulled, but the resistance value itself changes to a positive value, and the TCR of the resistor is reduced to -280 ppm / ° C.

However, considering a resistor that requires precision, it is desirable to minimize the TCR, but the conventional structure has a problem that it can be suppressed to about -280 ppm. The above-mentioned problem is a problem peculiar to an integrated circuit based on a metal substrate, particularly an aluminum substrate, and does not occur on an integrated circuit based on another substrate such as a printed circuit board. This is because such a base substrate does not cause the above-mentioned problems due to the difference between the expansion coefficient α of the chip component or the printed resistor and the expansion coefficient α of the substrate.

The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to prevent cracks due to stress applied during a temperature cycle in a solder connection portion of a circuit element or the like mounted on a hybrid integrated circuit board. It is an object of the present invention to provide a hybrid integrated circuit that suppresses generation and variation in the resistance value of a printed resistor.

[0010]

[Means for Solving the Problems]
To achieve the object, a hybrid integrated circuit according to the present invention is provided with a conductive path of a desired shape formed on a hybrid integrated circuit substrate and a circuit element connected to a predetermined position of the conductive path. The circuit element is characterized in that the circuit element is coated and sealed with a coating resin having a thermal expansion coefficient α substantially similar to the thermal expansion coefficient α of the substrate.

[0011]

In the hybrid integrated circuit configured as described above, the circuit element mounted on the hybrid integrated circuit board is covered with the resin having the expansion coefficient α approximated to the expansion coefficient α of the board, and the expansion coefficient is Circuit elements with significantly different α have expansion coefficient α
The structure is sandwiched between the substrate and the resin, and even if a temperature cycle occurs due to the use of a hybrid integrated circuit, the expansion and contraction of the substrate and the resin are almost the same. In a sealed semiconductor element or the like, stress applied to those solder joints due to temperature cycles can be significantly suppressed.

In the case of a printed resistor, the resistance value T
CR can be made smaller than before, and the change in the initial resistance value due to curing shrinkage can be significantly suppressed.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The hybrid integrated circuit of the present invention will be described below based on the embodiments shown in FIGS. FIG. 1 is an enlarged perspective sectional view showing an essential part of a hybrid integrated circuit of the present invention. (1) is a hybrid integrated circuit board, (2) is an insulating resin layer, (3) is a conductive path, and (4) is a chip capacitor. And chip resistance,
(5) is a printed resistor, (6) is a coating resin layer, (7) is a semiconductor chip, (8) is a resin-sealed semiconductor element, and (9) is a large electronic component such as an electrolytic capacitor.

As the hybrid integrated circuit substrate (1), an aluminum substrate whose surface is anodized or an aluminum substrate whose surface is coated with an insulating resin (2) mixed with Al ₂ O ₃ is used to obtain good heat dissipation characteristics. ing. A copper foil is attached to the substrate (1), and the copper foil is etched into a desired shape to form a conductive path (3) having a desired shape. Nickel plating is applied to predetermined positions on the conductive paths (3).

On the conductive path (3), a semiconductor chip (7), a chip capacitor, and a chip capacitor are formed to form a desired circuit function.
A plurality of circuit elements such as a chip resistor (4) and a printed resistor (5) are mounted and formed at predetermined positions on the substrate (1). Chip capacitors, chip resistors (4), chip parts such as semiconductor chips (7), surface mount resin-sealed semiconductor elements (8) such as QFP, and large electronic parts (9) such as electrolytic capacitors are well known. As described above, the conductive path (3) may be joined by solder, and the semiconductor chip (7) such as a transistor or an LSI chip may be connected to the conductive path (3) by Ag paste instead of solder. Further, in the printed resistor (5), it is printed and formed between desired conductive paths (3) via an Ag paste layer (not shown). In this embodiment, the epoxy resin 100, carbon 8, inorganic fillers 30 to 30 are formed. It is formed by using an epoxy resin-based carbon resin printing resistor paste formed with a composition of 100 and 100 of an organic solvent.

For improving heat resistance, an epoxy-modified polyimide resin 100 obtained by modifying a bismaleimide type or maleimide type polyimide resin by adding 10 to 80 parts of an epoxy resin having a molecular weight of 300 to 3000,
An epoxy-modified polyimide resin-based carbon resin printing resistor paste composed of carbon 8, an inorganic filler 30, and an organic solvent 110 in a weight ratio is used.

A feature of the present invention is that large-sized electronic parts (9) such as the chip capacitor, the chip resistor (4), the semiconductor chip (7), the resin-sealed semiconductor element (8), and the electrolytic capacitor. ), The solder connection portion or the printed resistor is coated with a resin having α that is approximately similar to α of the substrate. The chip capacitor, the chip resistor (4) and the semiconductor chip (7) or the printed resistor (5) are protected so as to cover the whole, and large-sized electronic parts (such as a resin-sealed semiconductor element (8) and an electrolytic capacitor ( 9) is selectively protected at the solder connection portion or is covered and protected on the entire component.

The coating resin (6) used in the present invention is variously changed by setting temperature cycle conditions. For example, when the temperature cycle condition is in the range of -50 to + 150 ° C, the glass transition temperature (T) of 150 ° C or higher, which is higher than the upper limit of the condition.
Epoxy resin having G) is used, and about 5% is contained in the resin.
By mixing 7% by weight of an inorganic filler (silica or the like), α of the coating resin (6) can be adjusted to about 25 × 10 ⁻⁶ / ° C. This is because when the glass transition temperature (TG) is set to be lower than or equal to the upper limit of the temperature cycle condition, the resin component composition changes when the temperature cycle increases and the resin α itself adjusted with the substrate α changes.

A coating resin (6) in which α is approximately approximated to the substrate (1) is applied to the chip capacitor, the chip resistor (4) and the printed resistor (5) and thermally cured, whereby the chip capacitor and the chip resistor ( In the case of 4), it is possible to prevent the occurrence of cracks in the solder joint portion due to the temperature cycle, and in the case of the printed resistor (5), the TCR can be made extremely small and the resistance change rate at high temperature storage can be made extremely small. it can.

Next, the resin is coated with the coating resin (6) of the present invention, which is why a large size such as a chip capacitor, a chip resistor (4), a semiconductor chip (7), a resin-sealed semiconductor element (8) and an electrolytic capacitor is produced. The fact that cracks do not occur at the solder joints of the electronic component (9) will be described based on the chip capacitor shown in FIG. 2A shows that the coating resin (6) is applied to the chip capacitor (4) and the temperature is set to 200 ° C.
FIG. 3 is a cross-sectional view when the coating resin (6) is heated at a temperature of up to 250 ° C. to be thermoset. When the coating resin (6) is thermoset, a tensile force is applied to the substrate (1), the solder, and the chip capacitor (4) according to each α by the above-mentioned heating.

That is, the substrate (1) is cured by heat,
In the temperature cycle, the chip capacitor (4) was surrounded by the substrate, the solder, and the coating resin having approximately a because the coating resin (6) was cured while the solder and the chip capacitor (4) were pulled. As shown in FIG. B, the chip capacitor (4) is always subjected to compressive stress as shown in FIG. B, and the solder layer is not deformed by the temperature cycle as in the conventional case. The microcrystalline state is maintained and cracks do not occur at the interface between the solder joint and the capacitor (4).

By the way, when the chip capacitor is covered and protected with a resin that does not match α, α of the substrate is about 25 × 10 ⁻⁶ / ° C., whereas α of ordinary epoxy resin is about 50 × 10 ^{−. 6} / ° C. Since α of both is remarkably different, stress does not occur in the joint portion during thermosetting of the resin, but at a temperature below the thermosetting temperature, the resin shrinks relatively to the substrate, so the coating resin is When the circuit pattern is covered, there is a problem that the pattern peels off. Therefore, when a resin that is not matched with α of the substrate is used, it is necessary to form the pattern while avoiding the covering region, which causes a problem that high integration and miniaturization cannot be achieved. There is also a problem that the substrate is distorted in the covered area.

FIG. 3 is a solder joint in a temperature cycle test between a chip capacitor (4) coated with a coating resin (6) which is approximately approximated to α of the substrate (A) and a conventional uncoated one (B). It is a characteristic view showing a partial crack generation defective rate. The temperature cycle condition is -40 ° C (30 minutes) ~
It was carried out at + 125 ° C. (30 minutes), and a 3.2 × 1.6 mm chip capacitor was mounted on an aluminum substrate.
As is clear from FIG. 3, in the conventional (B), a defect started to occur in 670 cycles, and in 1000 cycles, a connection defect due to a solder crack occurred in all of the 8 test samples. On the other hand, in (A) of the present invention, 2
It was confirmed that no cracks were generated at the solder joint even after 000 cycles.

On the other hand, when the printed resistor (5) is coated with the coating resin (6) of the present invention, the TCR of the printed resistor (5) can be made smaller than before, and the resistance variation with respect to temperature change can be made more than before. It is possible to provide a hybrid integrated circuit having an extremely small number. Further, since the printed resistor (5) has a structure in which it is sandwiched between the substrate (1) and the coating resin (6) having a coefficient of expansion α close to each other, the rate of change in resistance during high temperature storage can be significantly improved as compared with the prior art.

FIG. 4 is a characteristic diagram showing the resistance change rate depending on the temperature change between the case where the coating resin (b) is coated on the 20 KΩ printed resistor and the case where it is not coated, and FIG. 5 is the high temperature storage resistance change rate. It is a characteristic view showing. As a measurement condition, the high temperature storage resistance change characteristic is a resistance change rate at room temperature of 125 ° C. for 1000 hours. The resistors were measured by forming them on the aluminum substrate used in this example.

In FIGS. 4 and 5, A is a coating resin coated with a coefficient of expansion α approximating the expansion coefficient α of the substrate, and B is a coating resin which is not coated with a conventional coating resin. As is clear from FIG. 4 and FIG.
It is clear that the resistance value does not change more than that of B. Because the α of the substrate (1) and the α of the coating resin (6) are substantially the same, the printed resistor (5) having a small α is sandwiched between the printed resistor (5) and the printed resistor (5). Since stress is applied, the TCR becomes smaller.

After the high temperature storage test, A is B
It is clear that it will be much more improved. This is because when the printed resistor (5) is stored in a high temperature storage state, the curing shrinkage of the resin further proceeds and the resistance value is lowered. Since the coating resin (6) of the present invention uses a fast-curing curing agent whose epoxy equivalent is calculated, it has little curing shrinkage when stored at high temperature. Therefore, it has the function of inhibiting the curing shrinkage of the resistor (5), so that the resistance value can be prevented from lowering.

Although the embodiments described in detail have been limited to the chip components such as the chip capacitors and the printed resistors,
The present invention is not limited to those circuit elements,
The same effect can be expected when it is used in a solder joint portion of a bare chip or a discrete component. And, it is particularly effective when soldering chip components such as a large chip capacitor. This is because as the chip parts and the like become larger, stress is applied to the solder joint portion. It is also possible to form by coating on all printed resistors, but if the number of printed resistors on the substrate is large, select only those resistors that require precision in consideration of the warpage of the substrate. It is even more effective to form by coating.

[0029]

As described above in detail, according to the present invention,
By coating a chip component such as a chip capacitor and a circuit element such as a printed resistor mounted on the substrate with a coating resin having a coefficient of expansion α that is approximately similar to the coefficient of thermal expansion α of the substrate It is possible to completely prevent cracking of the solder joint portion due to a temperature cycle having an extremely different temperature.

Further, according to the present invention, by coating the printed resistor with the above-mentioned coating resin, the TCR of the printed resistor can be obtained.
It is possible to provide a hybrid integrated circuit in which the resistance change with respect to temperature change is small, and it is possible to further reduce the resistance change rate at high temperature storage, and to suppress the resistance change more than before. As a result, the hybrid integrated circuit of the present invention can realize a highly reliable hybrid integrated circuit even under extremely severe temperature cycle conditions.

[Brief description of drawings]

FIG. 1 is an enlarged perspective sectional view of an essential part showing a hybrid integrated circuit of the present invention.

FIG. 2 is a diagram for explaining stress in a solder joint portion when a coating resin of the present invention is applied.

FIG. 3 is a characteristic diagram showing a crack generation defect rate of a solder joint portion in a temperature cycle test.

FIG. 4 is a characteristic diagram showing a rate of change in resistance of a printed resistor with temperature change.

FIG. 5 is a characteristic diagram showing a resistance change rate of a printed resistor when stored at high temperature.

FIG. 6 is a sectional view showing a conventional hybrid integrated circuit.

FIG. 7 is a diagram illustrating stress in a conventional solder joint.

[Explanation of symbols]

 (1) Hybrid integrated circuit board (2) Insulating resin layer (3) Conductive path (4) Chip component such as chip capacitor (5) Printed resistor (6) Coating resin (7) Semiconductor chip (8) Resin-sealed type Semiconductor element (9) Electronic components

Claims (5)

[Claims] 1. A hybrid integrated circuit comprising a conductive path of a desired shape formed on a hybrid integrated circuit substrate and a circuit element connected to a predetermined position of the conductive path, wherein the thermal expansion coefficient α of the substrate. A hybrid integrated circuit characterized in that the circuit element is coated and sealed with a coating resin having a thermal expansion coefficient α substantially substantially similar to the above. 2. A hybrid integrated circuit comprising a conductive path of a desired shape formed on a hybrid integrated circuit substrate and a circuit element such as a semiconductor chip, a chip capacitor, and a chip resistor soldered to a predetermined position of the conductive path. The hybrid integrated circuit, wherein the circuit element is covered and sealed with a covering resin having a coefficient of thermal expansion α substantially similar to the coefficient of thermal expansion α of the substrate. 3. A conductive path of a desired shape formed on a hybrid integrated circuit board, and a resin-sealed semiconductor element solder-connected to a predetermined position of the conductive path, and a large electronic component such as an electrolytic capacitor. A hybrid integrated circuit, in which at least the resin-sealed semiconductor element and the connection electrode portion of an electronic component are covered and sealed with a covering resin having a thermal expansion coefficient α substantially similar to the thermal expansion coefficient α of the substrate. A hybrid integrated circuit characterized by the above. 4. A hybrid integrated circuit comprising: a conductive path having a desired shape formed on a hybrid integrated circuit substrate; and at least one printed resistor printed at a predetermined position between the conductive paths. A hybrid integrated circuit in which a resistor is coated and sealed with a coating resin having a thermal expansion coefficient α substantially similar to the thermal expansion coefficient α of the substrate. 5. A hybrid integrated circuit comprising a conductive path of a desired shape formed on an insulating metal substrate and a circuit element solder-connected to a predetermined position of the conductive path, wherein the coefficient of thermal expansion α of the substrate. A hybrid integrated circuit characterized in that the circuit element is covered and sealed with a coating resin of an epoxy resin having a thermal expansion coefficient α substantially substantially similar to that and having a glass transition temperature equal to or higher than an upper limit temperature of a temperature cycle. ..