JPS6237840B2 - - Google Patents

Info

Publication number
JPS6237840B2
JPS6237840B2 JP53143973A JP14397378A JPS6237840B2 JP S6237840 B2 JPS6237840 B2 JP S6237840B2 JP 53143973 A JP53143973 A JP 53143973A JP 14397378 A JP14397378 A JP 14397378A JP S6237840 B2 JPS6237840 B2 JP S6237840B2
Authority
JP
Japan
Prior art keywords
plating
thickness
substrate
hole
microns
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53143973A
Other languages
Japanese (ja)
Other versions
JPS5570089A (en
Inventor
Masashige Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP14397378A priority Critical patent/JPS5570089A/en
Publication of JPS5570089A publication Critical patent/JPS5570089A/en
Publication of JPS6237840B2 publication Critical patent/JPS6237840B2/ja
Granted legal-status Critical Current

Links

Description

【発明の詳細な説明】 本発明はプリント配線板のめつき方法に関し、
特に孔径対基板厚比が大きく、回路の細密化の必
要な両面又は多層プリント配線板のめつき方法に
関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for plating printed wiring boards;
In particular, the present invention relates to a method for plating double-sided or multilayer printed wiring boards that have a large hole diameter to board thickness ratio and require finer circuitry.

一般にプリント配線板は基板の表面パターン、
表面層間又は中間層との導通を図るため孔壁の導
体層形成が必要である。近年、プリント配線板の
高密度化に伴なつて、板厚対孔径比を大きくし
(具体的には孔径を小さくする)、かつ回路パター
ンの細密化が要求されている。このため孔壁及び
表面に均一にめつきを施すことが、プリント配線
板の電気特性の均一化、製造歩留り向上の為に望
まれている。
In general, printed wiring boards have a surface pattern on the board,
It is necessary to form a conductor layer on the hole wall in order to establish electrical conduction between the surface layers or with the intermediate layer. In recent years, as the density of printed wiring boards has increased, there has been a demand for increasing the board thickness to hole diameter ratio (specifically, reducing the hole diameter) and for finer circuit patterns. For this reason, it is desired to uniformly plate the hole walls and surfaces in order to make the electrical characteristics of the printed wiring board uniform and to improve the manufacturing yield.

これらの対策のため、従来から基板表面と孔壁
内の銅めつきの付き回り率の向上を図るために、
液濃度の均一化、電流分布の均一化等の手段が採
られている。そのうち液濃度均一化の具体的手段
としては、液中に圧縮空気吹き込みによる撹拌、
ポンプによる液の強制循環撹拌超音波振動付与に
よる液撹拌、または被めつき基板の揺動等の方法
を単独又は複数の組合せにより採られている。ま
た電流分布の均一化を図るため、(イ)被めつき基板
と陰極との間に多孔遮蔽板を介在させる、(ロ)被め
つき基板又は陰極の揺動、(ハ)パルス電流、PR電
流等の印加手段が採られている。
In order to take these measures, we have traditionally tried to improve the coverage of copper plating on the substrate surface and inside the hole walls.
Measures have been taken to make the liquid concentration uniform and the current distribution uniform. Among these, specific methods for equalizing the liquid concentration include stirring by blowing compressed air into the liquid;
Methods such as forced circulation of the liquid using a pump, stirring of the liquid by applying ultrasonic vibrations, and rocking of the plated substrate are used alone or in combination. In addition, in order to make the current distribution uniform, (a) a porous shielding plate is interposed between the overlaid substrate and the cathode, (b) rocking of the overlaid substrate or the cathode, (c) pulse current, PR A means of applying current or the like is employed.

しかし、これらの手段では孔壁のめつき厚対基
板表面のめつき厚比が100%を越えることはな
く、表面層に細密化された回路パターンを形成す
ることは、従来から用いられている厚さ35ミクロ
ンまたは18ミクロン等の銅箔を張つた銅張積層板
を使つたのでは、銅箔の表面層に施される銅めつ
き被膜層と合わせて銅厚が厚くなるので、所望す
る細密化回路パターンの形成を困難にしている。
However, with these methods, the ratio of the plating thickness on the hole wall to the plating thickness on the substrate surface does not exceed 100%, and forming a fine-grained circuit pattern on the surface layer has been conventionally used. When using a copper-clad laminate with a copper foil of 35 microns or 18 microns thick, the copper thickness increases along with the copper plating layer applied to the surface layer of the copper foil, so the desired fineness cannot be achieved. This makes it difficult to form circuit patterns.

このためこれらの欠点の改善を図るために厚さ
9ミクロンまたは5ミクロンなどの特別製の極薄
銅箔(Ultra thin Coppen:UTC箔)を使つてい
る。このUTC箔には補助媒体としてアルミニウ
ム箔が張られているので、めつき処理工程の前に
アルミニウム箔を剥離しなければならない。した
がつて製造工程が増える欠点がある。又この極薄
銅箔すなわちUTC箔の製造手段は難しいので厚
さ35ミクロンまたは18ミクロンの銅箔に比べて材
料が高価となる欠点がある。
Therefore, in order to improve these drawbacks, a special ultra-thin copper foil (Ultra thin Coppen: UTC foil) with a thickness of 9 microns or 5 microns is used. Since this UTC foil is covered with aluminum foil as an auxiliary medium, the aluminum foil must be peeled off before the plating process. Therefore, there is a disadvantage that the number of manufacturing steps increases. Furthermore, since the method of manufacturing this ultra-thin copper foil, ie, UTC foil, is difficult, it has the disadvantage that the material is more expensive than copper foil with a thickness of 35 microns or 18 microns.

上述の手段を効じためつき方法によれば、孔壁
のめつき厚対表面のめつき厚の比率は100%以下
であり、本来めつき厚を余り必要としない表面層
側の方が厚くめつきされる。このため回路パター
ン形成時のエツチング工程で余分な銅を溶解しな
ければならない。尚、かつめつきの厚みの均一化
は、上述の電流分布均一化の手段を用いても、例
とえば厚さ30ミクロンの目標に対して±5ミクロ
ンの変動は避けられず、かならずしも満足されな
い。従つて形成された回路の断面積が均一になら
ず、高密度プリント配線板に於いて、特性インピ
ーダンス等の電気特性に影響を及ぼすと云う欠点
がある。
According to the plating method using the above-mentioned means, the ratio of the plating thickness on the hole wall to the plating thickness on the surface is less than 100%, and the surface layer side, which does not require much plating thickness, is thicker. Being criticized. Therefore, the excess copper must be dissolved during the etching process when forming the circuit pattern. It should be noted that even if the above-mentioned current distribution equalization means is used, the uniformity of the thickness of the mating cannot always be satisfied because, for example, variations of ±5 microns with respect to the target thickness of 30 microns cannot be avoided. Therefore, the cross-sectional area of the formed circuit is not uniform, which has the drawback of affecting electrical characteristics such as characteristic impedance in high-density printed wiring boards.

本発明の目的は、これらの従来の欠点を解決し
たプリント配線板のめつき方法を提供することに
ある。
An object of the present invention is to provide a method for plating printed wiring boards that solves these conventional drawbacks.

本発明によれば金属化された貫通孔を有する基
板の表裏面に三次元方向に連通曲折した網状構造
となつた毛細管を有する多孔質板を密着させて、
その多孔質板を介して電気めつき液を強制的に流
しながらめつきを行ない、孔壁だけに均一な厚み
のめつきを選択的に施すことを特徴としたプリン
ト配線板のめつき方法が得られる。
According to the present invention, a porous plate having capillary tubes having a network structure connected and bent in a three-dimensional direction is closely attached to the front and back surfaces of a substrate having metalized through holes,
A method for plating printed wiring boards is characterized in that plating is performed while an electroplating solution is forced to flow through the porous plate, and plating with a uniform thickness is selectively applied only to the hole walls. can get.

本発明によれば選択的に孔壁面に対して均一な
厚付けめつきを高電流密度で行なえることを特徴
とする。
The present invention is characterized in that uniform thick plating can be selectively performed on the hole wall surfaces at a high current density.

第1図は本発明に係るめつき方法の現象を示す
プリント配線板の要部断面説明図である。
FIG. 1 is an explanatory sectional view of a main part of a printed wiring board showing the phenomenon of the plating method according to the present invention.

図中、1は電気絶縁性の基板で、この基板1の
表面に上張りしてある銅箔11の厚さt1は18ミク
ロンまたは35ミクロンが一般的に用いられる。2
はこの基板1に設けられた孔で、この孔2の壁面
及び銅箔11上に本発明のめつき工程に先立ち付
与された無電解銅めつき層12があり、その厚さ
t2は0.2〜5.0ミクロンが通例である。3は三次元
方向に連通曲折した網状構造となつた毛細管を有
する多孔質板で基板1に密着して置かれる。この
多孔質板3は有機高分子の粉粒体とか無機質、例
とえばセラミツク砂等を焼結等の手段によつて目
的の構造を有する多孔質板としたものがよい。具
体的には高分子多孔体であるスペイシー(スペ
イシーケミカル(株)製)がこの目的に適した性能を
有している。
In the figure, reference numeral 1 denotes an electrically insulating substrate, and the thickness t1 of the copper foil 11 overlaid on the surface of the substrate 1 is generally 18 microns or 35 microns. 2
is a hole provided in this substrate 1, and on the wall surface of this hole 2 and on the copper foil 11, there is an electroless copper plating layer 12 applied prior to the plating process of the present invention, and its thickness is
t2 is typically between 0.2 and 5.0 microns. Reference numeral 3 denotes a porous plate having capillary tubes in a three-dimensionally connected and meandering network structure, and is placed in close contact with the substrate 1. The porous plate 3 is preferably made of organic polymer powder or inorganic material, such as ceramic sand, into a porous plate having a desired structure by sintering or other means. Specifically, Spacey (manufactured by Spacey Chemical Co., Ltd.), which is a porous polymer, has performance suitable for this purpose.

第1図に示した実施例の要部をさらに部分拡大
した第2図によりめつき液の流れを説明する。多
孔質板3に対して垂直に、すなわちめつき液20
の流れが孔2内を環流するように、めつき液を強
制的に循環させる。この流れに伴い孔2に近接し
た範囲4のめつき液は多孔質板3内の多孔質部分
すなわち毛細管7を通過して範囲4の流れに合流
して、孔2の入口に導かれていくが、範囲4から
供給されるめつき液に比較し、極めて少量であ
る。更に基板1の表面には多孔質板3を構成する
粉粒体6が密着しており、めつき液と基板1の表
面との接触を阻害している。僅かに基板1の表面
とめつき液は、多孔質板3内の毛細管7により接
触しているが、前述のごとく、めつき液の供給は
少量であり、金属イオンの供給は僅かであるの
で、基板1の表面に接触するめつき液濃度は低下
して、めつき速度が遅くなるため、めつき層は極
めて薄くなる。
The flow of the plating solution will be explained with reference to FIG. 2, which is a partially enlarged view of the main part of the embodiment shown in FIG. 1. perpendicularly to the porous plate 3, that is, the plating liquid 20
The plating liquid is forcibly circulated so that the flow circulates inside the hole 2. Along with this flow, the plating liquid in the area 4 near the hole 2 passes through the porous part in the porous plate 3, that is, the capillary tube 7, joins the flow in the area 4, and is guided to the entrance of the hole 2. However, compared to the plating liquid supplied from range 4, the amount is extremely small. Furthermore, the powder 6 constituting the porous plate 3 is in close contact with the surface of the substrate 1, which prevents contact between the plating solution and the surface of the substrate 1. Although the surface of the substrate 1 and the plating liquid are slightly in contact with each other through the capillary tubes 7 in the porous plate 3, as mentioned above, the supply of the plating liquid is small and the supply of metal ions is small. The concentration of the plating liquid in contact with the surface of the substrate 1 decreases, and the plating speed slows down, so that the plating layer becomes extremely thin.

これに反して、孔2内に供給されるめつき液は
極めて多量となるので、孔2内のめつきに必要な
金属イオンがつぎつぎに供給される。従つて孔2
の内壁には高速度でめつき層が形成される。
On the other hand, since the amount of plating liquid supplied into the holes 2 is extremely large, the metal ions necessary for plating inside the holes 2 are supplied one after another. Therefore hole 2
A plating layer is formed on the inner wall at a high speed.

前述の方法を実施する装置は入口及び出口を有
する閉じたチヤンバーから成りめつき液は加圧下
で入口から出口に強制循環される。更に孔壁内を
均一にめつきするにはめつき液の流れを周期的に
逆転するのが効果的である。
The apparatus for implementing the method described above consists of a closed chamber having an inlet and an outlet, the plating liquid being forced to circulate from the inlet to the outlet under pressure. Furthermore, in order to uniformly plate the inside of the hole wall, it is effective to periodically reverse the flow of the plating liquid.

この結果、例えば孔壁には第3図の電気めつき
厚t3のように厚さ30ミクロン位のめつき層13を
形成することができて、しかも基板1表面層のめ
つき層14は、t4で示したように厚さは2〜5ミ
クロンとなる。このように基板1の表面層のめつ
き厚は従来方法の1/6〜1/15となり、特別な極薄
銅箔を有する銅張り積層板などを使うことなく通
常用いられている厚さ35ミクロン、18ミクロン等
の銅箔の銅張り積層板を用いて細密化された回路
パターンを形成することが容易となる。このため
孔径対基板厚比の大きい孔壁のみに選択的に厚付
け電気めつきができる利点がある。又基板表面の
銅箔厚の厚さの変動を極めて小さくすることがで
きるので、回路パターンの断面積も均一化され
る。
As a result, for example, a plating layer 13 having a thickness of about 30 microns can be formed on the hole wall, as shown in the electroplating thickness t3 in FIG. 3, and the plating layer 14 on the surface layer of the substrate 1 can be , t4 , the thickness is 2 to 5 microns. In this way, the plating thickness of the surface layer of the substrate 1 is 1/6 to 1/15 of that of the conventional method, and the thickness of the plated surface layer of the substrate 1 is 1/6 to 1/15 of that of the conventional method, which is the thickness of 35 mm, which is normally used without using a copper-clad laminate with special ultra-thin copper foil. It becomes easy to form finer circuit patterns using copper-clad laminates made of copper foil of micron, 18 micron, etc. Therefore, there is an advantage that thick electroplating can be selectively performed only on the hole walls having a large hole diameter to substrate thickness ratio. Furthermore, since variations in the thickness of the copper foil on the surface of the substrate can be made extremely small, the cross-sectional area of the circuit pattern can also be made uniform.

以上、本発明により孔径対基板厚比の大きい、
かつ細密化回路パターンを有する電気特性の安定
した高密度プリント配線板が得られる効果があ
る。
As described above, according to the present invention, the hole diameter to substrate thickness ratio is large.
In addition, there is an effect that a high-density printed wiring board having a fine circuit pattern and stable electrical characteristics can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1〜第3図はそれぞれ本発明実施例を説明す
るプリント配線板要部の断面図、拡大断面図およ
び断面図である。 1……基板、2……孔、3……多孔質板、4…
…孔2に近接した範囲、5……孔2から遠ざかつ
た範囲、6……粉粒体、7……毛細管、11……
銅箔、12……無電解銅めつき層、13,14…
…電気めつき層。
1 to 3 are a cross-sectional view, an enlarged cross-sectional view, and a cross-sectional view of a main part of a printed wiring board, respectively, explaining an embodiment of the present invention. 1... Substrate, 2... Hole, 3... Porous plate, 4...
...Range close to hole 2, 5... Range far from hole 2, 6... Powder, 7... Capillary, 11...
Copper foil, 12... Electroless copper plating layer, 13, 14...
...Electroplated layer.

Claims (1)

【特許請求の範囲】[Claims] 1 金属化された貫通孔を有する基板の表裏面に
三次元方向に連通曲折した網状構造となつた毛細
管を有する多孔質板を密着させて、その多孔質板
を介して電気めつき液を強制的に流しながら電気
めつきを行なうことを特徴とするプリント配線板
のめつき方法。
1 A porous plate having capillary tubes in a three-dimensionally connected and bent network structure is brought into close contact with the front and back surfaces of a substrate having metalized through holes, and an electroplating liquid is forced through the porous plate. A method for plating printed wiring boards, which is characterized by performing electroplating while flowing a target.
JP14397378A 1978-11-21 1978-11-21 Printed circuit board and method of plating same Granted JPS5570089A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14397378A JPS5570089A (en) 1978-11-21 1978-11-21 Printed circuit board and method of plating same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14397378A JPS5570089A (en) 1978-11-21 1978-11-21 Printed circuit board and method of plating same

Publications (2)

Publication Number Publication Date
JPS5570089A JPS5570089A (en) 1980-05-27
JPS6237840B2 true JPS6237840B2 (en) 1987-08-14

Family

ID=15351350

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14397378A Granted JPS5570089A (en) 1978-11-21 1978-11-21 Printed circuit board and method of plating same

Country Status (1)

Country Link
JP (1) JPS5570089A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001048274A1 (en) * 1999-12-24 2001-07-05 Ebara Corporation Apparatus for plating substrate, method for plating substrate, electrolytic processing method, and apparatus thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5097866A (en) * 1973-12-28 1975-08-04
JPS5125772A (en) * 1974-08-27 1976-03-02 Fujitsu Ltd Purintohaisenbanno metsukihoho

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5097866A (en) * 1973-12-28 1975-08-04
JPS5125772A (en) * 1974-08-27 1976-03-02 Fujitsu Ltd Purintohaisenbanno metsukihoho

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001048274A1 (en) * 1999-12-24 2001-07-05 Ebara Corporation Apparatus for plating substrate, method for plating substrate, electrolytic processing method, and apparatus thereof

Also Published As

Publication number Publication date
JPS5570089A (en) 1980-05-27

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