JPS6233469A - Mis field defect transistor - Google Patents

Abstract

PURPOSE:To contrive the improvement in hot electron resistance by the quantity of channel doping consequent on miniaturization by using the insulating film which prevents the impurity diffusion except that of silicon oxide at least in a part of a gate film and using the electrode having a work function difference from that of the substrate which is of a positive value or a negative value close to zero for the gate electrode. CONSTITUTION:On a P-type silicon substrate 101, an N<+> type diffusion region 102 for forming source and drain, a gate film 103 of nitrided silicon oxide which is formed by directly nitriding the 20-50Angstrom thickness of surface region of a silicon oxide film, and P-type polysilicon gate electrode 104 in which boron is diffused by about 1X10<20> concentration are formed. The polysilicon gate 104 doped with boron and the film 103 in which the surface region of 20-50Angstrom thickness of a silicon oxide film is converted into nitrided silicon oxide are combined so as to make a threshold voltage a positive value by a small quantity of channel doping. Accordingly, generation of hot electrons in a miniaturized MIS transistor can be restrained and a transistor having a stable threshold voltage can be fabricated.

Description

[Detailed description of the invention] [Industrial application field] This relates to the structure of the transistor.

[Conventional technology]

Conventionally, in an n-channel MO8 field effect transistor,
As shown in FIG. 3, silicon dioxide is used for the gate film 303, and aluminum or polycrystalline silicon containing type 1 impurities is used for the gate electrode 204. Na8.302
3 is a diffusion layer region, and 305 is an element isolation region. When MIS transistors such as those described above are miniaturized, the withstand voltage and threshold voltage decrease as the channel becomes shorter. In order to prevent the above phenomenon and control the threshold voltage, the channel region is usually doped with impurities by ion implantation (hereinafter referred to as channel doping).

[Problems that the invention attempts to resolve]

In the conventional threshold voltage control method using channel doping described above, the shorter the channel length, the more the channel
The amount of dope increases. Therefore, in the pinch-off state,
The extension of the /in depletion layer becomes smaller, and the electric field at the do1/in end becomes stronger. As a result, a carrier multiplication phenomenon occurs, hot carriers are generated, and some of the carriers are injected into the gate oxide film. Some of the injected carriers are captured by trap levels in the oxide film, so ζ in the film
This charge is generated and changes the threshold voltage. This variation in threshold voltage hinders the miniaturization of MOS transistors.

The electric field at the drain end is weakened, and the threshold voltage is reduced to f
It is known that one way to achieve ltllN is to make the gate p+ type. In other words, the work function difference between the silicon substrate and p-type polycrystalline silicon [0.4v<pm substrate]
, 0.9V (n-type substrate), l wo flJ to increase the threshold voltage and decrease the channel dope 1. However, polycrystalline silicon is p There were major drawbacks, such as the voltage changing and the threshold voltage changing.

In addition, titanium, tungsten, Kuntal,
It is also possible to control the threshold voltage using metals with relatively high work function values such as niobium, molybdenum, palladium, rhodium, nickel, setone, and platinum, as well as their silica and f-do; and its silicide is S
Many of them were highly reactive with l and Sio2, and the threshold voltage sometimes became unstable.

The present invention provides an MIS field effect transistor that eliminates the above-mentioned conventional drawbacks, reduces the amount of channel doping accompanying miniaturization, improves hot electron resistance, and provides stable transistor characteristics. The purpose is to

[Means for solving problems]

The MIS type field effect transistor of the present invention is a MIS type field effect transistor in which an insulating film that prevents diffusion of impurities other than silicon oxide is used in at least a part of the gate film, and the gate cell has a high resistance to the work with the substrate. Grooves are formed by using electrodes in which the numerical difference is positive or has a negative value close to zero.

The two-gate film can be effectively controlled by using polycrystalline silicon doped with silicon on the surface of a silicon oxide film.

Furthermore, the same method can be implemented by using a high melting point metal or its silicide for the silicon oxide surface electrode as the gate film.

[Laughter example]

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a longitudinal sectional view of an embodiment of the present invention.

In FIG. 1, 101 is a p-type silicon substrate, 102 is an n-type diffusion region forming a source/drain, and 103 is a gate made of silicon nitride oxide by directly nitriding the surface area of a silicon oxide film with a thickness of 20 to 50λ. The film 104 is a p+ type polycrystalline silicon gate electrode in which boron is diffused to a concentration of about 1X10''.

The threshold voltage is controlled by the impurity concentration of the substrate, the thickness of the gate film, and the boron concentration in the polycrystalline silicon gate electrode. The boron concentration of the substrate directly under the gate electrode is lXl0”
c1rL-'', the work function difference between the p+ type gate electrode and the substrate is approximately 0.35 eV.

A silicon nitride oxide film formed by directly nitriding the surface of a silicon oxide film has a thickness of about 20× and prevents boron in the gate electrode from diffusing into the gate film. Furthermore, since the dielectric constant of this gate film is almost the same as that of a thermal oxide film, the threshold voltage will not be lowered. Further, when most of the region of the gate film is converted to silicon nitride oxide, the trap levels in the gate film increase, but the number of trap levels in the above film is relatively small. As described above, the polycrystalline silicon gate doped with boron and the surface portion 20 of the silicon oxide film
By combining a film obtained by converting the film thickness region of 50 mm with silicon nitride oxide, the threshold voltage can be made to a positive value with a small amount of channel doping. This greatly reduces the generation of hot electrons in miniaturized MIS transistors, making it possible to create transistors with stable threshold voltages.

The above explanation is exactly the same even if the gate film 103 is replaced with a silicon nitride film obtained by directly nitriding the silicon substrate, except that the dielectric constant of the gate film changes. A similar argument can be made even if the board is replaced with a mouth-shaped board.

FIG. 2 is a longitudinal sectional view of another embodiment of the invention. Second
In the figure, 201 is a p-type silicon substrate, 202 is a rectangular type diffusion region forming a source/drain, 203 is a gate film obtained by converting the surface area of a silicon oxide film with a thickness of 20 to 50 mm into silicon nitride oxide, and 204 is a platinum gate electrode. The work function of platinum is about 5.6 eV, and the difference in work function from that of the silicon substrate is about 0.6 e'M. The above-mentioned gate film reacts with platinum less than once, and the diffusion of platinum into the gate film is also small. Therefore, as in the case of FIG. 1, the threshold voltage can be stably controlled.

In the above explanation, titanium, tungsten, tantalum, niobium, molybdenum, palladium,
The same effect can be obtained using metals such as rhodium, nickel, and selenium, and their silicides. Further, the same effect can be obtained by using a silicon nitride film obtained by directly nitriding silicon as the gate film.

〔Effect of the invention〕

As explained above, the present invention provides a gate film that prevents impurity diffusion, such as a film in which the surface area of a silicon oxide film with a thickness of 20 to 50 cm is converted to silicon nitride or silicon nitride oxide, and a substrate. The threshold voltage can be adjusted by combining the gate voltage using polycrystalline silicon doped with impurities so that the work function difference between the iii! The use of In reduces the amount of channel doping accompanying miniaturization, thereby improving hot electron resistance and providing stable transistor characteristics.

[Brief explanation of drawings]

Figure 1 is a longitudinal sectional view of one example of a part of the present invention, 42 is a longitudinal sectional view of another example of the present invention, and the third country is a conventional MO3
FIG. 2 is a cross-sectional view of a type '1: field effect transistor. 101.201.301...p-type silicon substrate, 102.202.3oL...diffusion layer region, 1
03゜203...Gate film using impurity diffusion prevention film other than silicon oxide film at least in part, 30
3...Gate film (silicon dioxide film), 104
・・・・・・． Boron-doped polycrystalline silicon gate electrode! 'Rin, 20
4...Platinum gate, 1 pole, 304...
Gate '1' (aluminum or n-type polycrystalline silicon). 105.205,305...Element isolation region. π' Agent Ben 1st Attorney Uchihara, Yo, ＼1mu 1
Part 42 Figure

Claims (1)

[Claims] 1. In an MIS field effect transistor, an insulating film that prevents diffusion of impurities other than silicon oxide is used in at least a part of the gate film, and the gate electrode has a positive or negative work function difference with the substrate. An MIS type field effect transistor characterized by using an electrode having a negative value close to zero. 2. Surface portions 20 to 50 of silicon oxide film as gate film
The MIS field effect transistor according to claim 1, wherein a film having a film thickness of 1.5 Å is converted to silicon nitride or silicon nitride oxide, and the gate electrode is made of boron-doped polycrystalline silicon. 3. Surface portions 20 to 50 of silicon oxide film as gate film
The MIS field effect transistor according to claim 1, wherein a film having a film thickness of 1.5 Å is converted to silicon nitride or silicon nitride oxide, and the gate electrode is made of a high melting point metal or its silicide.