JPH11233758A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain an MOS transistor in which boron in a gate electrode can be prevented from diffusing in a silicon substrate without causing increase of capacitance of a depletion layer. SOLUTION: This semiconductor device is provided with a gate oxide film 2 formed on an N-type silicon substrate 1, a silicon nitride film 3 which is formed on the gate oxide film 2, contains nitrogen and has a thickness of at most 1 nm, converting into film thickness of a silicon oxide film, and a gate electrode 4 which is formed on the silicon nitride film and constituted of a polysilicon film containing boron.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a MOS type semiconductor element such as a MOS transistor and a method for manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, MOS transistors have been used in various semiconductor devices. For the gate electrode of the MOS transistor, a polysilicon film is used instead of an Al film from the viewpoint of heat resistance.

However, since the polysilicon film has a higher resistance than the Al film, an n-type or p-type impurity is added to the polysilicon film used for the gate electrode to reduce the resistance.

For example, in a dual-gate MOS transistor, a polysilicon film doped with boron (B-doped polysilicon film) is used as a gate electrode. In this type of MOS transistor, boron in the gate electrode diffuses into the silicon substrate, which causes a variation in threshold voltage, a variation in threshold voltage between elements (variation), and a reduction in current driving capability. Problems occur.

In order to solve such a problem, it has been proposed to form an anti-diffusion film in the gate electrode.
FIG. 11 is a process sectional view of this type of gate electrode. First, as shown in FIG. 11A, a surface of a silicon substrate 81 is thermally oxidized to form a gate oxide film 82, and a polysilicon film 8 serving as a gate electrode is formed on the gate oxide film 82.
Form 3

Next, as shown in FIG. 11B, nitrogen ions 84 are implanted into the polysilicon film 83 to form a region 85 containing nitrogen in the polysilicon film 83. This area 85
Functions as a diffusion prevention film.

Next, as shown in FIG. 11C, boron ions 86 are implanted into the polysilicon film 83 to reduce the resistance of the polysilicon film 83. The activation of the nitrogen ions 84 and the boron ions 86 may be performed simultaneously or separately.

[0010] Finally, as shown in FIG. 11 D, the polysilicon film 83 containing nitrogen (B-doped polysilicon film) is etched to complete the gate electrode 83. In the gate electrode 83 thus formed, the diffusion of boron in the gate electrode 83 stops at the region 85 containing nitrogen.
Problems such as fluctuation in threshold voltage can be solved.

However, a MOS transistor using this type of gate electrode 83 has the following problems. FIG. 12 shows the concentration distribution of nitrogen and boron in the gate electrode 83 into which nitrogen and boron have been introduced by ion implantation. FIG. 13 shows a capacitance distribution in the gate electrode 83.

From these figures, it can be seen from FIG.
It is found that boron hardly diffuses into the gate electrode 83, and as a result, a high-resistance portion where boron does not exist remains in the gate electrode 83, and the depletion layer capacitance increases.

If the nitrogen ions 84 are implanted with a small width at a deep position of the gate electrode 83, the high resistance portion is reduced, and it seems that the increase of the depletion layer capacitance can be prevented. However, since the implantation position of the nitrogen ions 84 varies, and the nitrogen ions 84 are distributed with a width of about 100 nm, when the nitrogen ions 84 are implanted deeply into the gate electrode 83, the nitrogen ions 84 Membrane 82
Through the surface of the silicon substrate 81 to cause problems such as a fluctuation in threshold voltage.

[0012]

As described above, in order to prevent boron of the gate electrode (in the B-doped polysilicon film) from diffusing into the silicon substrate, boron ions are added to the gate electrode (the undoped polysilicon film). A method of forming a boron diffusion preventing film by implanting nitrogen ions before injecting nitrogen has been proposed.

However, there is a problem that the diffusion of boron is hindered by nitrogen, a high-resistance portion remains in the gate electrode, and the capacity of the depletion layer increases. The present invention has been made in view of the above circumstances, and an object of the present invention is to prevent impurities in a gate electrode from being introduced into a semiconductor substrate without deteriorating performance related to the gate electrode such as an increase in depletion layer capacitance. It is an object of the present invention to provide a semiconductor device having a MOS type semiconductor element capable of preventing diffusion and a method of manufacturing the same.

[0014]

Means for Solving the Problems [Structure] In order to achieve the above object, a semiconductor device according to the present invention (claim 1)
A gate insulating film formed on a semiconductor substrate; a thin film formed on the gate insulating film, containing nitrogen and having a thickness of 1 nm or less in terms of a silicon oxide film; and a thin film formed on the thin film. And a gate electrode containing impurities.

Here, the thin film is, for example, a thin film containing nitrogen and silicon. Depending on the ratio of nitrogen and silicon,
It becomes an insulating thin film or a semiconductor thin film. The nitrogen concentration is 1
% Is preferable.

According to another aspect of the present invention, there is provided a semiconductor device, comprising: a gate insulating film formed on a semiconductor substrate and containing nitrogen; and a gate electrode formed on the gate insulating film and containing impurities. Wherein the nitrogen is distributed so as to have one peak concentration of 1% or more in the thickness direction of the gate insulating film, and the portion where the nitrogen concentration peaks is formed by the semiconductor substrate and the gate. It is characterized by not being in contact with the electrode.

Here, the thin film is, for example, a thin film containing nitrogen, silicon and oxygen. Further, another semiconductor device according to the present invention (claim 3) is the same as the semiconductor device (claim 2).
The first gate insulating film formed in contact with the surface of the semiconductor substrate, the second gate insulating film formed on the first gate insulating film, and the second gate insulating film. And a third gate insulating film formed in contact with the lower part of the gate electrode on the gate insulating film of (i), and a nitrogen concentration peaks in the second gate insulating film. It is characterized by becoming.

Further, in another semiconductor device according to the present invention (claim 4), in the semiconductor device (claim 3), the first and third gate insulating films have a nitrogen concentration of 0%. It is characterized by.

Further, in another semiconductor device according to the present invention (claim 5), in the above-mentioned semiconductor device (claim 2), nitrogen and nitrogen of the first gate insulating film are removed from the second insulating film. The nitrogen concentration decreases toward the semiconductor substrate, and the nitrogen concentration of the third gate insulating film decreases from the second insulating film toward the gate electrode.

The above semiconductor device (claims 3 to 5)
Is a case where the gate insulating film of the present invention (claim 2) has a laminated structure, but may have a single-layer structure. However, the laminated structure is easier to manufacture.

Another semiconductor device according to the present invention (Claim 6) is the semiconductor device according to the present invention (Claims 1 to 5).
The impurity is boron, and the gate electrode is a polysilicon film.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: forming a gate insulating film on a semiconductor substrate; The method includes a step of forming a thin film having a thickness of 1 nm or less in terms of a thickness of an oxide film, and a step of forming a gate electrode containing impurities on the thin film.

Here, the thin film is, for example, a thin film containing nitrogen and silicon. Depending on the ratio of nitrogen and silicon,
It becomes an insulating thin film or a semiconductor thin film. The nitrogen concentration is 1
% Is preferable. The thin film is formed by a deposition method such as a CVD method.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: forming a gate insulating film on a semiconductor substrate; forming a semiconductor thin film on the gate insulating film; By nitriding the whole or the surface of the semiconductor thin film, the film thickness becomes 1 in terms of the silicon oxide film.
forming an insulating thin film containing nitrogen having a thickness of 1 nm or less or a laminated film comprising the semiconductor thin film and the insulating thin film containing nitrogen having a thickness of 1 nm or less in terms of the thickness of a silicon oxide film; Forming a gate electrode containing impurities thereon.

Further, in another method of manufacturing a semiconductor device according to the present invention (claim 9), a step of forming a first gate insulating film on a semiconductor substrate and a step of forming nitrogen on the first gate insulating film are performed. Forming a second gate insulating film including
Forming a third gate insulating film on the third gate insulating film, and forming a gate electrode containing impurities on the third gate insulating film, wherein the first, second and third gate insulating films are formed. In the gate insulating film having a laminated structure composed of the above insulating films, nitrogen is distributed so as to have one peak concentration of 1% or more in the film thickness direction, and the portion where the nitrogen concentration has a peak is formed as described above. The film formation conditions of the gate insulating film having the stacked structure are set so as to be a second insulating film.

Here, the first gate insulating film is formed by a deposition method such as a CVD method. The deposition conditions are
For example, in the case where the first to third gate insulating films are formed by a CVD method, nitrogen contained in the source gas for the second gate insulating film among the source gases for the first to third gate insulating films. The highest content.

The amount is set so that the nitrogen concentration of the second gate insulating film becomes 1% or more. Further, it is preferable that the nitrogen concentration of the first and third gate insulating films is 0%.
According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: thermally oxidizing a surface of the semiconductor substrate with an oxidizing gas containing nitrogen; and forming a first gate containing nitrogen on the surface of the semiconductor substrate. Forming an insulating film; thermally oxidizing a surface of the semiconductor substrate to form a second gate insulating film at an interface between the semiconductor substrate and the first gate insulating film; Forming a third gate insulating film on the insulating film; and forming a gate electrode containing impurities on the third gate insulating film, wherein the first, second, and third insulating films are formed. Nitrogen is distributed in the gate insulating film having a stacked structure composed of a film so as to have one peak concentration of 1% or more in the thickness direction, and a portion where the nitrogen concentration is a peak is the second concentration. Gate of the laminated structure so as to be an insulating film of And setting the conditions for forming the border membranes.

The film forming conditions are, for example, that the nitrogen content in the oxidizing gas forming the first gate insulating film is higher than the nitrogen content in the oxidizing gas forming the second gate insulating film. (The content is adjusted so that the nitrogen concentration of the first gate insulating film becomes 1% or more), and the third gate insulating film is formed by CVD using a source gas containing no nitrogen. It is formed by a method. The nitrogen concentration of the second and third gate insulating films is preferably 0%.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the present invention, wherein the impurity is boron and the gate electrode is a polysilicon film. It is characterized by being.

According to the present invention (claim 1), the impurity in the gate electrode can be prevented from diffusing into the semiconductor substrate by the thin film containing nitrogen. This diffusion prevention effect
Particularly high when the impurity is boron.

As a result, it is possible to solve the problem of characteristic fluctuation and performance deterioration of the MOS type semiconductor device due to the diffusion of impurities in the gate electrode into the semiconductor substrate. Further, since the value obtained by converting the thickness of the thin film into the thickness of the silicon oxide film (equivalent silicon oxide film thickness) is 1 nm or less, the increase in the depletion layer capacitance is small and can be ignored.

Here, the silicon oxide film equivalent film thickness (T
_eff ) is defined as T _eff = (ε _SiO2 / ε _N ) · _TN (ε _SiO2 : dielectric constant of silicon oxide film, ε _N : dielectric constant of thin film containing nitrogen, T _N : thin film containing nitrogen Film thickness).

Therefore, according to the present invention, the MOS type transistor can be formed by diffusing impurities in the gate electrode into the semiconductor substrate without deteriorating performance related to the gate electrode, ie, without increasing depletion layer capacitance. It is possible to solve the problem of characteristic fluctuation and performance deterioration of a semiconductor element. Also,
Such a MOS semiconductor element can be realized, for example, by the method of manufacturing a semiconductor device according to the present invention (claims 7 and 8).

According to the present invention (claim 2), the impurity in the gate electrode can be prevented from diffusing into the semiconductor substrate by the gate insulating film containing nitrogen. This diffusion preventing effect is particularly high when the impurity is boron or when the nitrogen concentration is 1% or more.

As a result, it is possible to solve the problems of characteristic fluctuation and performance deterioration of the MOS type semiconductor device due to diffusion of impurities in the gate electrode into the semiconductor substrate. In addition, since a portion having a high nitrogen diffusion concentration of 1% or more, which is a portion having a high diffusion preventing effect, is not in contact with the gate electrode, the supply of the oxidizing agent at the edge portion of the gate electrode during the post-oxidation is reduced. It is not hindered by the part having the peak concentration.

Therefore, a sufficient amount of the oxidizing agent can be supplied to the edge of the gate electrode, so that the performance of the gate electrode is deteriorated, that is, the edge of the gate electrode is sharpened and the gate breakdown voltage is reduced. The problem does not occur.

Further, it is a portion having a high diffusion prevention effect.
Since the portion having the nitrogen peak concentration is also in contact with the semiconductor substrate, it is possible to prevent characteristic fluctuation and performance deterioration due to diffusion of nitrogen to the surface of the semiconductor substrate.

[0038]

Embodiments of the present invention (hereinafter, referred to as embodiments) will be described below with reference to the drawings.
(First Embodiment) FIG. 1 is a process sectional view showing a method for forming a p-channel MOS transistor according to a first embodiment of the present invention.

First, as shown in FIG. 1A, an n-type silicon substrate 1 (for example, a specific resistance of 1 Ω · cm, a crystal plane (10
On the entire surface of 0)), a gate oxide film 2 having a thickness of, for example, 5 nm is formed by a thermal oxidation method. The n-type silicon substrate 1
Instead, an n-type well formed by ion implantation on the surface of a p-type silicon substrate may be used.

As shown in FIG. 1B, the gate oxide film 2
A silicon nitride film 3 having a thickness of 2 nm as a boron diffusion prevention film is formed thereon by a CVD method. Here, the total thickness of the silicon nitride film 3 and the gate oxide film 2 is 4 to 6
nm is preferred. The silicon nitride film 3 has a thickness of 2n.
m, but the equivalent silicon oxide film thickness is 1 nm or less. Further, the nitrogen concentration of the silicon nitride film 3 is preferably 1% or more.

Next, as shown in FIG. 2B, a polysilicon film 4 serving as a gate electrode is formed on the silicon nitride film 3 by CVD.
It is formed using a method. Here, if the silicon nitride film 3 and the polysilicon film 4 are formed by, for example, a CVD method of a gas sequence as shown in FIG. 2, they can be continuously formed in the same furnace, so that the process is simplified (reduction in the number of steps). Can be achieved.

Thereafter, boron ions are implanted into the polysilicon film 4 to form a polysilicon film 4 having a boron concentration of, for example, 3 × 10 ²⁰ cm ⁻³ . Next, as shown in FIG. 1C, after a resist pattern 5 for forming a gate electrode is formed on the polysilicon film 4, the polysilicon film 4 is etched using the resist pattern 5 as a mask, and the gate electrode 4 is etched. To form

Next, as shown in FIG. 1D, after the resist pattern 5 is peeled off, using the gate electrode 4 as a mask,
P-type impurity ions (eg, BF ₂ ions) are implanted into the surface of the n-type silicon substrate 1 to form p-type source / drain regions 6.
To form Thereafter, the p-type impurity ions in the p-type source / drain regions 6 are activated to complete the p-type MOS transistor.

According to the present embodiment, the silicon nitride film 3 can prevent boron in the gate electrode 4 from diffusing into the n-type silicon substrate 1. This solves the problem of MOS transistor characteristic fluctuations (eg, threshold voltage fluctuations) and performance degradation (eg, current drive capability deterioration) due to the diffusion of boron in the gate electrode 4 into the n-type silicon substrate 1. it can.

Since the equivalent silicon oxide film thickness of the silicon nitride film 3 is 1 nm or less, the increase in the depletion layer capacitance is small and can be ignored. Therefore, according to the present embodiment,
N-type silicon substrate 1 without increasing the depletion layer capacitance.
Thus, the problem of variation in characteristics and performance degradation of the MOS transistor due to diffusion of B in the gate electrode 4 can be solved.

In this embodiment, the silicon nitride film 3 is used as the boron diffusion preventing film, but a silicon oxynitride film may be used. The film is formed by, for example, a CVD method. In addition, the silicon nitride film 3 may be a combination of silicon and nitrogen, or a mixture of silicon and nitrogen, in which silicon and nitrogen are not combined, or a mixture of both. good. The same can be said for the silicon oxynitride film.

In the present embodiment, the gate electrode 4 containing boron is formed by ion implantation. However, the gate electrode 4 may be formed by a CVD method using a gas material containing boron. (Second Embodiment) FIG. 3 is a process sectional view showing a method for forming a p-channel MOS transistor according to a second embodiment of the present invention.

First, as shown in FIG. 3A, an n-type silicon substrate 11 (for example, a specific resistance of 1 Ω · cm, a crystal plane (1
00)), the thickness is, for example, 5 nm by thermal oxidation.
Of the gate oxide film 12 is formed. Note that instead of the n-type silicon substrate 11, an n-type well formed by ion implantation on the surface of the p-type silicon substrate may be used.

Next, as shown in FIG. 3B, an amorphous silicon film 13 having a thickness of 2 nm is formed on the gate oxide film 12.
Is formed using a CVD method. Next, as shown in FIG. 3C, the amorphous silicon film 13 is nitrided by annealing at 900 ° C. for 60 minutes in an NH ₃ atmosphere, and the entire amorphous silicon film 13 is made of silicon as a boron diffusion preventing film. Change to nitride film 14.

The nitrogen concentration of the silicon nitride film 14 is preferably at least 1%. Also, if nitriding is performed by annealing at a higher temperature than the film forming temperature in the case of forming by the CVD method, the silicon nitride film 14 with few traps can be formed.

Here, the total thickness of the silicon nitride film 14 and the gate oxide film 12 is preferably 4 to 6 nm. Also,
The thickness of the silicon nitride film 14 is about 2 nm, and the equivalent silicon oxide film thickness is 1 nm or less.

Next, as shown in FIG. 3C, a polysilicon film 15 serving as a gate electrode is formed on the silicon nitride film 14. Here, formation of the amorphous silicon film 13,
Nitriding of amorphous silicon film 13 (silicon nitride film 1
4), and the formation of the polysilicon film 15 is performed, for example, as shown in FIG.
If the gas sequence shown in FIG. 4A or FIG. 4B is used, the processes can be performed continuously in the same furnace, so that the process can be simplified (the number of steps can be reduced).

The gas sequence shown in FIG. 4B enables more effective nitriding. However, FIG.
The implementation of the gas sequence (a) is easier. Thereafter, boron ions are implanted into the polysilicon film 15 and the polysilicon film 1 having a boron concentration of, for example, 3 × 10 ²⁰ cm ^−3.
5 is formed.

Next, as shown in FIG. 3D, a resist pattern (not shown) is formed on the polysilicon film 15, and then the polysilicon film 15 is etched using the resist pattern as a mask to form the gate electrode 15 Form. Thereafter, the resist pattern is stripped.

Next, as shown in FIG. 2D, p-type impurity ions (for example, BF ₂ ions) are ion-implanted into the surface of the n-type silicon substrate 11 using the gate electrode 15 as a mask.
A p-type source / drain region 16 is formed. After a while
By activating the p-type impurity ions in the p-type source / drain regions 16, a p-channel MOS transistor is completed.

According to the present embodiment, the silicon nitride film 14
Thereby, it is possible to prevent boron in the gate electrode 15 from diffusing into the n-type silicon substrate 11. This solves the problem of MOS transistor characteristic fluctuations (eg, threshold voltage fluctuations) and performance degradation (eg, current drive capability deterioration) due to the diffusion of boron in the gate electrode 15 into the n-type silicon substrate 11. it can.

Since the equivalent silicon oxide film thickness of the silicon nitride film 14 is 1 nm or less, the increase in the depletion layer capacitance is small and can be ignored. When the silicon nitride film 14 is formed, even if excessive nitridation is performed, the amount of nitrogen introduced into the interface between the n-type silicon substrate 11 and the gate oxide film 12 is smaller than in the conventional case, so that the characteristics of the MOS transistor are reduced. Fluctuations and performance degradation can be suppressed.

Therefore, according to the present embodiment, the B in the gate electrode 15 diffuses into the n-type silicon substrate 11 without causing an increase in the depletion layer capacitance, thereby causing the problem of characteristic fluctuation and performance deterioration of the MOS transistor. Can be solved.

Although the entire amorphous silicon film 13 is changed to the silicon nitride film 14 in the present embodiment, only the surface of the amorphous silicon film 13 may be changed to the silicon nitride film 14. In this case, the total thickness of the amorphous silicon film 13 and the silicon nitride film 14 in terms of the silicon oxide film is set to 1 nm or less. Specific film forming conditions in this case, for example, 950 ° C. in NH ₃ atmosphere, 6
0 minutes. In addition, modifications similar to those of the first embodiment are possible. (Third Embodiment) FIG. 5 is a process sectional view showing a method for forming a nonvolatile memory cell having a double gate structure according to a third embodiment of the present invention.

First, as shown in FIG. 5A, a p-type silicon substrate 21 (for example, a specific resistance of 1 Ω · cm, a crystal plane (1
00)), the thickness is, for example, 5 nm by thermal oxidation.
Of the gate oxide film 22 is formed. Note that, instead of the p-type silicon substrate 21, a p-type well formed by ion implantation on the surface of the n-type silicon substrate may be used.

Next, as shown in FIG. 5B, an amorphous silicon film 2 having a thickness of 2 nm is formed on the silicon oxide film 22.
3 is formed using a CVD method. Next, as shown in FIG. 3B, the surface of the amorphous silicon film 23 is nitrided by annealing at 900 ° C. for 60 minutes in an NH ₃ atmosphere, and the surface of the amorphous silicon film 23 is used as a boron diffusion preventing film. Is formed.

The nitrogen concentration of the silicon nitride film 24 is 1
% Is preferable. Further, if nitriding is performed by annealing at a high temperature higher than the film forming temperature when the film is formed by the CVD method, the silicon nitride film 24 with few traps can be formed.
Can be formed.

Here, the total thickness of the silicon nitride film 24 and the gate oxide film 22 is preferably 4 to 6 nm. Also,
The equivalent silicon oxide film thickness of the silicon nitride film 24 is 1 nm.
It is as follows.

Thereafter, as shown in FIG. 3B, a first polysilicon film 25 serving as a floating gate electrode is formed on the silicon nitride film 24. Here, similarly to the case of the second embodiment, the formation of the amorphous silicon film 23, the nitridation of the amorphous silicon film 23 (formation of the silicon nitride film 24), and the formation of the polysilicon film 25 are performed, for example, using the gas shown in FIG. If performed in a sequence, they can be performed continuously in the same furnace, so that the process can be simplified (the number of steps can be reduced).

Thereafter, boron ions are implanted into the polysilicon film 25 to form a polysilicon film 25 having a boron concentration of, for example, 3 × 10 ²⁰ cm ⁻³ . Next, as shown in FIG. 5C, an insulating film 26 serving as an inter-gate electrode insulating film and a second polysilicon film 27 containing impurities such as boron serving as a control gate electrode are formed on the first polysilicon film 25. Are sequentially formed according to a known method.

Next, as shown in FIG. 5D, a resist pattern (not shown) is formed on the second polysilicon film 26, and the second resist pattern is used as a mask.
The polysilicon film 27, the insulating film 26, and the first polysilicon film 25 are sequentially etched to form a floating gate electrode 25,
An inter-gate electrode insulating film 26 and a control gate electrode 27 are formed.

Next, as shown in FIG. 4D, n-type impurity ions (for example, phosphorus ions) are implanted into the surface of the p-type silicon substrate 21 using the control gate electrode 27 as a mask, and the n-type source / drain regions 28 are formed. After that, the n-type impurity ions in the n-type source / drain regions 28 are activated to complete the nonvolatile memory cell.

According to the present embodiment, the silicon nitride film 24
Thereby, it is possible to prevent boron in the floating gate electrode 25 from diffusing into the p-type silicon substrate 21. This gives p
The problem of characteristic fluctuation (for example, fluctuation of threshold voltage) and performance deterioration (for example, reduction of current driving capability) of the nonvolatile memory cell due to diffusion of boron in the floating gate electrode 25 into the silicon substrate 21 can be solved. .

Since the equivalent silicon oxide film thickness of the silicon nitride film 24 is 1 nm or less, the increase in the depletion layer capacitance is small and can be ignored. Therefore, according to the present embodiment, the problem of characteristic fluctuation and performance deterioration of the nonvolatile memory cell due to the diffusion of boron in the floating gate electrode 25 into the p-type silicon substrate 21 without increasing the depletion layer capacitance. Can be solved.

In addition to the above effects, in the case of a nonvolatile memory cell using the gate oxide film 22 as a tunnel oxide film, the presence of the amorphous silicon film 23 allows the floating gate electrode 25 and the p-type Silicon substrate 21
Also, the effect of increasing the electron injection efficiency between the steps can be obtained.

If such an effect on the injection efficiency is unnecessary, the entire amorphous silicon film 23 may be replaced with the silicon nitride film 24. A specific film forming method in this case is, for example, annealing at 950 ° C. for 30 minutes in an NH ₃ atmosphere. (Fourth Embodiment) FIG. 6 is a process sectional view showing a method for forming a p-channel MOS transistor according to a fourth embodiment of the present invention.

First, as shown in FIG. 6A, an n-type silicon substrate 31 (for example, a specific resistance of 1 Ω · cm, a crystal plane (1
00)), a silicon oxide film 32 having a thickness of, for example, 2 nm as a first gate insulating film is deposited by a CVD method using a mixed gas of SiH ₂ Cl ₂ / N ₂ O, for example. Instead of the n-type silicon substrate 31, an n-type well formed by ion implantation on the surface of the p-type silicon substrate may be used.

Next, as shown in FIG.
CVD using a mixed gas of H ₂ Cl ₂ / N ₂ O / NH ₃
By a method, a silicon oxynitride film 33 having a nitrogen concentration of 2% or more and a thickness of, for example, 1 nm is formed as a second gate insulating film and a boron diffusion preventing film on the silicon oxide film 32. By setting the thickness of the silicon oxynitride film 33 to 1 nm or less, an increase in the capacity of the depletion layer can be prevented.

Next, as shown in FIG. 6C, a silicon oxide film 34 having a thickness of, for example, 2 nm as a third gate insulating film is deposited on the silicon oxynitride film 33 by using the CVD method. A polysilicon film 3 having a boron concentration of, for example, 3 × 10 ²⁰ cm ^-3 on the silicon oxide film 34;
5 is formed.

Next, as shown in FIG. 6D, a resist pattern 36 for forming a gate electrode is formed on the polysilicon film 35.
After the formation of the gate electrode 3, the polysilicon film 35 is etched using the resist pattern 36 as a mask.
5 is formed.

Next, as shown in FIG. 6E, after the resist pattern 36 is peeled off, p-type impurity ions (for example, boron ions such as BF ₂ ions) are added to the n-type silicon substrate by using the gate electrode 35 as a mask. 31 to form a p-type source / drain region 37. Thereafter, the p-type impurity ions in the p-type source / drain regions 37 are activated to complete the p-channel MOS transistor.

According to the present embodiment, the silicon oxynitride film 3
According to 3, boron in the gate electrode 35 can be effectively prevented from diffusing into the n-type silicon substrate 31. This solves the problem of MOS transistor characteristic fluctuation (eg, threshold voltage fluctuation) and performance degradation (eg, current driving capability reduction) due to diffusion of boron in the gate electrode 35 into the n-type silicon substrate 31. it can.

After the step shown in FIG. 6E, oxidation called post-oxidation is usually performed. This is oxidation in which the edge of the gate electrode 35 is oxidized and rounded to suppress the electric field concentration at the edge of the gate electrode 35.

Here, as shown in FIG. 7A, when the silicon nitride film 33 is formed so as to be in contact with the lower portion of the gate electrode 35, a sufficient amount of the oxidizing agent is not supplied to the edge of the gate electrode 35. .

As a result, as shown in FIG. 7B, the post-oxide film 38 is formed so that the edge of the gate electrode 35 is sharpened, and there is a problem that the gate breakdown voltage is reduced. However, in the case of the present embodiment, since the silicon nitride film 33 is not in contact with the gate electrode 35, the supply of the oxidizing agent at the edge of the gate electrode 35 is hindered by the silicon nitride film 33 during post-oxidation. Never.

Therefore, according to the present embodiment, a sufficient amount of the oxidizing agent is supplied to the edge of the gate electrode 35, and the edge of the gate electrode 35 can be rounded as shown in FIG. The electric field concentration in the part can be suppressed. Thereby, the gate withstand voltage can be improved.

Further, since the silicon nitride film 33 is also in contact with the n-type silicon substrate 31, the silicon nitride film 33
Variations in characteristics and performance degradation due to the diffusion of nitrogen in the surface of the n-type silicon substrate 31 can also be prevented.

In this embodiment, the silicon oxide film 3
Although the silicon oxynitride film 33 is formed directly on the substrate 2, the silicon oxynitride film 33 may be formed after the surface of the silicon oxide film 32 is nitrided with a nitriding gas such as NH ₃ .

Similarly, without directly forming the silicon oxide film 34 on the silicon oxynitride film 33,
After oxidizing the surface with an oxidizing gas such as O ₂ gas, the silicon oxide film 34 may be formed.

As described above, before forming the silicon oxynitride film 33 and the silicon oxide film 34, by nitriding and oxidizing the base, the flatness of the base surface can be improved, thereby improving the reliability of the gate insulating film. Can be achieved.

In this embodiment, the case where nitrogen is present only in the central portion of the gate oxide film as shown in FIG. 8 has been described. However, as shown in FIG. Nitrogen may be present.

The point is that the nitrogen is distributed so as to have one peak concentration of 1% or more in the thickness direction of the gate oxide film, and the portion where the nitrogen concentration peaks is the n-type silicon substrate 31 and It does not have to be in contact with the gate electrode 35. (Fifth Embodiment) FIG. 10 is a process sectional view showing a method for forming a p-channel MOS transistor according to a fifth embodiment of the present invention.

First, as shown in FIG. 10A, the entire surface of an n-type silicon substrate 41 (for example, a specific resistance of 1 Ω · cm, crystal plane (100)) is, for example, N ₂ O gas or NO.
By thermal oxidation using a mixed gas of / O ₂ , a silicon oxynitride film 42 having a thickness of, for example, 3 nm as a first gate insulating film is formed. The nitrogen concentration of the silicon oxynitride film 42 is 1
% Or more. Note that, instead of the n-type silicon substrate 41, an n-type well formed by ion implantation on the surface of the p-type silicon substrate may be used.

Next, as shown in FIG. 10B, the entire surface of the n-type silicon substrate 41 is thermally oxidized in an oxidizing gas atmosphere containing no nitrogen, so that the n-type silicon substrate 41 and the silicon oxynitride film 42 In between, a silicon oxide film 43 having a thickness of, for example, 1 nm as a second gate insulating film is formed.

Next, as shown in FIG. 9B, a silicon oxide film 44 having a thickness of, for example, 2 nm is formed as a third gate insulating film on the silicon nitride oxide film 42. Next, FIG.
As shown in FIG. 1C, a polysilicon film 45 having a boron concentration of, for example, 3 × 10 ²⁰ cm ^{−3 serving} as a gate electrode is formed.

Thereafter, the gate electrode 45 and the n-type source / drain regions 46 are formed as shown in FIG. 10D according to the same steps as those of the fourth embodiment after the step of FIG. 6D.
Is formed to complete a p-channel MOS transistor.

According to the present embodiment, the silicon oxynitride film 4
According to 2, boron in the gate electrode 45 can be effectively prevented from diffusing into the n-type silicon substrate 41. This can solve the problem of characteristic fluctuation and performance deterioration of the MOS transistor due to diffusion of B in the gate electrode 45 into the n-type silicon substrate 41.

Since the silicon nitride oxide film 42 is not in contact with the gate electrode 45, the gate electrode 2
The supply of the oxidizing agent at the edge portion 5 is not hindered by the silicon oxynitride film 42.

Therefore, according to the present embodiment, a sufficient amount of the oxidizing agent can be supplied to the edge of the gate electrode 45 and the edge of the gate electrode 45 can be rounded, so that the electric field concentration at the edge can be suppressed. . Thereby, the gate withstand voltage can be improved.

Further, since the silicon oxynitride film 42 is also in contact with the n-type silicon substrate 41, characteristic fluctuations and performance deterioration due to the diffusion of nitrogen in the silicon oxynitride film 42 to the surface of the n-type silicon substrate 41 are prevented. Can be prevented.

In this embodiment, the silicon oxynitride film 42 is formed by thermal oxidation using N ₂ O gas or NO / O ₂ gas.
3 may be formed, and the surface of the silicon oxide film 43 may be formed by nitriding in a NO gas atmosphere or an N ₂ O gas atmosphere.

The method for forming the silicon oxide film 44 is as follows.
The method is not limited to the CVD method, and may be formed by replacing nitrogen on the surface of the silicon oxynitride film 42 with oxygen using, for example, OH ions, oxygen ions, oxygen radicals, or the like.

As another method of forming the silicon oxide film 44, there is a method of forming the silicon nitride oxide film 42 in a silicon-rich manner and thermally oxidizing the surface of the silicon nitride oxide film 42. Further, there is a method of performing natural oxidation by leaving in the air instead of thermal oxidation.

In addition, modifications similar to those of the fourth embodiment are possible. For example, if the above conditions are satisfied, nitrogen may be present in the entire gate oxide film. Note that the present invention is not limited to the above embodiment. For example, in the above embodiment, the case where the polysilicon film containing boron is used as the gate electrode has been described, but the present invention can be applied to the case where another impurity or another film is used.

In the fourth and fifth embodiments, the case of a gate oxide film having a three-layer structure has been described. However, the present invention can be applied to a gate oxide film having four or more layers or a single layer. is there.

In the above embodiment, the case of the p-channel is described in the first, third to fifth embodiments. However, the present invention can be applied to the case of the n-channel by reversing the conductivity types. Applicable. Similarly, in the second embodiment, the case of the n-channel is described, but the present invention can be applied to the case of the p-channel by reversing each conductivity type.

In the above embodiment, the case of a normal MOS transistor or a nonvolatile memory cell having a double gate structure has been described.
Transistors and other MOs such as CMOS transistors
It can also be applied to S-type semiconductor devices. In addition, various modifications can be made without departing from the scope of the present invention.

[0103]

As described in detail above, the present invention (claim 1)
According to the method, by forming a thin film containing nitrogen on the gate insulating film and having a thickness of 1 nm or less in terms of the thickness of the silicon oxide film, the gate electrode can be formed on the semiconductor substrate without increasing the depletion layer capacitance. The diffusion of the impurities in the electrodes can be prevented.

According to the present invention (claim 2), a gate insulating film containing nitrogen is used, and the nitrogen has one peak concentration of 1% or more in the thickness direction of the gate insulating film. By preventing the portion where the nitrogen concentration is distributed and the peak of the nitrogen concentration from coming into contact with the semiconductor substrate and the gate electrode, the edge of the gate electrode is not sharpened during the post-oxidation so that the gate can be formed on the semiconductor substrate. The diffusion of the impurities in the electrodes can be prevented.

[Brief description of the drawings]

FIG. 1 shows a p-channel MO according to a first embodiment of the present invention.
Sectional drawing showing the method of forming the S transistor

2 is a silicon nitride film of the MOS transistor of FIG. 1,
The figure which shows the gas sequence in the case of forming a polysilicon film

FIG. 3 shows a p-channel MO according to a second embodiment of the present invention.
Sectional drawing showing the method of forming the S transistor

FIG. 4 is a view showing a gas sequence when forming the amorphous silicon film, the silicon nitride film, and the polysilicon film shown in FIG. 3;

FIG. 5 is a process sectional view showing a method for forming a nonvolatile memory cell according to a third embodiment of the present invention.

FIG. 6 shows a p-channel MO according to a fourth embodiment of the present invention.
Sectional drawing showing the method of forming the S transistor

FIG. 7 is a diagram for explaining a problem when a silicon nitride film is formed so as to be in contact with a lower part of a gate electrode;

8 is a sectional view and a nitrogen concentration distribution when the post-oxidation is performed on the p-channel MOS transistor of FIG. 6;

9 is a sectional view showing a modification of the p-channel MOS transistor shown in FIG. 6 and a diagram showing a nitrogen concentration distribution.

FIG. 10 shows a p-channel M according to a fifth embodiment of the present invention.
Process cross-sectional view illustrating a method for forming an OS transistor

FIG. 11 is a process sectional view showing a conventional method for forming a gate electrode having a diffusion prevention film.

12 is a diagram showing the concentration distribution of nitrogen and boron in the gate electrode of the MOS transistor of FIG.

13 is a diagram showing a capacitance distribution in a gate electrode of the MOS transistor of FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... n-type silicon substrate 2 ... gate oxide film 3 ... silicon nitride film (diffusion prevention film) 4 ... polysilicon film (gate electrode) 5 ... resist pattern 6 ... p-type source / drain region 11 ... n-type silicon substrate 12 ... Gate oxide film 13 ... Amorphous silicon film 14 ... Silicon nitride film (diffusion prevention film) 15 ... Polysilicon film (gate electrode) 16 ... P-type source / drain region 21 ... P-type silicon substrate 22 ... Gate oxide film 23 ... Amorphous silicon Film 24: silicon nitride film (diffusion prevention film) 25: first polysilicon film (floating gate electrode) 26: insulating film between gate electrodes 27: second polysilicon film (control gate electrode) 28: p-type source Drain region 31 n-type silicon substrate 32 silicon oxide film (first gate insulating film) 33 silicon nitride oxide film (second (Gate insulating film, diffusion preventing film) 34 silicon oxide film (third gate insulating film) 35 polysilicon film (gate electrode) 36 resist pattern 37 p-type source / drain region 38 post-oxide film 41 n Type silicon substrate 42: silicon oxynitride film (first gate insulating film, diffusion preventing film) 43: silicon oxide film (second gate insulating film) 44: silicon oxide film (third gate insulating film) 45: poly Silicon film (gate electrode) 46 ... p-type source / drain region

Claims (11)

[Claims] A gate insulating film formed on the semiconductor substrate; a thin film formed on the gate insulating film and containing nitrogen and having a thickness of 1 nm or less in terms of a silicon oxide film; A semiconductor device, comprising: a gate electrode formed on a thin film and containing an impurity. 2. A semiconductor device comprising: a gate insulating film formed on a semiconductor substrate and containing nitrogen; and a gate electrode formed on the gate insulating film and containing impurities. Regarding the film thickness direction, 1
%, Wherein a portion having a peak concentration of not less than 1% and having a peak of the nitrogen concentration is not in contact with the semiconductor substrate and the gate electrode. 3. The semiconductor device according to claim 1, wherein said gate insulating film includes a first gate insulating film formed in contact with a surface of said semiconductor substrate;
A second gate insulating film formed on the gate insulating film of
A gate insulating film having a stacked structure including a third gate insulating film formed on the second gate insulating film in contact with a lower portion of the gate electrode, and the second gate insulating film has a nitrogen concentration 3. The semiconductor device according to claim 2, wherein? 4. The semiconductor device according to claim 3, wherein said first and third gate insulating films have a nitrogen concentration of 0%. 5. The nitrogen concentration of the first gate insulating film decreases from the second insulating film toward the semiconductor substrate, and the nitrogen concentration of the third gate insulating film is 3. The semiconductor device according to claim 2, wherein the nitrogen concentration decreases from the second insulating film toward the gate electrode. 6. The semiconductor device according to claim 1, wherein said impurity is boron, and said gate electrode is a polysilicon film. 7. A step of forming a gate insulating film on a semiconductor substrate, and a step of forming a thin film containing nitrogen on the gate insulating film and having a thickness of 1 nm or less in terms of a silicon oxide film. Forming a gate electrode containing impurities on the thin film. 8. A step of forming a gate insulating film on a semiconductor substrate, and after forming a semiconductor thin film on the gate insulating film, nitriding the whole or the surface of the semiconductor thin film to form a silicon oxide film. An insulating thin film containing nitrogen having a thickness of 1 nm or less in terms of film thickness, or a laminated film comprising the semiconductor thin film and an insulating thin film containing nitrogen having a thickness of 1 nm or less in terms of a silicon oxide film. A method of manufacturing a semiconductor device, comprising: forming a gate electrode; and forming a gate electrode containing an impurity on the insulating thin film. 9. A step of forming a first gate insulating film on a semiconductor substrate; a step of forming a second gate insulating film containing nitrogen on the first gate insulating film; Forming a third gate insulating film on the insulating film; and forming a gate electrode containing an impurity on the third gate insulating film, wherein the first, second, and third insulating films are formed. 1% or more of 1% or more in the thickness direction of the gate insulating film having a laminated structure composed of a film.
Nitrogen is distributed so as to have two peak concentrations, and the film forming conditions of the gate insulating film having the stacked structure are set so that a portion where the nitrogen concentration has a peak becomes the second insulating film. A method for manufacturing a semiconductor device. 10. A step of thermally oxidizing the surface of the semiconductor substrate with an oxidizing gas containing nitrogen to form a first gate insulating film containing nitrogen on the surface of the semiconductor substrate; Oxidizing to form a second gate insulating film at an interface between the semiconductor substrate and the first gate insulating film; and forming a third gate insulating film on the first gate insulating film. Forming a gate electrode containing impurities on the third gate insulating film, wherein the gate insulating film having a laminated structure including the first, second, and third insulating films has the film formed therein. 1% or more in the thickness direction
Nitrogen is distributed so as to have two peak concentrations, and the film forming conditions of the gate insulating film having the stacked structure are set so that a portion where the nitrogen concentration has a peak becomes the second insulating film. A method for manufacturing a semiconductor device. 11. The method according to claim 6, wherein said impurity is boron, and said gate electrode is a polysilicon film.