JPS62298126A - Testing method for semiconductor device - Google Patents

Abstract

PURPOSE:To accelerate the measurement by a method wherein the electrodes of respective semiconductor circuit chips are connected to the electrodes of the other chips by a wiring formed on a scribe line to bring multiple probing needles into contact with the electrodes. CONSTITUTION:Within respective semiconductor circuit chips 4 on a semiconductor wafer 6, electrodes 2 impressed with the same voltage in case of testing electric characteristics are connected to one another by a wiring 3 formed on a scribe line 1. Multiple probing needles 5 fixed on a printed circuit board corresponding to a part of electrode pattern are brought into contact with a part of the electrodes 2 to test the electric characteristics of semiconductor circuit. At this time, the number of probing needles 5 per chip brought into contact with the electrodes 2 is reduced. Thus, the measurement can be accelerated.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention Field of Industrial Application The present invention relates to a method for testing the electrical characteristics of a semiconductor circuit formed on a semiconductor wafer at the wafer stage.

Conventional technology The conventional test method at the stage is to bring a probe needle into contact with all the electrodes of each semiconductor circuit chip formed on a semiconductor wafer, and test the semiconductor wafer in units of chips or in units of multiple chips. There were tests for the electrical characteristics of all semiconductor circuits formed.

Problems to be Solved by the Invention In the conventional testing method, probe needles must be brought into contact with all the electrodes of each semiconductor circuit chip formed on a semiconductor wafer. The distance between the plurality of probe needles becomes narrower, and a probe card with a high density of probe needles must be used. Furthermore, it is difficult to use relatively large needles such as coaxial probe needles used for high-precision measurements. Further, there are problems such as the electrode peeling off due to contact with the probe needle, and variations in the contact resistance between the electrode and the probe needle resulting in variations in characteristics.

In view of this, the present invention connects the electrodes of each of the semiconductor circuit chips to the electrodes of other chips through wiring formed on the scribe line, and connects the electrodes of each semiconductor circuit chip to the electrodes of other chips without bringing the probe needle into contact with any of the electrodes. It is an object of the present invention to provide a method capable of testing the electrical characteristics of an entire semiconductor circuit formed thereon.

Means for Solving the Problems In order to solve the above problems, the present invention connects the electrodes of each semiconductor circuit chip on a semiconductor wafer to the electrodes of other chips by wiring formed on a scribe line, and This method tests the electrical characteristics of a semiconductor circuit by bringing a plurality of probe needles attached to a printed board in a pattern into contact with a portion of the electrode.

Effect of the Invention In the present invention, the number of probe needles that are brought into contact with the electrodes per chip is reduced by the above-described means, so that the probe needles can be brought into contact with the electrodes of many chips at the same time, and can be used for high-precision measurements. It is also possible to use relatively large needles, such as coaxial probe needles. Further, since the probe needle does not come into contact with the electrode 2, which is at a common potential due to the wiring 3, the electrode is not damaged, and the electrical characteristics include variations in contact resistance between the electrode and the probe needle. Things are suppressed.

EXAMPLES The present invention will be explained in more detail below based on the drawings. As shown in FIG. 1, in each semiconductor circuit chip 4 on a semiconductor wafer 6, electrodes 2 to which the same voltage is applied when testing electrical characteristics are connected by wiring 3 formed on a scribe line 1. .

Next, as shown in FIG. 2, a plurality of probe needles 5 attached to the printed board corresponding to a portion of the electrode pattern are brought into contact with a portion of the electrode 2 to test the electrical characteristics of the semiconductor circuit. Further, the wiring 3 formed on the scribe line 1 is connected to each chip 4 using a dicing sawyer, a laser, etc.
will be cut when separating. Note that 7 is an electrode that does not need to be brought into contact with the probe needle on the chip 4.

As described in detail, according to the present invention, the number of probe needles that are brought into contact with the electrodes per chip can be reduced.
Probe needles can be brought into contact with the electrodes of many chips at the same time, making it possible to speed up measurement. Further, the electrode is not damaged by contact with the probe needle, and variations in contact resistance between the electrode and the probe needle during measurement can be suppressed from being included in the electrical characteristics.

[Brief explanation of the drawing]

FIG. 1 is a schematic plan view of a main part of a semiconductor wafer used in the present invention, and FIG. 2 is a diagram showing the testing method of the present invention. 1...Scripe line, 2...Electrode, 3...Wiring, 4...Chip, 5...
...Probe needle, 6...Wafer. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
figure

Claims (1)

[Claims] A scribe line is provided between an electrode on each semiconductor circuit chip on a semiconductor wafer and the above-mentioned chip, and the electrode of each semiconductor circuit chip is connected to the electrode of another chip by a wiring formed on the scribe line, and the above-mentioned electrode A plurality of probe needles provided corresponding to one part of the pattern are connected to one of the electrodes.
1. A method for testing a semiconductor device, characterized by testing the electrical characteristics of a semiconductor circuit by bringing it into contact with a semiconductor device.