JPH03154883A - Testing jig for semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To shorten a test time by mounting plural sockets on a printed board and providing conductive patterns for connecting respective terminals of the semiconductor circuit tester. CONSTITUTION:Two sockets S0 and SL are mounted on the printed board P. Then plural conductive patterns are so provided that test input terminals Ai1 - Ain of an IC tester are connected to input terminals of an IC to be tested on the side of the socket S0 and test control terminals A01 - A0n of the IC tester are connected to output terminals of the IC to be tested; and respective terminals of the socket S0, conductive patterns AI1 - AIn, and A01 - A0n are connected by conductor materials Ci1 - Cin, and C01 - C0n. Consequently, plural ICs to be tested can be tested by one semiconductor circuit tester at a time, so the test time can be shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a jig for testing semiconductor integrated circuits (hereinafter abbreviated as IC).

[Prior Art] A conventional IC test jig of this type was constructed as shown in FIG.

That is, one socket S2 is mounted on the printed board P, and a semiconductor integrated circuit testing machine (hereinafter simply referred to as I) (not shown) is installed.
A plurality of conductive patterns are connected so that the test input terminals Ail to A (n of the IC tester) are connected to the input terminals of the IC under test, and the test output terminals AOL to AOn of the IC tester are connected to the output terminals of the IC under test. (indicated by the same symbols Ail to Ain and Aol-Aon as the terminals of the IC tester in the figure) are provided, and each terminal of the socket and the conductive pattern A are provided.
Conductive wire C between il NAin and Aol-Aon
11-Cit+ and Ca1-Con are connected.

[Issue M to be solved] The conventional semiconductor integrated circuit test jig mentioned above is a socket)3
Since only one 2 is mounted on the printed board P,
There is a problem in that it takes time to test a large number of ICs.

The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a semiconductor SM circuit test jig in which a plurality of ICs under test can be tested at one time using one IC tester.

[Means for Solving the Problems] In order to achieve the above object, the semiconductor integrated circuit testing jig of the present invention has a socket for the semiconductor integrated circuit under test mounted on the printed board, and a test input terminal of the semiconductor integrated circuit testing machine. A semiconductor integrated circuit test jig having a test output terminal connected to an input terminal of the semiconductor integrated circuit under test, and a test output terminal connected to an output terminal of the integrated circuit under test, including a plurality of sockets mounted on the printed board; A conductive pattern is provided for connecting the terminals of the semiconductor circuit testing machine, and each terminal of the plurality of sockets and the conductive pattern are connected by a conductive wire.

[Example] An example of the present invention will be described below with reference to the drawings. Note that in the following description, common reference numerals are given to parts common to the conventional one.

FIG. 1 is a plan view showing one embodiment of the present invention.

Two sockets SO and 51 are mounted on the printed board P.

On the socket SI side, there are multiple terminals so that one test input terminal Ail NAin of an IC tester (not shown) is connected to the input terminal of the IC under test, and test output terminals Aol to Aon of the IC tester are connected to the output terminals of the IC under test. conductive pattern (Ail to Ain with the same symbols as the terminals of the IC tester in the figure)
and Aol-Aon) are provided, and each terminal of the socket SO and conductive patterns Ail-Ain and A are provided.

1-Aon, conductive wire C1l NC1n and Co
Connect with 1NCon.

Also, on the socket Sl side, connect the test input terminals Bil to Bin of the IC tester to the input terminals of the IC under test,
A plurality of conductive patterns (
In the figure, Bjl-Bin and B are the same as the terminals of the IC tester.
ol to non) are provided, and each terminal of the socket Sl and conductive patterns Bil to Bin and Bol N are provided.
Conductive wires Dil ~ Dln and Dol-
It is connected by Don.

Figure 2 shows the state of the memory inside the IC tester when the test pattern is loaded, and the test terminals All”Ain and nil
NBin also test terminals Aol ~ Aon and Bol ~ Bo
n is loaded with the same test pattern, and if this test pattern is loaded into the IC tester, two ICs to be tested can be tested with one IC jig.

In the illustrated embodiment, only two sockets are shown, but of course a larger number may be used, and the present invention is not limited to the illustrated example.

[Effect of the Invention J As explained above, the semiconductor integrated circuit test jig according to the present invention has a plurality of sockets mounted on a printed board, and
A conductive pattern is provided to connect the terminals of the semiconductor circuit testing machine, and each terminal of the plurality of sockets is connected to the conductive pattern using a conductive wire, so that one semiconductor circuit The ability to test a plurality of ICs under test at once using a testing machine has the effect of shortening testing time.

[Brief explanation of the drawing]

FIG. 1 is a plan view showing an overall outline of an embodiment of the present invention, FIG. 2 is a graph showing the state of the memory in the IC tester when testing an IC in the example of FIG. FIG. 2 is a plan view schematically showing the entire semiconductor integrated circuit test jig. P Niblint plate So, Sl, S2: Socket Ai 1/VAin, Bi 1~Bi n: IC tester test terminal and conductive pattern Aol~Aon, Bol
~Bon: Engineering C tester test terminal and conductive pattern Cil ~C
in, Col ~ Can: Conductive wire material Di 1-Din,
Dot-Don: Conductive wire material Tl-T6: Test pattern number

Claims (1)

[Claims] A socket for a semiconductor integrated circuit under test is mounted on a printed board, the test input terminal of a semiconductor integrated circuit tester is connected to the input terminal of the semiconductor integrated circuit under test, and the test output terminal is connected to the input terminal of the semiconductor integrated circuit under test. In a semiconductor integrated circuit test jig connected to an output terminal of an integrated circuit, a plurality of sockets are mounted on the printed board, and
A semiconductor integrated circuit characterized in that a conductive pattern is provided for connecting each of the terminals of the semiconductor circuit testing machine, and each terminal of the plurality of sockets and the conductive pattern are connected by a conductive wire. Test jig.