JPS6228581B2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a semiconductor device.

Conventionally, the electrode wiring structure of semiconductor devices is a structure in which metal is deposited directly on the semiconductor substrate, with relatively deep PN
It was effective for joining. In recent years, advances in semiconductor technology have made it possible to fabricate very shallow PN junctions (shallow junction type).
When forming electrodes on a semiconductor element having a junction,
When electrode metal is directly vapor-deposited and heat-treated, accidents often occur in which the electrode metal diffuses into the semiconductor or penetrates through the joint. For this reason, the impurity diffusion layer changes, resulting in a change in layer resistance and short circuits at the junctions.

In order to compensate for these drawbacks, an electrode wiring structure as shown in FIG. 1 has recently been proposed. That is, the impurity diffusion layer 3 is formed using the oxide film 2 selectively formed on one surface of the silicon substrate 1 as a mask. Furthermore, an oxide film 4 is formed leaving a part of the impurity diffusion layer 3, a polycrystalline silicon layer is grown on the entire surface, and after diffusing an impurity having the same conductivity type as the impurity diffusion layer 3, thermal oxidation is performed to form a polycrystalline silicon layer. silicon layer 5
Then, electrical continuity between the impurity diffusion layer 3 and the oxide film 6 is formed. After that, the oxide film 6 is opened,
A metal electrode 7 is formed by vapor deposition. That is, by sandwiching the above-mentioned polycrystalline silicon 5 between the silicon substrate and the metal electrode, it is intended to prevent the diffusion of metal into the silicon, but even if it can be prevented to some extent, it is not perfect. Electrical instability such as breakdown voltage and leakage often occurred in the equipment.

SUMMARY OF THE INVENTION In view of the above drawbacks, it is an object of the present invention to provide a semiconductor device that can substantially prevent diffusion of electrode metal into a semiconductor and has a versatile electrode wiring structure.

The present invention is characterized by an impurity region of an opposite conductivity type formed on one main surface of a semiconductor substrate of one conductivity type, an insulating film provided on the one main surface, and an impurity region extending over the insulating film. A connection portion between a semiconductor layer of an opposite conductivity type connected to the impurity region through an opening provided in the insulating film in an intermediate portion excluding both ends, and the semiconductor layer located on the insulating film except over the opening. a metal electrode to be connected to the opening, an end of the opening facing the connecting part is a first end, an end of the connecting part facing the opening is a second end, and the end of the opening facing the connecting part is a second end; When the end opposite to the opening is defined as the third end, the length extending from the third end of the semiconductor layer to the side opposite to the opening is the same as the first end. In the semiconductor device, the length of the semiconductor layer is longer than the length of the semiconductor layer between the semiconductor layer and the second end.

Hereinafter, the present invention will be explained with reference to the drawings.

FIG. 2 is a sectional view showing an embodiment of the present invention. Impurity layer 3 is formed using oxide film 2 selectively formed on one surface of silicon substrate 1 as a mask. Further, an oxide film 4 is formed leaving a part of the impurity layer 3, and a semiconductor layer such as a polycrystalline silicon layer is grown over the entire surface. This polycrystalline silicon layer is thermally oxidized after diffusing impurities of the same conductivity type as the impurity layer 3 to lower the resistance of the polycrystalline silicon layer 5.
While obtaining electrical continuity between the impurity layer 3 and the impurity layer 3, an oxide film 6 is formed. Thereafter, a hole is formed in the oxide film 6 in the middle of the silicon layer 5 at a distance of several microns or more in the lateral direction from the connection between the polycrystalline silicon layer 5 and the impurity layer 3 using a photoetching technique, and a metal electrode 7 is formed by vapor deposition. to obtain a predetermined shape. By alloying the metal 7, the contact with the polycrystalline silicon 5 is strengthened.

As for the position of the metal electrode 7 mentioned above, it is important that the connection between the polycrystalline silicon 5 and the impurity layer 3 and the connection between the polycrystalline silicon 5 and the metal electrode 7 do not overlap, and that they are separated by a few microns or more, so that the connection between the polycrystalline silicon 5 and the impurity layer 3 is not overlapped. It is based on the principle that metal diffusion can be prevented.

The first effect of the present invention is that the connection part between the metal electrode and polycrystalline silicon is separated from the connection part of the impurity layer, and the metal electrode and the semiconductor substrate have a structure in which an oxide film is sandwiched between them. It is possible to completely prevent metal from diffusing into the silicon substrate during heat treatment.

In addition, the second effect of the present invention is that since polycrystalline silicon is formed on the oxide film, the contact area between the polycrystalline silicon and the electrode metal can be large, and there are fewer breaks in the electrode metal, making it more electrically reliable. An electrode wiring structure with excellent contact properties and stability can be obtained.

Further, the third effect of the present invention is that the metal electrode is not connected to the vicinity of the end of the semiconductor layer but to the intermediate portion thereof, so that the technique is versatile.
That is, with such a structure, the end of the semiconductor layer can be connected to, for example, another element region of the semiconductor substrate, and this metal electrode can be used as a common electrode for both element regions.

Although the embodiments have been described using a silicon substrate, similar effects can be obtained even if other semiconductors are used.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing the electrode wiring structure of a conventional semiconductor device, and FIG. 2 is a sectional view showing the electrode wiring structure of a semiconductor device according to an embodiment of the present invention. In the figure, 1 is a silicon substrate, 2 is an oxide film, 3 is an impurity layer, 4 is an oxide film, 5 is a polycrystalline silicon layer containing an impurity of the same conductivity type as the impurity diffusion layer 3, 6 is an oxide film, and 7 is the electrode metal.

Claims (1)

[Claims] 1. An impurity region of the opposite conductivity type formed on one main surface of a semiconductor substrate of one conductivity type, an insulating film provided on the one main surface, and an intermediate region extending over the insulating film excluding both ends thereof. a semiconductor layer of an opposite conductivity type connected to the impurity region through an opening provided in the insulating film in the section, and a metal electrode connected to a connecting portion of the semiconductor layer located on the insulating film except over the opening. The end of the opening facing the connecting part is a first end, and the end of the connecting part facing the opening is a second end.
and the end of the connecting portion opposite to the opening is the third end, a length extending from the third end of the semiconductor layer to the side opposite to the opening. is longer than the length of the semiconductor layer between the first end and the second end.