JPS62283664A - Manufacture of thin film semiconductor device - Google Patents

Abstract

PURPOSE:To increase the responding speed of a thin film semiconductor device by forming a multilayered film having different content rates of crystal components and order degrees of amorphous components by a plasma CVD method, and altering the amorphous component to crystal components. CONSTITUTION:A glass substrate is held at 400 deg.C, a layer 2 including fine crystal component and amorphous component is deposited by a plasma CVD method with monosilane gas diluted with hydrogen as a material, only hydrogen is introduced into a reaction furnace, and cooled to 300 deg.C. The monosilane is again fed to deposit a layer of only the amorphous component, and a semiconductor film is formed by repeating the operation three times. Then, a reaction furnace is set to 1 atm with nitrogen, a substrate temperature is set to 580 deg.C, and the amorphous layer of three layers is converted to crystal component 2a. After this film is island-photoetched, an SiO2 film is deposited. Then, an N<+> type layer is deposited while doping a phosphine, phosphorus is ion implanted to form a source, drain region after photoetching, and activated by heat treating. Then, PSG and aluminum are deposited, ITO is deposited, and TN type lquid crystal is sealed between another glass substrate deposited with ITO and the ITO. Thus, a semiconductor layer having high responding speed is obtained.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a thin film semiconductor device, and particularly to an active matrix type thin film transistor suitable for a display using liquid crystal or the like, and its manufacture. Regarding the method.

[Conventional technology]

In recent years, in displays using liquid crystal for display, an active matrix method is used in which a TPT (thin film transistor) is formed for each pixel in order to drive the liquid crystal of each pixel. This TPT is usually made from Poly-Si (polycrystalline silicon) grown on a quartz substrate.
(crystalline silicon) or in amorphous silicon grown on a glass substrate. Po1y-Si is usually monosilane (SiHi
) as a raw material, it is formed at a temperature of 640°C by a low pressure CVD method. When the deposition temperature is lower than about 600'C, the crystalline component of Po1y-Si rapidly decreases, and the amorphous component increases instead. For this reason, low pressure CVD
Poly-Si by the method must be deposited at a temperature of about 600°C or above, and therefore it is usually not possible to use a glass plate with a substantial strain temperature of about 600°C or below and a 7!11 temperature as a substrate. Although quartz substrates can withstand temperatures above 600'C, they have the drawback of high cost. In addition, Po1y deposited at 640 °C using a quartz substrate
-Si11 also contains an amorphous component of about 10% by volume. Therefore, the carrier mobility of this film is approximately 10aJ/for both electrons and holes.
These values are much lower than the values of v and s for single crystal silicon, and even if a TPT is manufactured using this film, the response speed as a display will be low.

It is still not enough to obtain a clear display.

(Refer to the paper entitled “Polycrystalline 5iTFT and its Applications” on page 24 of the 147th Committee on Amorphous Materials of the Japan Society for the Promotion of Science, 7th Research Meeting Materials) Amorphous Si is 1
It is usually deposited by plasma CVD at 350° C. or lower. The device often has an inverted staggered structure.The carrier mobility of this film is less than lad/v,s, and the above Po1
Even smaller than y-S i. In this case, there is an advantage that a glass substrate can be used, but the application as a display element is difficult.
For example, it is impossible to integrate peripheral circuits for driving a display, and color television display is not possible, and at most it can be used for monochrome televisions.

[Problem that the invention seeks to solve]

The carrier mobility of polycrystalline silicon TPT is approximately 10aj/
v, s, and the response speed of the transistor cannot be said to be sufficient. Furthermore, the cost of quartz as an insulating substrate is high, which is a major obstacle to further increasing the area of displays in the future. Since amorphous silicon TPT uses a glass substrate, there is no problem in terms of cost. However, the carrier mobility is usually less than 1a#/v,s, and the response of the transistor is very small, making the display unclear. There is a problem with becoming. Furthermore, due to the low carrier mobility, it is not possible to integrate peripheral circuits for driving the display, which makes it impossible to reduce the cost of the entire display. (NIKKEI HLECT-RONIC51984 titled “Full-color 4-inch LCD displays are coming one after another”)
11, 19P 209) The purpose of the present invention is to use a low-cost glass substrate with a low strain temperature and a low-temperature process to achieve high carrier mobility, high response speed of TPT, and high It is possible to integrate circuits by obtaining a semiconductor film.

[Means for solving problems]

The present invention first forms a multilayer film of a layer containing many microcrystalline components and a layer containing many amorphous components using a plasma CVD method, and then heat-treats this film at a low temperature below the strain point of a glass substrate or the like. It is characterized by converting an amorphous component into a crystalline component using the microcrystalline component as a core.

The present invention was achieved by discovering the following points. First, we define the concept of "degree of order" of the amorphous component. This corresponds to the average number of bonds between silicon atoms in the amorphous component, and in the case of perfect single crystal silicon with 4 bonds, the degree of order is 1, and in a gas (for example, 5iH4) consisting of molecules containing 1 silicon atom, the number of bonds is 4. In this case, the degree of order is 0, and the degree of order T of the amorphous component is O<T<1.

(1) Plasma CVDl containing many microcrystalline components! The degree of order of the amorphous components inside is high (large).

(2) The degree of order of the amorphous components in a plasma CVD film containing a large amount of amorphous components may be low (small).

(3) When heat-treating a mixed system containing both microcrystalline components and amorphous components, the amorphous components with a low degree of order tend to change into crystalline components.

The present invention will be specifically described as follows. The zero-order process involves forming a semiconductor layer containing a large amount of microcrystalline components on a glass substrate at a temperature of 400°C and a plasma power of 0.4 W/a#.
Temperature 300℃, plasma power 0.2 W/c! A semiconductor layer containing a large amount of amorphous component is formed under the conditions II. This process is repeated to form a multilayer film. First, this layered semiconductor film is heat treated at a temperature of 580° C. for 4 hours to change the amorphous component to a crystalline component, thereby obtaining a semiconductor film with a high crystalline component as a whole.

The present invention will be described more specifically as follows. When a film deposited at a temperature of 400° C. and a power of 0.4 W/j is examined by Raman method or thin film X-ray diffraction method, it contains a large amount of crystalline components. Furthermore, when this film is observed using a scanning electron microscope (SEM) or a transmission electron microscope (TEM), it can be seen that crystal components are scattered in a mosaic pattern. Therefore, the cross-sectional structure of this film is schematically shown as 2 in FIG. 1(a). 2-a represents a crystal component, and 2-b represents an amorphous component with a high degree of order. Next, when we examine the film deposited at a temperature of 300°C and a power of 0.2 W/aJ using Raman or X-ray diffraction, we find that it contains mostly amorphous components and no crystalline components. Similarly, SE
MJ? : It can be seen that the film quality is uniform when observed by ITEM.

Therefore, the cross-sectional structure of this film is schematically shown in Figure 1 (a
). Next, this layered semiconductor film is
After heat treatment at a temperature of 0''C for 4 hours, the crystal component 2-a expands into the amorphous region 3 with a low degree of order.At this time, the crystal component 2-a expands into the amorphous region 2-b with a high degree of order. It expands only slightly.Therefore, after the heat treatment, the crystalline components become the regions 2-a and 4, as shown in FIG. 1(b).

Next, even if a single-layer plasma CVD film is heat-treated, there is a limit to increasing the crystalline component. In the film after deposition, showing how the composition (crystalline content) changes.

The crystal content increases with increasing temperature, reaches a maximum at 400°C, and then decreases. Focusing on the increase in crystal content after heat treatment, the one at 300'C and the one at 600'C are smaller. This is because the film deposited at 300'C does not have a crystalline component that serves as a nucleus, and the film deposited at 600'C This is thought to be due to the fact that the film contains only amorphous components with a high degree of order. From the above, it can be seen that a single layer film deposited at any temperature cannot be expected to have a sufficient increase in crystalline components by heat treatment.

[Effect]

In the present invention, by controlling the temperature and plasma power, the amorphous component is formed using the microcrystalline component as a nucleus in the heat treatment process that continues to form a layer containing microcrystals and a layer containing an amorphous component with a low degree of order adjacent to each other. is converted into crystalline components. This is because the amorphous component, which has a low degree of order, has a small number of bonds between silicon atoms and a disordered atomic arrangement, resulting in low thermal energy during the heat treatment process.

This is because the bonds between silicon atoms are rearranged so that the atomic arrangement is the same as that of the crystalline components. if.

If only a semiconductor layer containing a microcrystalline component is formed, the amorphous component contained therein receives large thermal energy and plasma energy during film deposition, resulting in an increased degree of order. For this reason, only this layer is kept at a low temperature (580”
C) Even with heat treatment, the bonds in the amorphous component cannot be changed to have the same atomic arrangement as the microcrystalline component. Therefore, a large increase in crystalline components cannot be expected.

Next, the relationship between the amount (content) of crystal components and carrier mobility will be described. In a semiconductor consisting of a crystalline component and an amorphous component, carriers move due to both free electron behavior in the former region and hopping behavior in the latter region.Reducing the amorphous component and increasing the crystalline component is a two-fold process. Effect increases carrier mobility.

One is that the hopping region where the mobility itself is small is reduced, and the other is that the potential barrier for carriers within the crystal component becomes smaller because the trap density is reduced. The crystal content of the semiconductor film is increased from 90% to 9%.
When increased to 5%, the carrier mobility becomes approximately Load/
v,s to 50 cd/v,s or more.

〔Example〕

An embodiment of the present invention will be described below. FIG. 3 shows the cross-sectional structure of the entire TPT using the present invention. The substrate has a strain temperature of 58
It is a glass plate at 0'C. The substrate is kept at 400'C and the pressure is about I Torr using monosilane gas diluted to 5% with hydrogen as a raw material. High frequency power 0.4W/cd
100 layers containing microcrystalline components and amorphous components are deposited by plasma CVD. According to Raman spectroscopy, the crystal content in this layer is about 60%. Next, only hydrogen was introduced into the reactor to lower the substrate temperature by 3.
Cool to 00°C. Plasma power 0.2W/a#
Then, 5% monosilane gas was flowed again to deposit 100 layers of only amorphous components.

This operation is repeated three times to form a total of 600 semiconductor films. The reactor was then brought to 1 atmosphere with nitrogen.

The substrate temperature is maintained at 580° C. for 4 hours, at which time the three amorphous layers are converted into crystalline components. After this film is island-photographed, a 5iOz film for a gate insulating film is deposited by atmospheric pressure CVD. Next, while doping with phosphine using the plasma CVD method, an n layer for the gate electrode is deposited to a thickness of 0.15 μm at 300°C. After photoetching, phosphorus (P) is added 5X at an energy of 50 KeV.
The implanted source and drain regions are formed at a dose of 10''(!11-''). Next, the phosphorus in the ion implanted layer is activated by heat treatment at 580° C. for 4 hours. Next,
P S G (Phospho 5ilicate G
lass) and AQ are deposited. In addition, the transparent electrode I
TO is deposited by sputtering. T N (Twist
The channel width and channel length of the TPT of this embodiment are 20 μm and 10 μm, respectively.1 The I-V of this embodiment
The field effect mobility obtained from the turnip's gm is approximately 50 cd/
v, s. Further, the current ratio Io-/Ioz□ when the TPT is activated and when it is stopped is about I x 10'.

〔Effect of the invention〕

According to the present invention, it is possible to obtain a semiconductor layer on a glass substrate with a low strain temperature, in which the ratio of crystalline components to amorphous components is large, and therefore the mobility of carriers is large, and the response speed of a transistor is high when a TPT is manufactured. Can be done.

[Brief explanation of the drawing]

Figure 1 is a cross-sectional view schematically showing a multilayer film according to an embodiment of the present invention, Figure 2 is a graph showing the dependence of crystal content on deposition temperature in a single layer film produced by plasma CVD, and Figure 3 is a diagram showing the dependence of crystal content on deposition temperature. It is a composition showing an example of TPT according to the present invention. DESCRIPTION OF SYMBOLS 1... Insulating substrate, 2a... Crystal component, 2b... Amorphous component, 5... Channel region, 6... Source, 8... Gate insulating film, 9... Gate electrode, 10
...Oxide film, 12...Passivation film, 13...
・Transparent electrode.

Claims (1)

[Claims] 1. In a thin film semiconductor device having an insulating substrate and a semiconductor layer formed on the substrate, by changing one or both of the deposition temperature and plasma power when forming the semiconductor layer by plasma CVD method, 1. A method for manufacturing a thin film semiconductor device, comprising forming a multilayer film having a different content of crystalline components and a degree of order of amorphous components, and by subsequent heat treatment, the amorphous component is added to the crystalline component.