JPS6227751B2 - - Google Patents
Info
- Publication number
- JPS6227751B2 JPS6227751B2 JP56183320A JP18332081A JPS6227751B2 JP S6227751 B2 JPS6227751 B2 JP S6227751B2 JP 56183320 A JP56183320 A JP 56183320A JP 18332081 A JP18332081 A JP 18332081A JP S6227751 B2 JPS6227751 B2 JP S6227751B2
- Authority
- JP
- Japan
- Prior art keywords
- heat dissipation
- mounting pad
- insulated
- dissipation fin
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 17
- 230000017525 heat dissipation Effects 0.000 claims description 13
- 230000005855 radiation Effects 0.000 claims description 3
- 239000011347 resin Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 claims description 3
- 238000007789 sealing Methods 0.000 claims description 3
- 239000000919 ceramic Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000008188 pellet Substances 0.000 description 2
- 238000001721 transfer moulding Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000004382 potting Methods 0.000 description 1
- 238000005096 rolling process Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56183320A JPS5884450A (ja) | 1981-11-13 | 1981-11-13 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56183320A JPS5884450A (ja) | 1981-11-13 | 1981-11-13 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5884450A JPS5884450A (ja) | 1983-05-20 |
JPS6227751B2 true JPS6227751B2 (zh) | 1987-06-16 |
Family
ID=16133634
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56183320A Granted JPS5884450A (ja) | 1981-11-13 | 1981-11-13 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5884450A (zh) |
-
1981
- 1981-11-13 JP JP56183320A patent/JPS5884450A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5884450A (ja) | 1983-05-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6249041B1 (en) | IC chip package with directly connected leads | |
JP2509607B2 (ja) | 樹脂封止型半導体装置 | |
US6489678B1 (en) | High performance multi-chip flip chip package | |
US7759778B2 (en) | Leaded semiconductor power module with direct bonding and double sided cooling | |
US6566164B1 (en) | Exposed copper strap in a semiconductor package | |
US3665256A (en) | Heat dissipation for power integrated circuits | |
JPS63205935A (ja) | 放熱板付樹脂封止型半導体装置 | |
US3577633A (en) | Method of making a semiconductor device | |
US5299091A (en) | Packaged semiconductor device having heat dissipation/electrical connection bumps and method of manufacturing same | |
JP2008199022A (ja) | パワー半導体モジュールおよびその製造方法 | |
KR19980032479A (ko) | 표면 설치 to-220 패키지 및 그의 제조 공정 | |
US5317194A (en) | Resin-sealed semiconductor device having intermediate silicon thermal dissipation means and embedded heat sink | |
JPH1022435A (ja) | 半導体装置及びその製造方法 | |
US3560808A (en) | Plastic encapsulated semiconductor assemblies | |
JP2001118961A (ja) | 樹脂封止型電力用半導体装置及びその製造方法 | |
JP2002110867A (ja) | 半導体装置及びその製造方法 | |
JPH04249353A (ja) | 樹脂封止型半導体装置 | |
JPH0567697A (ja) | 樹脂封止型半導体装置 | |
JPS6227751B2 (zh) | ||
JPH11260968A (ja) | 複合半導体装置 | |
JP2012238737A (ja) | 半導体モジュール及びその製造方法 | |
JP4258391B2 (ja) | 半導体装置 | |
JP2939094B2 (ja) | 電力用半導体装置の製造方法 | |
JP2954112B2 (ja) | Bga型半導体装置及びその製造方法 | |
JPS61194755A (ja) | 半導体装置 |