JPS62273692A - Memory access system - Google Patents

Abstract

PURPOSE:To attain the effective utilization of a memory device by checking the propriety of data consecutive read based on an input address and an address number at a nibble control means and returning the discriminating result to an access side device. CONSTITUTION:A low-order 2-bit of an address (a) inputted from an access device 1 to a nibble memory 2 is inputted to a nibble discrimination circuit 6. The device 1 desiring 2-word consecutive read sends the address (a) to the memory 2 and sends an address number n1 to the discrimination circuit 6 respectively. When the number n1 is 2-word, the discrimination circuit 6 checks whether or not the low-order 2-bit of the address (a) is '11', and in case of not '11', a start signal e1 and an enable word number n2 are sent to a control circuit 3, which generates a timing signal required for the 2-word consecutive read and sent to the memory 2 via a gate 5. As a result, storage data (d) at addresses (a), a+1 are read sequentially from the memory 2 and returned to the device 1.

Description

[Detailed Description of the Invention] 3. Detailed Description of the Invention [Summary] In a memory device equipped with a nibble function, whether or not continuous reading of data is possible is checked based on the address and number of addresses input from the access side device; By sending the results back to the accessing device, restrictions on the use of the memory device are removed.

[Industrial application field]

The present invention relates to an improvement in a memory access method in a memory device having a continuous data read function.

As a means of improving the processing capacity of information processing systems, we have developed a function (hereinafter referred to as nibble function) that successively reads out a predetermined number of data stored in consecutive areas from the address input from the access side device. Attempts have been made to include this in memory devices.

In such a case, the memory device increments only the lower predetermined bits of the input address and performs continuous reading, so depending on the input address value, it is unlikely that the entire specified number of words can be read out continuously. Not exclusively.

It is desired that the storage area of such a memory device can be used without any restrictions.

[Conventional technology]

FIG. 3 is a diagram showing an example of a conventional memory device.

Assuming that the memory device is equipped with a four-word nibble function, the memory device adds 1 to the lower two bits of address a input from access device 1, and reads the data stored in each area following address a. can be read continuously.

However, for example, the lower two bits of the input address a are "
01", adding 1 will give "10", adding 2 will give "11", and adding 3 will give "OO", which will specify the address a that is one address before the input address a. Therefore, prefetch reading of four words becomes impossible.

Therefore, even if the access device 1 specifies continuous reading of 4 words, 3 words, or 2 words, the lower 2 bits of address a will be rolJ, , "10" and "10", respectively.
11'' or more, continuous reading of the specified number of words is impossible.

As a result, the access device 1 either stores the required number of words in advance at an address a of the nibble memory 2 from which continuous reading is possible, or considers in advance the number of consecutively read words corresponding to the storage address a.

In this state, if the access device 1 determines that continuous reading is possible, it inputs the address a to the nibble memory 2, and inputs the activation signal e1 and the number of addresses n1 to the nibble timing control circuit 3.

Nibble timing control circuit 3 generates a timing signal necessary for reading address number n1 and inputs it to nibble memory 2 via gate 5.

As a result, addresses a to (a+
The data d stored in n1-1) are sequentially read out,
It is sent back to the access device 1.

On the other hand, when continuous reading is not performed, the access device 1 inputs the address a to the nibble memory 2 and inputs the activation signal e2 to the timing control circuit 4.

Timing control circuit 4 inputs a timing signal necessary for reading one word to nibble memory 2 via gate 5.

As a result, data d stored at address a is read from nibble memory 2 and sent back to access device 1.

[Problem that the invention seeks to solve]

As is clear from the above description, in a conventional memory device, when using the nibble function provided by the nibble memory 2, it is necessary to consider the address a and the number of addresses n1, and the effective use of the memory device is There was an unforeseen problem.

[Means for solving problems]

FIG. 1 is a diagram showing the principle of the present invention.

In FIG. 1, 100 is an access side device and 200 is a memory.

300 is provided according to the present invention, and access side device 100
Based on the address a and the number of addresses input from
It is a nibble control means that checks whether continuous reading is possible for the number of addresses, returns the test result to the access side device lOO, and executes continuous reading of the possible number of words.

[Effect]

That is, according to the present invention, the nibble control means, based on the address a and the number of addresses input from the access side device,
Since it is checked whether or not continuous data reading of the address dissipation is possible and the determination result is returned to the access side device 100, memory access can be quickly performed without imposing restrictions on memory usage.

Note that it is also considered that the nibble control means 300 returns the number of words that can be read in advance to the access side device 100 as a result of the inspection.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 is a diagram showing a memory access method according to an embodiment of the present invention. Note that the same reference numerals refer to the same objects throughout the plan.

In FIG. 2, a nibble determination circuit 6 is provided as nibble control means 300.

The lower two bits of the address a input from the access device 1 to the nibble memory 2 are input to the nibble determination circuit 6.

In FIG. 2, an access device 1 desiring to read two words continuously inputs an address a to a nibble memory 2, and also inputs an address number n1 to a nibble determination circuit 6.

When the input address number n1 is two words, the nibble determination circuit 6 checks whether the lower two bits of the address a are "11".

If the lower two bits of the address a are not "11", it is determined that two-word continuous reading is possible, and the activation signal e1 and the possible number of words n2 (=2) are input to the nibble timing control circuit 3.

When the nibble timing control circuit 3 receives the activation signal e1 and the possible number of words n2 (=2) from the nibble determination circuit 6, it generates a timing signal necessary for continuous reading of two words, and outputs the nibble memory via the gate 5. Enter 2.

As a result, addresses a and (a
+1) is sequentially read out and sent back to the access device 1.

On the other hand, if the lower two bits of address a are "11", the nibble determination circuit 6 determines that two-word consecutive reading is not possible, and sends the disable signal f back to the access device 1, and also sends the disable signal f to the timing control circuit 4. Input the activation signal e2.

When the timing control circuit 4 receives the activation signal e2 from the nibble determination circuit 6, it inputs a timing signal necessary for reading one word to the nibble memory 2 via the gate 5.

As a result, data d stored at address a is read from nibble memory 2 and sent back to access device 1.

The access device 1 that received the disable signal f receives the data d stored at the address a, and then changes the address (a+
1) is transmitted to the nibble determination circuit 6, and the stored data d
Read out.

As is clear from the above description (according to this embodiment, the nibble determination circuit 6 checks whether or not the request from the access device 1 can be executed, and returns the test result by the “impossible signal”), so the access device 1 The nibble memory 2 can be used without considering a and the number of addresses n1.

Note that FIG. 2 is only one embodiment of the present invention, and for example, the nibble determination circuit 6 sends a disable signal r to the access device 1.
It is not limited to returning only the number of words, and it is also considered to return the impossibility signal f and the number of possible words n2,
Even in such a case, the effects of the present invention remain unchanged.

〔Effect of the invention〕

As described above, according to the present invention, in the memory device, the nibble control means checks whether continuous data reading is possible based on the address and the number of addresses input from the accessing device, and transmits the determination result to the accessing device. In order to send it back,
Memory usage contracts are removed and memory access becomes possible quickly.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the principle of the present invention, FIG. 2 is a diagram showing a memory device according to an embodiment of the present invention, and FIG. 3 is a diagram showing an example of a conventional memory device. In the figure, 1 is an access device, 2 is a nibble memory, and 3 is an access device.
1 is a nibble timing control circuit, 4 is a timing control circuit, 5 is a gate, 6 is a nibble determination circuit, 100 is an access side device, 200 is a memory, 300 is a nibble control means, a
is address, d is data, el and e2 are activation signals,
r is an invalid signal (test result), nl is the number of addresses, n2 is a possible word.

Claims (2)

[Claims] (1) In a memory device having a function of successively reading data (d) within a predetermined number stored in an area continuous from the start address (a) input from the access side device (100), Based on the address (a) and the number of addresses (n1) input from the access side device (100), it is checked whether or not continuous reading of data for the number of addresses (n1) is possible, and the test result (f) is sent to the access side device (100). A memory access method characterized in that nibble control means (300) is provided for returning data to the device (100) and for executing continuous readout of data for a possible number of words (n2). (2) As a result of the test, the nibble control means (300) returns the number of words (n2) that can be read continuously in data to the access side device (100), and also
2. The memory access method according to claim 1, wherein the memory access method executes continuous data reading.