JPS622707A - Potential correcting circuit - Google Patents

Abstract

PURPOSE:To attain the constant frequency characteristics, etc. by eliminating the potential variation of an element and therefore stabilizing the current level of a constant current source and the bias current of an inverse amplifier. CONSTITUTION:The potential in accordance with the potential supplied from a voltage/potential conversion circuit 1 is applied to a comparator 2. While the reference voltage given from a voltage source 3 is also supplied to the comparator 2. Then the output voltage of the comparator 2 is supplied to the circuit 1. The feedback control is applied so that the potential in accordance with that given from the circuit 1 is equal to the reference voltage given from the source 3. Then the output voltage of the comparator 2 functions to correct the potential at a fixed level. This output voltage is supplied to the element constituting a constant current source 4, for example, for stabilization of the current flowing to a load 5. This reduces the fluctuation of the characteristics of the load 5, etc.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a potential correction circuit for stabilizing the operation of, for example, an FET.

[Summary of the invention]

The present invention approximates the potential and corrects it so that this value becomes constant, thereby making it possible to remove fluctuations in vth of the FET.

[Conventional technology]

In the case of a so-called bipolar transistor, the value of the forward drop voltage VBI between the base and emitter is almost constant no matter what process is used.

On the other hand, in FETs, the fluctuation of the gate voltage (threshold voltage) Vth required to cause strong inversion is extremely large, to the extent that a general C-MOS process allows approximately ±0.2V. be.

In other words, vth is calculated by adding the energy (which is a necessary condition for strong inversion) to the flat band voltage VFB of the element, which will be described later, and then adding the charge (-2Ksε0qNA) in the depletion region.
(2φpp): Ks is the dielectric constant of the semiconductor, ε0 is the permittivity of vacuum, q is the charge element, NA is the acceptor impurity density), and Co is the oxide film capacitance per unit area). be.

・ ・ ・[1] Here, VFR is...(2) However, φM3 is the metal/semiconductor work relationship difference Qss is the interfacial charge density ρ per unit area, and the space charge density XQ is expressed by the oxide film thickness. Therefore, in a typical process, the value of vth is controlled by changing the amount of Qss using ion implantation silane or the like to change vpa. However, in reality, due to variations in G15s, the vthO value fluctuated by about ±0.2v.

When the fluctuation of vth is large in this way, it becomes extremely difficult to keep the potential of the FET constant if the gate-source potential difference VaS is kept constant, and as a result, the drain current In fluctuates, for example, This has the disadvantage that the current value when used as a current source and the bias current of an inverting amplifier fluctuate, resulting in large fluctuations in characteristics such as frequency characteristics.

That is, for the above equation (11), the gate voltage VG and
The relational expression with the interfacial potential φS when depleted is expressed as (3). Therefore, when an arbitrary voltage is applied to the gate, the variation ΔφS in the interfacial potential from the interfacial potential at vth is given by the following equation.

O ... (4) By the way, in the case of a normal MOS process, the reason why vth fluctuates is V FR + φpp, NA, in equation (1).
Go (7) One or more of the following changes.

Therefore, when the gate voltage VG is kept constant, if th fluctuates like this, in order to make equation (4) hold, the interfacial potential Δ when depleted is
φS will have to change.

This means that when the gate voltage vG is constant, the interfacial potential during depletion changes due to variations in vth.

Therefore, first considering the saturation region, the current formula in the FET saturation region can be found, for example, in the document r A. S. Grove, "P.
physics and technology
of Sea+1conductorDev 1ce
From Chapter 11 of ``s'', it is given by the following equation.

...(5) However, W is the channel width L is the channel length μn is the electron mobility Vosat is the drain voltage V when the saturation region begins.

Here, V・Osat is expressed as VDsat=φs−2φFP”・(6), and by substituting the above equations (3) and (6) into equation (5), the drain current In is expressed using a potential.・
(7) Therefore, if the interfacial potential φS when depleted changes, the drain current 1o changes.

Next, considering the linear region, the current equation in the linear region is obtained by replacing Vosat with the drain voltage VD in equation (5) from the above-mentioned literature. Then, by substituting the above equation (3) into this equation and expressing the drain current ■0 using a potential, we get ・ ・ ・(8), and as in the saturated region, the interfacial potential φS when depleted changes. For example, the drain current 10 will change.

Furthermore, when the drain voltage V is very small in the linear region, that is, when VD (2φFP) is given, the current equation at this time is the following equation from the above-mentioned literature... (9) And this equation Substituting the equation (3) above into
If S changes, the drain current In will change.

[Problem that the invention seeks to solve]

In conventional circuits using, for example, FETs, there is a problem in that the vth of the element fluctuates greatly, which causes the channel potential to fluctuate, making the circuit operation unstable.

[Means for solving problems]

The present invention provides a conversion circuit (1
) and a detection circuit (comparison circuit (2)) that compares this potential with a reference voltage (voltage source (3)) and detects the difference.
), and performs feedback control of the voltage so that the detected difference becomes zero, and uses this controlled voltage to correct fluctuations in the potential of the element (constant current source (4)). This is a potential correction circuit designed to.

[Effect]

According to this circuit, fluctuations in the potential of the element can be removed, so that the current value of the constant current source, the bias current of the inverting amplifier, etc. can be stabilized, and characteristics such as frequency characteristics can be made constant.

〔Example〕

In FIG. 1, (11 is a voltage/potential conversion circuit, and a potential corresponding to the potential from this circuit (1) is supplied to a comparator circuit (2). Also, a voltage source (3)
A reference voltage from is supplied to the comparator circuit (2).

The output voltage of this comparison circuit (2) is supplied to the conversion circuit (1).

Further, in this circuit, feedback control is applied so that the potential according to the potential from the circuit (1) becomes equal to the reference voltage from the voltage source (3). As a result, the output voltage of the comparator circuit (2) becomes a voltage that corrects the potential to a constant value.

By supplying this output voltage to, for example, an element constituting the constant current source (4), the current flowing through the load (5) is stabilized, and fluctuations in the characteristics of the load (5) are reduced.

Furthermore, the second FI! J shows an example of a specific circuit. In the figure, the voltage/potential conversion circuit (1) is composed of an FBTQI, the drain of which is connected to the power supply VOO, the source is grounded through the FET (11) constituting the current source, and the source is connected to the comparison circuit ( 2) P-type FET (20) for impedance conversion on one side
connected to the gate.

Further, the voltage source (3) is formed by providing resistors (30) (31) made of polysilicon or the like between the power supply vDD and the ground, and dividing the resistors. Here, although the absolute value of the resistance value of polysilicon varies, the resistance division ratio hardly varies, so an extremely stable reference voltage can be obtained. This resistor (30)
The connection midpoint of (31) is connected to the gate of the other impedance conversion P-type FET (21) constituting the comparator circuit (2).

Furthermore, the drains of FETs (20) and (21) are grounded, and the sources are FETs (22) and (21) for constant current sources, respectively.
23) to the power supply VDD, and these sources constitute the comparator circuit (2).
FETs (24) and (25) are connected to the gates of the FETs (24) and (25), respectively. The sources of these FETs (24) (25) are connected to the power supply vDD through the constant current source FET (26), and the drains are grounded through the current mirror configuration load current sources (27) (28).
The drain of T(24) is connected to the gate of FETα1.

And the connection line to the gate of this FET (1+1) is
It is connected to the gate of the FET (40) constituting the constant current source (4).

Here, the configuration of FETQI (11) is as shown in FIG. 3A, and if the structure is as shown in the middle part of the figure, its potential will be as shown in the lower part of the figure. Therefore, it is possible to obtain Vout at the same potential as the potential formed for Vin (white area). Furthermore, FE
T(11) discharges a small current from Vout, and due to the influence of noise etc., Vou is lower than the potential of Via.
This is to prevent t from becoming high, and essentially it can be omitted as shown in Figure B, or by connecting a high resistance resistor (12) as shown in Figure C. Good too.

That is, the above circuit is designed so that an extremely small current flows through FETQI. In this state, FET
The channel can be considered to have just changed from a depleted state to a strongly inverted state. On the other hand, F at this time
The source of the ET can be considered to simply be in a reverse bias state with the substrate, and as described in Chapter 10 of the above-mentioned literature, the source voltage V is 'J s s+=φs-2φFP・...(11) is expressed. Here, although φFP varies somewhat depending on the process conditions, VFBO has a much greater influence on the variation in vth, and in reality, the variation in φFP can be ignored.

Therefore, in the above-described circuit, the potential φS and the detected voltage are in a proportional function, and a voltage corresponding to the potential can be detected.

Also, the interfacial potential when the surface is depleted...
(12) It is expressed as Here, in a normal process, V FB *
Na and Go fluctuate a lot, so if VG is kept constant, φS will fluctuate. Therefore, in the above circuit, VF
It is possible to make φS constant by canceling out the change due to B, etc. by adjusting V by #J.

For example, considering the saturation region, the relationship between potential and current is as shown in equation (7) above, and when comparing this equation with equation (5) using gate voltage, the maximum value of both equations is The difference is that the current formula using potential has VF.
The term R is not included. This also applies to the linear region.

Therefore, the equation expressing current using potential is VFB
The fact that there is no term means that even if vth changes, if the surface potential at the time of depletion is kept constant, the current of the FET will not change.

Therefore, in the above circuit, by supplying a voltage that keeps the potential constant to the FET (40), the FET
(40) can be made constant. Note that FETs (II and (40) are formed by the same process,
At least the channel lengths are assumed to be equal.

By thus eliminating fluctuations in the potential of the element, the drain current can be stabilized.

Further application examples are shown below.

First, FIGS. 4 and 5 show the case where the device is used as a constant current source, and is connected to a source follower element (50) or elements (51) and (52) constituting a differential amplifier, respectively. In these examples, since the current value of the element (40) constituting the constant current source is stabilized, the characteristics of the circuit can be stabilized. Note that it can also be applied to constant current sources in other circuits.

Figure 6 shows an example that is commonly used in the input bias circuit of an inverting amplifier, with a resistor (
A voltage that makes the above-mentioned potential constant is supplied through the capacitor (61), and the DC voltage is removed by the capacitor (62) and superimposed on the supplied signal. In this circuit as well, the potential at the input bias point is stabilized, and gain, linearity, frequency characteristics, etc. can be stabilized. Note that similar effects can be obtained even if this circuit is applied to the input bias circuit of a source follower.

This circuit also has the effect of stabilizing the circuit current in a circuit configuration in which current is caused to flow by bias.

〔Effect of the invention〕

According to this invention, since fluctuations in the potential of the element can be removed, the current value of the constant current source, the bias current of the inverting amplifier, etc. can be stabilized, and characteristics such as frequency characteristics can be made constant.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an example of the present invention, FIGS. 2 and 3 are diagrams for explaining the same, and FIGS. 4 to 6 are block diagrams of applied examples. (1) is a voltage/potential conversion circuit, (2) is a comparison circuit, (3) is a reference voltage source, (4) is a constant current source, and (5) is a load circuit. Figure 2 of Gutaiguchi J) Shall No. 3L

Claims (1)

[Claims] It has a conversion circuit that converts a voltage into a potential, and a detection circuit that compares this potential with a reference voltage and detects a difference therebetween. A potential correction circuit that performs voltage feedback control and uses this controlled voltage to correct fluctuations in the potential of an element.