JPS622694A - Manufacture of printed wiring board - Google Patents

Manufacture of printed wiring board

Info

Publication number
JPS622694A
JPS622694A JP14194785A JP14194785A JPS622694A JP S622694 A JPS622694 A JP S622694A JP 14194785 A JP14194785 A JP 14194785A JP 14194785 A JP14194785 A JP 14194785A JP S622694 A JPS622694 A JP S622694A
Authority
JP
Japan
Prior art keywords
printed wiring
wiring board
multilayer
conductive
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14194785A
Other languages
Japanese (ja)
Inventor
玉谷 喜一
岡崎 孝史
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TOKYO PRINT KOGYO KK
Original Assignee
TOKYO PRINT KOGYO KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TOKYO PRINT KOGYO KK filed Critical TOKYO PRINT KOGYO KK
Priority to JP14194785A priority Critical patent/JPS622694A/en
Publication of JPS622694A publication Critical patent/JPS622694A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、複層の導電回路や重ね刷ルなどの多層構造に
よって表面が凹凸状のプリント配線板に外形加工を施す
時、表面の凹凸に伴い加工時の作用力が局所に集中して
、該箇所にクラック等の欠損が生じるといったことを効
、果的に防止できるプリント配線板の製造方法に関する
Detailed Description of the Invention [Industrial Field of Application] The present invention is applicable to a printed wiring board having an uneven surface due to a multilayer structure such as a multilayer conductive circuit or an overprinted circuit. The present invention relates to a method for manufacturing a printed wiring board that can effectively prevent the occurrence of defects such as cracks in such locations due to local concentration of working force during processing.

〔従来の技術〕[Conventional technology]

近年、特に導電性ペーストの使用などによシ、絶縁層を
介在させて導電回路を2層以上に積層するプリント配線
板が製作されるに至っている。
In recent years, printed wiring boards have been produced in which two or more layers of conductive circuits are laminated with an intervening insulating layer, particularly by using conductive paste.

しかし、従来のこのような多層構造のプリント配線板は
、製造の過程において、スクリーン印刷などの手段によ
り複層の導電回路を形成した後、打ち抜き等の外形加工
を施している。このため、複層の導電回路の形成に伴い
表面が凹凸状になり、この結果、例えば第8図に示す如
き打ち抜き加工機Aにより外形加工を行うと、加工時に
プレス圧が、他の表面より突出する複層の導電回路の箇
所Bに集中して、大きな圧力が加わることになり、該箇
所Bにクラック等の欠損が生ずることがあった。このよ
うな不具合は、ルータ−やドリルなど他の加工機によっ
ても同様な現象が生じるものである。又、上記の如く絶
縁層を介在させて2層以上に積層する場合はもとよシ、
レジストインク上に更にサービス文字や記号、更にはそ
の他のインクをスクリーン印刷等の手段で幾層にも重ね
刷シをし、この結果状箇所が他の箇所よシ突出する状態
になった時も同様な問題が生じていた。
However, in the manufacturing process of conventional printed wiring boards having a multilayer structure, multilayer conductive circuits are formed by means such as screen printing, and then external processing such as punching is performed. For this reason, the surface becomes uneven with the formation of a multilayer conductive circuit, and as a result, when the external shape is processed using a punching machine A as shown in FIG. A large pressure is concentrated on the protruding portion B of the multilayer conductive circuit, and defects such as cracks may occur in the portion B. Similar problems occur with other processing machines such as routers and drills. In addition, when stacking two or more layers with an insulating layer interposed as described above,
Even when service characters, symbols, and other inks are printed in multiple layers on top of the resist ink using screen printing or other means, and as a result, some areas stick out more than others. A similar problem was occurring.

しかも近年プリント配線板の基材の材質が改善され、又
加工後々ど周辺技術も改良されるに至って、常温で打ち
抜き加工ができるようになってきた。
Moreover, in recent years, the quality of the base material of printed wiring boards has been improved, and the peripheral technology after processing has also been improved, making it possible to perform punching at room temperature.

即ち、従前の方法は、プリント配線板を加熱して、柔軟
性を持たせるなど加工しやすい性状に変化させて打ち抜
き加工を行い、打ち抜き端の欠損所謂虫食い現象等の損
傷が生じないようにしていた。
In other words, in the conventional method, the printed wiring board is heated to change its properties to be more easily processed, such as to make it more flexible, and then punched out, thereby preventing damage such as loss of the punched edges and the so-called moth-eaten phenomenon. Ta.

この方法は加熱による基材の収縮等で寸法rtw:、に
狂いが生じやすいなどといった欠点があシ、この結果虫
食い現象の生じ難い基材の材質の改善や周゛辺技術の改
良に伴って常温で打ち抜き加工が行われるに至っている
。しかし、この方法でも基材、特に基材に形成したレジ
ストイ/り層等の積層部にクラック尋の欠損が生じるこ
とがあった。このようなりラック等の欠損が生ずる要因
のひとつとして、基材上に形成した複層の導電回路やサ
ービス文字等インクの重ね刷りなど多層構造によってプ
リント配線板の表面が凹凸状になシ、このような表面状
態で打ち抜き加工を行うため、局所に大きな力が加わっ
てクラック等の欠損が生じることになっていた。
This method has the disadvantage that the dimensions rtw: are likely to be distorted due to shrinkage of the base material due to heating, etc. As a result, improvements in the material of the base material that is less likely to cause the worm-eaten phenomenon and improvements in peripheral technology have been made. Punching has come to be performed at room temperature. However, even with this method, cracks and defects may occur in the base material, particularly in the laminated portion of the resist layer/layer formed on the base material. One of the reasons for this kind of damage to racks, etc. is that the surface of the printed wiring board is uneven due to the multilayer structure, such as multilayer conductive circuits formed on the base material and overprinting of ink such as service letters. Since punching is performed in such a surface condition, a large force is applied locally, resulting in defects such as cracks.

そこで、全製作品数に対する良品数の歩止まシを向上さ
せるととけもとよシ、如何なる種類、更には如何なる打
ち抜き加工の形式にあっても常時一定でかつ良質のプリ
ント配線板が製作し得る方法が望まれていた。
Therefore, by improving the yield ratio of the number of good products to the total number of products manufactured, it is possible to always produce printed wiring boards of a constant and high quality regardless of the type or type of punching process. was desired.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

本発明は、上記事情に鑑み、複層の導電回路やサービス
文字等の重ね刷シをして表面が凹凸状になる多層構造の
プリント配線板を製造する際に、外形加工によってり2
ツク等の欠損の発生を防止し得て、品質の良好なプリン
ト配線板を製作できるプリント配線板の製造方法を提供
することを目的とする。
In view of the above-mentioned circumstances, the present invention has been devised to produce a printed wiring board with a multilayer structure in which multilayer conductive circuits, service characters, etc. are overprinted and the surface becomes uneven.
It is an object of the present invention to provide a method for manufacturing a printed wiring board that can prevent defects such as scratches and produce a printed wiring board of good quality.

〔発明が解決しようとする手段〕[Means to be solved by the invention]

本発明は、上記目的を達成すべく、複層の導電回路や重
ね刷シ等の多層構造によって表面が凹凸状に一形成され
るプリント配線板において、銅張シ積層板に孔明は加工
等外形加工を施した後、多層構造に形成したプリント配
線板の製造方法を特徴とするものである。
In order to achieve the above object, the present invention relates to a printed wiring board whose surface is formed into an uneven shape by a multilayer structure such as a multilayer conductive circuit or an overprinted sheet. The present invention is characterized by a method of manufacturing a printed wiring board formed into a multilayer structure after processing.

〔実施例〕〔Example〕

以下、本発明に係るプリント配線板の製造方法の一実施
例を図面に基づき説明する。第1図において、1は基材
2に銅箔3を積層した銅張シ積層板である。基材2に銅
箔3を積層する方法は、如何なる形式であってもよいこ
とは勿論である。又基材2は、近年特に開発され、使用
されるに至っている常温で打ち抜き加工できる材質が好
適であるが、これに限定されず、各種のものの使用が可
能である。上記鋼張シ積層板1に、第2図に示す如く、
電子部品の実装用孔4等の孔明けなど、外形加工を施す
。次に、上記銅箔3をエツチング処理するなどして、予
め設定した配線パターンに形成する。配線パターンは昇
エツチング処理によることが容易に形成できて頗る好適
であるが、必ずしもエツチング処理によって形成しなけ
れば女らないものでは々く、その他の方法であってもよ
いことは勿論である。又、上記第2図に示す外形加工も
、配線パターンを形成した後に行うことも可能である。
EMBODIMENT OF THE INVENTION Hereinafter, one Example of the manufacturing method of the printed wiring board based on this invention is demonstrated based on drawing. In FIG. 1, 1 is a copper-clad laminate in which a copper foil 3 is laminated on a base material 2. Of course, any method may be used to laminate the copper foil 3 on the base material 2. The base material 2 is preferably made of a material that can be punched out at room temperature, which has been particularly developed and used in recent years, but the material is not limited thereto, and various materials can be used. As shown in FIG. 2, the steel-clad laminate 1 has
Perform external processing such as drilling holes 4 for mounting electronic components. Next, the copper foil 3 is etched to form a preset wiring pattern. Although the wiring pattern can be easily formed by etching, it is very suitable, but it does not necessarily have to be formed by etching, and other methods may of course be used. Further, the external shape processing shown in FIG. 2 can also be performed after forming the wiring pattern.

その後、第4図に示す如く、スクリーン印刷によシ絶縁
層としての9$1のアンダーコート5を施し、次に第5
図に示す如く、所定の銅箔3による回路間を橋絡すべく
、導電ペーストをスクリーン印刷によシ第1のアンダー
コート5上に塗布して、第1の導電橋絡回路層6を形成
し、更に核導電橋絡回路層6上にスクリーン印刷により
絶縁層としての第2のアンダーコート7を形成する。第
2のアンダーコート7上には、w46図に示す如く、上
記第1の導電橋絡回路層6と同様にして、所定の銅箔3
′による回路間を橋絡すべく、第2の導電橋絡回路層8
を形成した後、オーバーコート9を施す。上記第1のア
ンダーコート5、第2のアンダーコート7、第1の導電
橋絡回路層6、第2の導電橋絡回路層8及びオーバー;
−ト9は、それぞれスクリーン印刷によシ塗布した後、
硬化させることは勿論である。又、第7図に示す如く、
更に第3の導電橋絡回路層10を形成した後、オーバー
コ−ト11を施すこともあり、導電橋絡回路層は′!p
JG図及び第7図に示す積層数に限足されるものではな
い。このようにして多層構造に形成した後は、外形加工
を施すことなく、そのまま製品化する。
Thereafter, as shown in FIG. 4, a 9$1 undercoat 5 as an insulating layer was applied by screen printing, and then a fifth layer was applied.
As shown in the figure, a conductive paste is applied on the first undercoat 5 by screen printing to form a first conductive bridging circuit layer 6 in order to bridge the circuits formed by the predetermined copper foils 3. Furthermore, a second undercoat 7 as an insulating layer is formed on the nuclear conductive bridging circuit layer 6 by screen printing. On the second undercoat 7, as shown in figure w46, a predetermined copper foil 3 is applied in the same manner as the first conductive bridging circuit layer 6.
′, a second conductive bridging circuit layer 8
After forming, an overcoat 9 is applied. The first undercoat 5, second undercoat 7, first conductive bridging circuit layer 6, second conductive bridging circuit layer 8 and over;
- G-9 was coated by screen printing, and then
Of course, it can be cured. Also, as shown in Figure 7,
Furthermore, after forming the third electrically conductive bridging circuit layer 10, an overcoat 11 may be applied, and the electrically conductive bridging circuit layer becomes '! p
The number of laminated layers is not limited to those shown in the JG diagram and FIG. 7. After forming the multilayer structure in this way, it is manufactured into a product as it is without any external processing.

尚、上記複層の導電橋絡回路層を形成して表面が凹凸状
になシ、その後に外形加工を施したことによってクラッ
ク等の欠損の発生が予想される箇所のみ、積層をする前
に、予め孔明は等の加工を施しておき、その他の箇所は
、積層をした後に加工を施すこともできる。
In addition, before laminating only the areas where defects such as cracks are expected to occur due to the formation of the multi-layer conductive bridging circuit layer and the subsequent contour processing, It is also possible to perform processing such as holes and the like in advance, and to perform processing on other parts after lamination.

上記方法は、複層の導電橋絡回路層を形成する場合の他
、スクリーン印刷などによって抵抗等の電子部品を形成
した場合に、該電子部品を加工時のプレス圧で損傷する
ことを防止する際にも効果を発揮でき、又電子部品を表
示するサービス文字叫のインクを重ね刷シをして表面が
凹凸状になる場合も同様にしてそのまま適用できる。
In addition to forming a multilayer conductive bridging circuit layer, the above method prevents electronic components such as resistors from being damaged by press pressure during processing when forming electronic components such as resistors by screen printing or the like. It can also be applied in the same way when the surface becomes uneven due to overprinting of ink with service letters for displaying electronic parts.

〔発明の効果〕〔Effect of the invention〕

以上の如く、本発明に係るプリント配線板の製造方法に
よれば、複層の導電回路や重ね刷シの多層構造に形成す
る前に、予め外形加工を施しておくことから、従来の如
く、多層構造に形成した後、外形加工を施した時に、基
板の表面の突出する箇所に加工時のプレス圧が県中して
大きな力が加わり、これによシ該箇所にクラック等の欠
損が生じ、又基板の表面の凹凸によって、プレス圧がプ
レス方向のみならず、その他の方向にも分力としての作
用力が生じて、基板にクラック等の欠損が生じるといつ
九ことを効果的に防止して品質の向上を図ることができ
、しかも、加工機も金型にプリン、ト配線板の突出部を
逃げるための凹部を形成するといった必要性もなく便利
である。
As described above, according to the method for manufacturing a printed wiring board according to the present invention, the external shape is processed in advance before forming a multilayer conductive circuit or a multilayer structure of overprinting. After forming a multilayer structure, when the external shape is processed, the press pressure during processing applies a large force to the protruding parts of the surface of the board, which causes defects such as cracks at the parts. Also, due to the unevenness of the surface of the substrate, the press pressure acts not only in the pressing direction but also in other directions, effectively preventing defects such as cracks on the substrate. Furthermore, the processing machine is convenient because there is no need to form a recess in the mold to allow the protrusion of the printed wiring board to escape.

【図面の簡単な説明】[Brief explanation of drawings]

第1図及至第6図は、本発明に係るプリント配線板の製
造方法の一実施例を示す説明図、第7図は、第6図のプ
リント配線板に更に導電橋絡回路層を積層した説明図、
第8図は、従来の外形加工の状態を示す説明図である。 1・・・銅張シ積層板、 2・・・基材、 3,3′・
・・銅箔、 4・・・実装用孔、 5・・・第1のアン
ダーコート、 6・・・第1の導電橋絡回路層、 7・
・・第2のアンダーコート、 8・・・第2の導電橋絡
回路層、 9・・・オーバーコート、  10・・・第
3の導電橋絡回路層、  11・・・オーバーコート特
許出願人  東京プリント工業株式会社第1図 第2図 第3区 第5図 16図 オ8図
1 to 6 are explanatory diagrams showing an example of the method for manufacturing a printed wiring board according to the present invention, and FIG. 7 is an illustration showing an embodiment of the method for manufacturing a printed wiring board according to the present invention, and FIG. Explanatory diagram,
FIG. 8 is an explanatory diagram showing the state of conventional external shape processing. 1... Copper-clad laminate, 2... Base material, 3, 3'.
...Copper foil, 4. Mounting hole, 5. First undercoat, 6. First conductive bridging circuit layer, 7.
...Second undercoat, 8...Second conductive bridging circuit layer, 9...Overcoat, 10...Third conductive bridging circuit layer, 11...Overcoat patent applicant Tokyo Print Kogyo Co., Ltd. Figure 1 Figure 2 Ward 3 Figure 5 Figure 16 Figure O 8

Claims (1)

【特許請求の範囲】[Claims]  複層の導電回路や重ね刷り等の多層構造によつて表面
が凹凸状に形成されるプリント配線板において、銅張り
積層板に孔明け加工等の外形加工を施した後、多層構造
に形成してなることを特徴とするプリント配線板の製造
方法。
In printed wiring boards whose surfaces are formed into an uneven shape due to multilayer structures such as multilayer conductive circuits and overprinting, the copper-clad laminate is formed into a multilayer structure after external processing such as drilling is performed. A method of manufacturing a printed wiring board characterized by:
JP14194785A 1985-06-28 1985-06-28 Manufacture of printed wiring board Pending JPS622694A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14194785A JPS622694A (en) 1985-06-28 1985-06-28 Manufacture of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14194785A JPS622694A (en) 1985-06-28 1985-06-28 Manufacture of printed wiring board

Publications (1)

Publication Number Publication Date
JPS622694A true JPS622694A (en) 1987-01-08

Family

ID=15303836

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14194785A Pending JPS622694A (en) 1985-06-28 1985-06-28 Manufacture of printed wiring board

Country Status (1)

Country Link
JP (1) JPS622694A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52124171A (en) * 1976-04-12 1977-10-18 Chuo Meiban Kougiyou Kk Method of producing multilayer printed circuit substrate
JPS5422580A (en) * 1977-07-21 1979-02-20 Fuji Electric Co Ltd Interrupting capacity testing circuit for circuit breaker
JPS59166471A (en) * 1983-03-09 1984-09-19 松下電器産業株式会社 Automatic measurement type variable length arm type multi-joint robot
JPS6347495A (en) * 1986-08-18 1988-02-29 株式会社リツト Air shock tool

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52124171A (en) * 1976-04-12 1977-10-18 Chuo Meiban Kougiyou Kk Method of producing multilayer printed circuit substrate
JPS5422580A (en) * 1977-07-21 1979-02-20 Fuji Electric Co Ltd Interrupting capacity testing circuit for circuit breaker
JPS59166471A (en) * 1983-03-09 1984-09-19 松下電器産業株式会社 Automatic measurement type variable length arm type multi-joint robot
JPS6347495A (en) * 1986-08-18 1988-02-29 株式会社リツト Air shock tool

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